onsemi ESD7205DT5G
- Part No.:
- ESD7205DT5G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SOT-723
- Datasheet:
-
ESD7205DT5G.pdf
- Description:
- TVS DIODE 5VWM 12.5VC SOT723
- Quantity:
- Payment:

- Shipping:

Inventory:1,479
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Product details
Overview
ESD7205DT5G from onsemi is a unidirectional, low-capacitance ESD protection diode array designed for high-speed differential data lines including automotive Ethernet (100BASE-T1), LVDS, and USB 2.0/3.0 interfaces. It delivers 0.4 pF typical I/O-to-GND capacitance, 12 V typical clamping voltage at ±16 A TLP, and 5.0 V working peak reverse voltage in a compact SOT-723 package.
For engineers reviewing the ESD7205DT5G datasheet, pinout, applications, or equivalent options, key selection criteria include ultra-low capacitance matching (<10% inter-channel variation), AEC-Q101 qualification for automotive use, IEC 61000-4-2 Level 4 (±25 kV contact) compliance, and flow-through layout compatibility with matched trace-length requirements for differential signaling integrity.
Technical Context
The ESD7205DT5G integrates two matched unidirectional ESD protection diodes in a single SOT-723 package, configured as dual cathode–anode paths to ground. Its junction capacitance is characterized at 0 V bias and 1 MHz, with tight matching (≤10%) between I/O1–GND and I/O2–GND channels-critical for preserving signal integrity on high-speed differential pairs.
Clamping behavior is validated per ANSI/ESD STM5.5.1 TLP testing (Z₀ = 50 Ω, tₚ = 100 ns), delivering 12.5 V max clamping at +16 A and −8.0 V at −16 A. The device operates across −55 °C to +150 °C junction temperature and supports 3 dB bandwidth exceeding 5 GHz, enabling protection without degrading signal rise/fall times.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Capacitance (I/O to GND) | 0.4 pF typical - minimizes signal distortion on >1 Gbps differential links like 100BASE-T1 |
| Clamping Voltage (TLP) | 12 V typical @ +16 A - limits transient overvoltage to safe levels for 5 V-tolerant PHY receivers |
| Working Peak Reverse Voltage | 5.0 V - matches common high-speed interface supply rails (e.g., USB 2.0, LVDS) |
| IEC 61000-4-2 Rating | ±25 kV contact - exceeds Level 4 immunity requirement for automotive infotainment and ADAS modules |
| Junction Temp Range | −55 °C to +150 °C - enables deployment in under-hood camera modules and engine bay ECUs |
| Capacitance Matching | ≤10% deviation - ensures balanced impedance and common-mode rejection on differential pairs |
| 3 dB Bandwidth | >5 GHz - preserves edge rates for signals up to 10 Gbps without insertion loss penalty |
Pinout & Package
SOT-723 (Case 631AA), 1.20 mm × 0.80 mm × 0.50 mm, 0.40 mm pitch, flow-through configuration optimized for symmetric PCB routing of differential traces.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Cathode (I/O1) | ESD current sink path for first high-speed data line (e.g., TX+) |
| Pin 2 | Anode (GND) | Common ground reference shared by both protection paths |
| Pin 3 | Cathode (I/O2) | ESD current sink path for second high-speed data line (e.g., TX−) |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low capacitance | 0.4 pF typical ensures <0.1 dB insertion loss at 5 GHz for 100BASE-T1 compliance |
| Matched diode capacitance | ≤10% inter-channel variation maintains differential mode impedance stability |
| AEC-Q101 qualified | Validated for automotive-grade reliability including temperature cycling and HTRB |
| Flow-through package layout | Enables straight-line PCB trace routing to minimize stubs and preserve signal integrity |
| IEC 61000-4-2 Level 4 support | ±25 kV contact discharge rating meets OPEN Alliance requirements for automotive Ethernet |
Applications
| Automotive Ethernet (100BASE-T1) | LVDS Camera Interface |
|---|---|
Use Scenario: Protection of bidirectional 100 Mbps automotive Ethernet PHY transceivers in rear-view and surround-view camera modules. IC Role / Device Role / Timing Role: Unidirectional ESD clamp on each differential pair (TX+/TX−, RX+/RX−), referenced to chassis ground. Use Value: Prevents latch-up or gate oxide damage during ESD events while maintaining <100 ps skew between differential signals due to matched capacitance. |
Use Scenario: ESD hardening of LVDS video links between image sensor and SoC in ADAS domain controllers. IC Role / Device Role / Timing Role: Dual-channel I/O-to-GND transient suppressor placed immediately at connector entry point. Use Value: Enables 600 Mbps pixel clock transmission with <0.5% eye diagram degradation at 1.2 V common-mode voltage. |
| USB 2.0 Automotive Interface | High-Speed Differential Pairs (General) |
Use Scenario: ESD protection for USB 2.0 D+/D− lines in vehicle infotainment head units exposed to user-accessible ports. IC Role / Device Role / Timing Role: Low-capacitance shunt diode array placed before USB transceiver input pins. Use Value: Maintains full-speed USB 2.0 eye mask compliance (480 Mbps) with no added jitter beyond 1.5 ps RMS. |
Use Scenario: General-purpose protection of any high-speed differential signaling standard requiring sub-0.5 pF loading per line. IC Role / Device Role / Timing Role: Matched dual-path ESD clamp supporting protocols including MIPI D-PHY, eDP, and PCIe Gen1. Use Value: Provides consistent clamping response across both lines, reducing common-mode noise injection by >15 dB vs. discrete diodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESD7205WTT1G | SOT-323 package (larger footprint, 2.0 mm × 1.25 mm), 0.47 pF typical capacitance | Less suitable for space-constrained automotive camera modules; better thermal dissipation for higher ambient temp zones | Select when board area permits and thermal margin >15 °C above ESD7205DT5G's derating curve |
| TPD2E001DRYR | Texas Instruments part; 0.8 pF typical capacitance, ±12 kV IEC 61000-4-2 contact rating | Lacks AEC-Q101 qualification; not approved for automotive safety-critical domains | Acceptable for industrial or consumer USB/LVDS where automotive qualification is not required |
Compared with ESD7205WTT1G and TPD2E001DRYR, the ESD7205DT5G uniquely combines AEC-Q101 qualification, 0.4 pF capacitance, and SOT-723 flow-through layout-making it the only option qualified for production automotive Ethernet systems requiring both miniaturization and functional safety alignment.
Availability
ESD7205DT5G is available at Aetrix Electronics and suitable for automotive Ethernet, LVDS camera interfaces, and USB 2.0/3.0 applications requiring stable component supply, long-term lifecycle assurance, and AEC-Q101-compliant sourcing.
Supply support for ESD7205DT5G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, with leadership in automotive, industrial, cloud power, and sensing solutions.
The ESD7205DT5G belongs to onsemi's low-capacitance ESD protection diode family, engineered specifically for high-speed differential data lines in automotive ADAS and infotainment systems where signal fidelity and AEC-Q101 reliability are mandatory.
FAQ
What is the exact pin configuration of the ESD7205DT5G?
The ESD7205DT5G uses a SOT-723 package with three terminals: Pin 1 is Cathode (I/O1), Pin 2 is Anode (GND), and Pin 3 is Cathode (I/O2). This flow-through arrangement allows direct in-line routing of differential traces without vias or stubs, preserving impedance continuity and minimizing signal reflection on high-speed lines such as 100BASE-T1.
Is the ESD7205DT5G qualified for automotive applications?
Yes, the ESD7205DT5G is AEC-Q101 qualified and PPAP capable, with full test documentation supporting its use in automotive environments. It operates across −55 °C to +150 °C junction temperature and meets IEC 61000-4-2 Level 4 (±25 kV contact) - satisfying OPEN Alliance requirements for 100BASE-T1 Ethernet in camera modules and domain controllers.
How does the capacitance matching specification benefit differential signaling?
The ESD7205DT5G guarantees ≤10% capacitance deviation between its two I/O-to-GND paths. This tight matching prevents skew and common-mode imbalance on differential pairs like LVDS or 100BASE-T1, ensuring <100 ps timing skew and >30 dB common-mode rejection ratio - critical for maintaining eye diagram integrity at multi-Gbps data rates.
What is the clamping voltage performance of the ESD7205DT5G under real-world ESD stress?
Under TLP testing at ±16 A (representing worst-case IEC 61000-4-2 contact discharge), the ESD7205DT5G clamps to 12.5 V maximum. At lower currents (e.g., ±8 A), clamping drops to 10 V typical. This low-voltage clamping protects 5 V-tolerant PHY receivers without triggering overvoltage shutdown or damaging internal ESD structures.
Can the ESD7205DT5G be used for USB 3.0 SuperSpeed differential lanes?
No - the ESD7205DT5G is rated for 5.0 V working voltage and optimized for 100BASE-T1, LVDS, and USB 2.0 (480 Mbps). USB 3.0 SuperSpeed (5 Gbps) requires lower capacitance (<0.2 pF) and higher bandwidth; the ESD7205DT5G's 0.4 pF capacitance and 5 GHz 3 dB bandwidth are insufficient for Gen1 compliance without measurable eye closure.
ESD7205DT5G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOT-723
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 5.2V
- Voltage - Clamping (Max) @ Ipp:
- 12.5V (Typ)
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- Ethernet, USB OTG
- Capacitance @ Frequency:
- 0.34pF @ 1MHz
- Operating Temperature:
- -55°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-723
ESD7205DT5G FAQ
1.How can I place an order for ESD7205DT5G through Aetrix?
Please submit a Request for Quotation (RFQ) for ESD7205DT5G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ESD7205DT5G reliable?
The price and inventory of ESD7205DT5G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ESD7205DT5G is usually 5 days.
3.What payment methods are accepted for ESD7205DT5G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ESD7205DT5G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ESD7205DT5G?
ESD7205DT5G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ESD7205DT5G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ESD7205DT5G?
For technical support, including ESD7205DT5G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ESD7205DT5G requirements.
6.How does Aetrix verify that ESD7205DT5G is sourced from the original manufacturer or authorized distributors?
All ESD7205DT5G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ESD7205DT5G meets industry standards.
7.What is the process for return or replacement of ESD7205DT5G?
All ESD7205DT5G units undergo pre-shipment inspection (PSI). If there is an issue with ESD7205DT5G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ESD7205DT5G part is unused and in its original packaging.
Return procedure for ESD7205DT5G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ESD7205DT5G Tags

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ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

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ESD5Z3.3T1G
onsemi

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D5V0H1B2LP-7B
Diodes Incorporated

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D5V0P1B2LP-7B
Diodes Incorporated

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DESD5V0U1BA-7
Diodes Incorporated

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ESD5Z5.0T1G
onsemi

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DESD5V0U1BB-7
Diodes Incorporated

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D12V0L1B2LP-7B
Diodes Incorporated

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PESD2V0Y1BSFYL
Nexperia USA Inc.

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DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

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D5V0L1B2WS-7
Diodes Incorporated
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