Vishay General Semiconductor - Diodes Division GSOT04C-HE3-08
- Part No.:
- GSOT04C-HE3-08
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
GSOT04C-HE3-08.pdf
- Description:
- TVS DIODE 4VWM 14.3VC SOT23
- Quantity:
- Payment:

- Shipping:

Inventory:11,420
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Product details
Overview
GSOT04C-HE3-08 from Vishay Semiconductors is a two-line bidirectional ESD protection diode in SOT-23 package, rated for ±30 kV IEC 61000-4-2 contact/air discharge, 4 V reverse stand-off voltage (VRWM), 30 A peak pulse current (IPPM), and 429 W peak pulse power (PPP) in line-to-ground configuration - deployed in USB 2.0 data lines and industrial sensor interfaces.
For engineers reviewing the GSOT04C-HE3-08 datasheet, GSOT04C-HE3-08 pinout, GSOT04C-HE3-08 application, or GSOT04C-HE3-08 equivalent, key selection considerations include its BiAs-mode asymmetrical clamping behavior, 310–450 pF capacitance at 0 V bias, AEC-Q101 qualification option, and SOT-23 footprint compatibility with space-constrained PCB layouts.
Technical Context
The GSOT04C-HE3-08 implements BiAs-MODE (Bidirectional Asymmetrical) protection: pin 1 and pin 2 connect to protected signal lines (L1/L2), pin 3 to ground, enabling independent clamping of positive transients via reverse breakdown (VBR = 5–7 V) and negative transients via forward conduction (VF ≤ 1.2 V at 30 A). This yields distinct clamping voltages - 11.2–14.3 V (reverse) vs. ≤4.5 V (forward) at IPPM.
In BiSy-MODE (single-line symmetrical), pin 3 is left unconnected; pins 1 and 2 form a bipolar path with VRWM = 4.5 V, VBR = 5.5–7.7 V, and clamping symmetry - delivering 15.7–18.8 V at 30 A IPPM. Both modes support MSL Level 1 reflow up to 260 °C and operate from –55 °C to +150 °C junction temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD immunity | ±30 kV contact/air discharge per IEC 61000-4-2 - meets highest system-level ESD robustness requirements without external shielding. |
| Reverse stand-off voltage (VRWM) | 4 V - ensures no leakage or interference on 3.3 V logic/data lines during normal operation. |
| Peak pulse current (IPPM) | 30 A (line-to-ground), 30 A (line-to-line) - handles severe surge events per IEC 61000-4-5 8/20 μs waveform. |
| Clamping voltage (VC) | 11.2–14.3 V at 30 A (reverse), ≤4.5 V at 30 A (forward) - limits transient overvoltage to safe levels for downstream ICs. |
| Capacitance (CD) | 310–450 pF at 0 V, 200 pF at 2 V - optimized for <10 Mbps data lines; low enough for USB 2.0 but not high-speed SerDes. |
| Operating temperature | –55 °C to +150 °C - supports automotive under-hood, industrial control, and outdoor equipment deployments. |
| AEC-Q101 qualified | Available in AEC-Q101-compliant variant - validated for automotive electronics reliability and lifetime stress testing. |
Pinout & Package
SOT-23 package: 3-pin, surface-mount, e3 Sn-plated, UL 94 V-0 molding compound, 8.8 mg weight, MSL Level 1, compatible with standard 8 mm tape-and-reel handling (3K/reel).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Signal line input (L1) | Connects to first protected data line (e.g., USB D+); forms one leg of BiAs or BiSy protection path. |
| Pin 2 | Signal line input (L2) | Connects to second protected data line (e.g., USB D−); symmetrically paired with Pin 1 in BiAs mode. |
| Pin 3 | Ground reference | Must be connected to low-impedance system ground in BiAs mode; left floating in BiSy mode. |
Key Features
| Feature | Design Value |
|---|---|
| Two-line ESD protection | Single SOT-23 device protects dual signal paths (e.g., differential pairs), reducing component count and board area vs. discrete diodes. |
| BiAs-MODE asymmetry | Enables tighter negative-voltage clamping (≤4.5 V) while maintaining higher positive-voltage margin - ideal for mixed-signal interfaces with asymmetric voltage tolerances. |
| Low leakage current | IR ≤ 20 μA at 4 V - prevents signal degradation or battery drain in always-on sensor or IoT endpoints. |
| High surge power rating | 429 W (pin 1–3/2–3), 564 W (pin 1–2) - sustains multiple high-energy transients without parametric shift or failure. |
| Space-saving SOT-23 | Footprint matches industry-standard 3-pin SOT-23 land pattern - enables drop-in replacement and automated assembly compatibility. |
Applications
| USB 2.0 Interface Protection | Industrial Sensor Signal Lines |
|---|---|
Use Scenario: Protecting D+ and D− lines of USB 2.0 ports against ESD events in factory automation HMIs and test equipment. IC Role / Device Role / Timing Role: Bidirectional asymmetrical clamp (BiAs-MODE) referenced to system ground, limiting transients before they reach USB transceiver ICs. Use Value: Maintains signal integrity with 310–450 pF capacitance while delivering ±30 kV ESD immunity - eliminating need for additional RC filtering or layout guard rings. |
Use Scenario: Safeguarding analog output lines (e.g., 4–20 mA, 0–10 V) from ESD in process control transmitters exposed to field maintenance personnel. IC Role / Device Role / Timing Role: Two-channel transient voltage suppressor placed at connector entry point, operating in BiAs-MODE with grounded common terminal. Use Value: Withstands 30 A surges and operates across –55 °C to +150 °C - ensuring long-term reliability in harsh ambient conditions without derating. |
| Automotive Infotainment Data Links | Consumer Audio Differential Pairs |
Use Scenario: ESD hardening of LVDS or UART lines between head unit and display modules in vehicles meeting ISO 10605 requirements. IC Role / Device Role / Timing Role: AEC-Q101-qualified ESD protector used in BiSy-MODE (pin 3 open) for symmetrical clamping on single-ended or pseudo-differential links. Use Value: Delivers 15.7–18.8 V clamping at 30 A with 155–225 pF capacitance - preserving signal edge rates while meeting automotive EMC test margins. |
Use Scenario: Protecting balanced audio inputs (e.g., I²S, SPDIF) in smart speakers and soundbars from user-handling ESD. IC Role / Device Role / Timing Role: Dual-line TVS diode configured in BiAs-MODE to clamp both signal legs independently to chassis ground. Use Value: 4 V VRWM avoids DC loading on 3.3 V logic-level audio controllers; low forward VF (≤1.2 V) minimizes distortion during negative transients. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| VGSOT04C | Successor device in same SOT-23 package; identical VRWM (4 V), VBR (5–7 V), and clamping performance; improved moisture sensitivity (MSL 1 confirmed). | Designed as direct EOL replacement for GSOT04C-HE3-08 with full backward compatibility in layout and electrical behavior. | Select VGSOT04C for new designs requiring extended product lifecycle beyond January 2025. |
| TPD2E001DRSR | TI dual-channel ESD protector; lower capacitance (12 pF typical), lower VRWM (3.6 V), lower IPPM (4 A), and different pinout (Pin 1=IO1, Pin 2=GND, Pin 3=IO2). | Better suited for high-speed interfaces (e.g., HDMI, USB 3.0) but insufficient for 30 A surge events in industrial environments. | Choose only when low capacitance is critical and surge current demand is ≤4 A; requires PCB redesign due to non-compatible pin mapping. |
Compared with VGSOT04C, the GSOT04C-HE3-08 offers identical protection specs but reaches end-of-life in January 2025; compared with TPD2E001DRSR, it delivers 7.5× higher surge current handling and 25× higher capacitance - making it suitable for ruggedized, lower-speed interfaces where robustness outweighs bandwidth.
Availability
GSOT04C-HE3-08 is available at Aetrix Electronics and suitable for USB 2.0 interface protection, industrial sensor signal conditioning, and automotive infotainment data links requiring stable component supply through its scheduled end-of-life date in January 2025.
Supply support for GSOT04C-HE3-08 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Semiconductors is a global leader in discrete semiconductors, specializing in high-reliability diodes, MOSFETs, optoelectronics, and passive components for automotive, industrial, and computing markets.
The GSOT04C-HE3-08 belongs to Vishay's GSOTxxC family of bidirectional ESD protection diodes, engineered specifically for compact, high-surge-capacity transient suppression in space-constrained, mission-critical signal paths.
FAQ
What is the maximum reverse working voltage (VRWM) of the GSOT04C-HE3-08?
The GSOT04C-HE3-08 has a maximum reverse working voltage (VRWM) of 4 V when used in two-line BiAs-MODE (pins 1/2 to pin 3). In single-line BiSy-MODE (pins 1 to 2, pin 3 open), VRWM is 4.5 V. These values ensure reliable blocking of normal signal voltages while triggering clamping during transients - critical for protecting 3.3 V logic interfaces without leakage-induced errors.
How does the GSOT04C-HE3-08 handle positive versus negative ESD transients?
The GSOT04C-HE3-08 uses BiAs-MODE asymmetry: positive transients above ~5–7 V trigger reverse breakdown between signal pin and ground (pin 3), clamping at 11.2–14.3 V; negative transients conduct forward through the diode, clamping tightly at ≤4.5 V. This dual-threshold behavior protects downstream ICs with differing positive/negative voltage tolerances - a key advantage over symmetrical TVS devices.
Is the GSOT04C-HE3-08 suitable for automotive applications?
Yes - the GSOT04C-HE3-08 is available in an AEC-Q101-qualified version (denoted by "-H" suffix in ordering code), validated for automotive-grade reliability including temperature cycling, humidity testing, and mechanical shock. Its –55 °C to +150 °C operating range and ±30 kV ESD immunity meet requirements for infotainment, body control, and sensor modules.
What is the capacitance of the GSOT04C-HE3-08 and how does it affect signal integrity?
The GSOT04C-HE3-08 exhibits 310–450 pF capacitance at 0 V bias and 200 pF at 2 V reverse bias (1 MHz). This level supports data rates up to ~10 Mbps (e.g., USB 2.0 full-speed, RS-485, CAN FD at lower speeds) but may attenuate edges in >480 Mbps interfaces. Designers must verify eye diagram margin in their specific layout - the capacitance is fixed and cannot be reduced without changing device family.
What is the recommended PCB layout for optimal ESD performance with the GSOT04C-HE3-08?
For best ESD performance, route protected signal traces directly to pins 1 and 2 with minimal stub length, connect pin 3 to a low-inductance ground plane using multiple vias, and place the GSOT04C-HE3-08 within 5 mm of the connector. Avoid routing other signals under the device; use solid ground beneath the SOT-23 footprint to minimize loop inductance - this reduces clamping voltage overshoot during fast transients.
GSOT04C-HE3-08 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Last Time Buy
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 4V (Max)
- Voltage - Breakdown (Min):
- 5V
- Voltage - Clamping (Max) @ Ipp:
- 14.3V
- Current - Peak Pulse (10/1000µs):
- 30A (8/20µs)
- Power - Peak Pulse:
- 429W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- 310pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-3
GSOT04C-HE3-08 FAQ
1.How can I place an order for GSOT04C-HE3-08 through Aetrix?
Please submit a Request for Quotation (RFQ) for GSOT04C-HE3-08 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for GSOT04C-HE3-08 reliable?
The price and inventory of GSOT04C-HE3-08 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for GSOT04C-HE3-08 is usually 5 days.
3.What payment methods are accepted for GSOT04C-HE3-08?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for GSOT04C-HE3-08 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for GSOT04C-HE3-08?
GSOT04C-HE3-08 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your GSOT04C-HE3-08 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for GSOT04C-HE3-08?
For technical support, including GSOT04C-HE3-08 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your GSOT04C-HE3-08 requirements.
6.How does Aetrix verify that GSOT04C-HE3-08 is sourced from the original manufacturer or authorized distributors?
All GSOT04C-HE3-08 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that GSOT04C-HE3-08 meets industry standards.
7.What is the process for return or replacement of GSOT04C-HE3-08?
All GSOT04C-HE3-08 units undergo pre-shipment inspection (PSI). If there is an issue with GSOT04C-HE3-08, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The GSOT04C-HE3-08 part is unused and in its original packaging.
Return procedure for GSOT04C-HE3-08:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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