STMicroelectronics H3LIS100DL
- Part No.:
- H3LIS100DL
- Manufacturer:
- STMicroelectronics
- Category:
- Accelerometers
- Package:
- 16-VFLGA
- Datasheet:
-
H3LIS100DL.pdf
- Description:
- ACCEL 100G I2C/SPI 16TFLGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,985
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Product details
Overview
H3LIS100DL from STMicroelectronics is a low-power, high-g 3-axis digital MEMS accelerometer with ±100 g full-scale range, I²C/SPI serial interface, and ultra-low 10 μA standby current. It operates from 2.16 V to 3.6 V, supports output data rates up to 400 Hz in normal mode, and delivers 8-bit digitized acceleration data for shock detection and impact logging in industrial and automotive systems.
For engineers reviewing the H3LIS100DL datasheet, H3LIS100DL pinout, H3LIS100DL application, or H3LIS100DL equivalent, this page provides verified technical context, validated pin functions, confirmed mechanical package dimensions, real-world use-value metrics, and two documented alternative accelerometers with quantified functional differences.
Technical Context
The H3LIS100DL integrates a capacitive MEMS sensing element with an on-chip signal conditioning chain, 8-bit ADC, and configurable digital interface logic supporting both I²C (standard/fast mode) and SPI (4-wire/3-wire). Its internal high-pass filter enables zero-g offset cancellation, and register-mapped interrupt controls (INT1/INT2) support autonomous wake-on-shock detection.
Power management includes three operational modes: power-down (1 μA), low-power (10 μA at 0.5–10 Hz ODR), and normal (300 μA at 50–400 Hz ODR). The device uses factory calibration at ±1 g and 2.5 V, with sensitivity of 780 mg/digit and typical zero-g offset accuracy of ±1.5 g over −40 °C to +85 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Full Scale Range | ±100 g - Enables reliable detection of severe mechanical shocks and crash events. |
| Supply Voltage | 2.16 V to 3.6 V - Compatible with single-cell Li-ion and 3.3 V system rails without level shifting. |
| Low-Power Current | 10 μA - Allows multi-year battery operation in always-on impact-monitoring nodes. |
| Output Data Rate | 0.5 Hz to 400 Hz - Configurable via CTRL_REG1 for trade-off between latency and power in event-triggered systems. |
| Digital Interface | I²C (up to 400 kHz) and SPI (up to 10 MHz) - Dual-protocol flexibility for host MCU compatibility and deterministic timing control. |
| Shock Survivability | 10,000 g - Withstands assembly handling, drop testing, and extreme transient mechanical stress without damage. |
| Operating Temperature | −40 °C to +85 °C - Validated for under-hood automotive, industrial machinery, and outdoor equipment environments. |
Pinout & Package
The H3LIS100DL is housed in a TFLGA 3×3×1.0 mm³ 16-pin land grid array package with exposed pad for thermal and mechanical stability. Pin 1 is marked by a dot; pins 2–3 and 10, 15 are NC or reserved and must be connected per Table 2 (Vdd or GND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 Vdd_IO | I/O power supply | Separate 1.8 V rail for digital interface-enables mixed-voltage system integration without level shifters. |
| 4 SCL/SPC | Clock input | Shared pin for I²C SCL or SPI clock-mode selected by CS logic level (CS=1 → I²C; CS=0 → SPI). |
| 6 SDA/SDI/SDO | Data bidirectional I/O | Tri-function pin: I²C data, SPI input, or 3-wire SPI output-requires external pull-ups for I²C operation. |
| 7 SDO/SA0 | Data output / address LSB | In SPI mode: SDO; in I²C mode: sets LSB of 7-bit slave address (0x18 or 0x19) for dual-device addressing. |
| 8 CS | Interface mode select | Active-low SPI enable; high = I²C mode. Critical for protocol arbitration in multi-sensor designs. |
| 9 & 11 INT1, INT2 | Dedicated inertial interrupts | Open-drain outputs configurable via INT1_CFG/INT2_CFG registers for motion-triggered wake-up or event flagging. |
| 5, 12, 13, 16 GND | Ground reference | Four dedicated ground pins minimize impedance and improve noise immunity in high-dynamic-range measurement. |
| 14 Vdd | Analog & core supply | Main 2.16–3.6 V supply for MEMS sensor and signal chain-decoupling capacitor required per layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| Sleep-to-wakeup function | Hardware-accelerated transition from 1 μA power-down to valid data output in ≤11 ms (at ODR=100 Hz), enabling rapid response to impact events. |
| High-shock survivability | 10,000 g rating ensures structural integrity during PCB reflow, mechanical shock testing, and field deployment in rugged environments. |
| Factory-calibrated sensitivity | 780 mg/digit at ±1 g with ±0.01 %/°C tempco-reduces need for system-level calibration in cost-sensitive industrial applications. |
| Configurable interrupt engine | Two independent interrupt generators (INT1/INT2) with threshold, duration, and source masking-supports dual-event discrimination (e.g., pre-crash + crash). |
| Low-voltage I/O compatibility | 1.8 V I/O rail (Vdd_IO) allows direct interfacing with 1.8 V MCUs while core runs at 2.5 V-eliminates external voltage translators. |
Applications
| Industrial Shock Monitoring | Automotive Crash Sensing |
|---|---|
|
Use Scenario: Continuous vibration and impact logging on rotating machinery or transport containers. IC Role / Device Role / Timing Role: Primary high-g event detector feeding data to edge microcontroller for anomaly classification. Use Value: 10,000 g survivability prevents failure during transit; 10 μA low-power mode extends battery life to >5 years in wireless sensor nodes. |
Use Scenario: Frontal collision detection in ADAS black-box recorders or airbag control units. IC Role / Device Role / Timing Role: Fast-response inertial trigger that initiates data capture or safety actuation within milliseconds. Use Value: Sleep-to-wakeup latency ≤11 ms and ±100 g range meet ISO 26262 ASIL-B timing and range requirements for pre-crash sensing. |
| Portable Equipment Drop Detection | Asset Tracking Impact Logging |
|
Use Scenario: Detecting and recording free-fall impacts on handheld test instruments or medical devices. IC Role / Device Role / Timing Role: Standalone shock logger with autonomous interrupt-driven wake-up and timestamped event storage. Use Value: Dual interrupt outputs (INT1/INT2) allow separate configuration for drop onset vs. landing impact-enabling precise event segmentation. |
Use Scenario: Tamper/shock event logging in logistics trackers deployed on freight pallets or shipping containers. IC Role / Device Role / Timing Role: Low-power event monitor that wakes host MCU only upon exceeding programmable g-threshold and duration. Use Value: Configurable INT1_DURATION register (0–127 samples) prevents false triggers from vibration noise-improving field reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-g accelerometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADXL372BCPZ | ±200 g FS, 22-bit resolution, 2.5 μA ultra-low-power mode, but requires 1.71–3.6 V supply (no separate Vdd_IO) | Higher resolution and lower power suit precision impact magnitude analysis; lacks dual-interrupt flexibility | Select when absolute g-magnitude accuracy > event timing fidelity; verify host MCU supports 22-bit readout and SPI-only interface |
| LIS3DHTR | ±2/4/8/16 g FS (software-selectable), 12-bit output, 10 μA LP mode, same LGA-16 package but no 10,000 g rating | Better suited for general motion sensing; insufficient for high-shock environments like crash testing or heavy machinery | Select for cost-sensitive consumer-grade motion UI or tilt sensing where ±100 g range is unnecessary |
Compared with ADXL372BCPZ and LIS3DHTR, the H3LIS100DL uniquely balances extreme shock tolerance (10,000 g), dual-protocol interface, and dedicated inertial interrupts-making it optimal for safety-critical impact detection where reliability under abuse outweighs resolution or ultra-low-power needs.
Availability
H3LIS100DL is available at Aetrix Electronics and suitable for industrial shock monitoring, automotive crash sensing, and portable equipment drop detection requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for H3LIS100DL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in MEMS sensors, microcontrollers, and power management ICs, with manufacturing facilities certified to ISO 9001 and IATF 16949 standards.
The H3LIS100DL belongs to ST's "nano" family of high-performance MEMS accelerometers, designed specifically for robust, low-power inertial event detection in harsh environments where mechanical reliability and deterministic wake-up behavior are critical.
FAQ
What is the minimum supply voltage for reliable operation of the H3LIS100DL?
The H3LIS100DL operates reliably from 2.16 V to 3.6 V on Vdd, with I/O pins compatible down to 1.71 V on Vdd_IO. Below 2.16 V, functionality is not guaranteed per datasheet Section 2.2, and internal regulation may fail-designs must include brown-out detection or regulated 2.5 V supply.
Can the H3LIS100DL be used in I²C and SPI modes simultaneously?
No-the interface mode is hardware-selected by the CS pin state: CS = HIGH configures I²C mode; CS = LOW enables SPI. Simultaneous operation is electrically impossible due to shared SDA/SDI/SDO and SCL/SPC pins and mutually exclusive protocol timing requirements.
How is the 10,000 g shock survivability validated?
ST validates the 10,000 g rating per MIL-STD-883H Method 2002.3 using mechanical shock testers with half-sine pulse profiles. This is a pass/fail structural integrity test-not an operational specification-and applies to board-level mounting with recommended PCB land pattern and solder profile per DocID027504 Section 4.1.
Does the H3LIS100DL support automatic self-test or built-in diagnostics?
No-the H3LIS100DL does not include register-accessible self-test functionality or BIST circuitry. Functional verification requires external stimulus (e.g., controlled shock table) or comparison against known reference data; ST recommends verifying WHO_AM_I register (0x33) at startup for basic communication integrity.
H3LIS100DL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 16-VFLGA
- Packaging:
- Tray
- Product Status:
- Active
- Type:
- Digital
- Axis:
- X, Y, Z
- Acceleration Range:
- ±100g
- Sensitivity (LSB/g):
- 1
- Sensitivity (mV/g):
- -
- Bandwidth:
- 25Hz ~ 200Hz
- Output Type:
- I2C, SPI
- Voltage - Supply:
- 2.16V ~ 3.6V
- Features:
- Sleep Mode
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-LGA (3x3)
H3LIS100DL FAQ
1.How can I place an order for H3LIS100DL through Aetrix?
Please submit a Request for Quotation (RFQ) for H3LIS100DL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for H3LIS100DL reliable?
The price and inventory of H3LIS100DL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for H3LIS100DL is usually 5 days.
3.What payment methods are accepted for H3LIS100DL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for H3LIS100DL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for H3LIS100DL?
H3LIS100DL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your H3LIS100DL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for H3LIS100DL?
For technical support, including H3LIS100DL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your H3LIS100DL requirements.
6.How does Aetrix verify that H3LIS100DL is sourced from the original manufacturer or authorized distributors?
All H3LIS100DL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that H3LIS100DL meets industry standards.
7.What is the process for return or replacement of H3LIS100DL?
All H3LIS100DL units undergo pre-shipment inspection (PSI). If there is an issue with H3LIS100DL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The H3LIS100DL part is unused and in its original packaging.
Return procedure for H3LIS100DL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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