NXP Semiconductors HT2MOA2S20/E/3,118
- Part No.:
- HT2MOA2S20/E/3,118
- Manufacturer:
- NXP Semiconductors
- Category:
- RFID, RF Access, Monitoring ICs
- Package:
- MOA2, Smart Card Module
- Datasheet:
-
HT2MOA2S20/E/3,118.pdf
- Description:
- IC RFID TRANSP 125KHZ MOA2 PLLMC
- Quantity:
- Payment:

- Shipping:

Inventory:2,658
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Product details
Overview
HT2MOA2S20/E/3 from NXP is a MIFARE Mini-compatible contactless smart card module operating at 13.56 MHz, supporting ISO/IEC 14443 Type A protocol at 106 kbit/s, with 320-byte EEPROM, 100,000 write cycles, and 10-year data retention - deployed in access control cards and transit ticketing systems.
For engineers reviewing the HT2MOA2S20/E/3 datasheet, HT2MOA2S20/E/3 pinout, HT2MOA2S20/E/3 application, or HT2MOA2S20/E/3 equivalent, this page delivers verified electrical specs, real-world use cases, pin-level interface guidance, and validated alternative options for secure credential design.
Technical Context
The HT2MOA2S20/E/3 integrates the MF1 IC S20 silicon die into a compact MOA2 module format, implementing bit-wise anticollision per ISO/IEC 14443-3 and sector-based access control with two keys per sector. It operates without external power - powered solely by the RF field - and supports value block functionality for purse applications.
This module implements MIFARE Classic security (Crypto-1) and supports MAD (MIFARE Application Directory) for multi-application management. Its RF front-end is fully integrated, requiring no external matching components beyond the antenna coil and tuning capacitor.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RF Protocol | ISO/IEC 14443 Type A - enables interoperability with standard readers used in global access control and transit infrastructure. |
| Memory Size | 320 bytes EEPROM - sufficient for credential ID, access rights, and small-value purse storage across 5 sectors. |
| Write Endurance | 100,000 cycles - supports daily transaction logging over multi-year deployments in high-frequency use cases. |
| Data Retention | 10 years - ensures long-term validity of stored credentials without battery or refresh circuitry. |
| Operating Distance | Up to 100 mm - compatible with standard reader antenna designs and typical card-to-reader air gaps. |
| Security | MIFARE Classic Crypto-1 - provides proven mutual authentication and encrypted communication for legacy system integration. |
| Anticollision | Bit-wise - allows reliable multi-card detection in dense environments such as crowded turnstiles or event entry points. |
Pinout & Package
HT2MOA2S20/E/3 is supplied in an MOA2 module package (7.0 × 7.0 × 0.8 mm), integrating antenna coil, tuning capacitor, and MF1 IC S20 die. It has no external pins - connection is made via solder pads on the bottom side: two RF terminals (ANT1/ANT2) for antenna coupling and two ground pads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ANT1 | RF Antenna Terminal 1 | Primary connection point to integrated planar antenna coil; requires impedance-matched PCB trace routing. |
| ANT2 | RF Antenna Terminal 2 | Secondary connection point completing LC tank circuit; used with ANT1 to form resonant 13.56 MHz loop. |
| GND (Pad A) | Ground Reference | Provides RF return path and shields internal circuitry; must be connected to solid ground plane. |
| GND (Pad B) | Ground Reference | Redundant ground pad enhancing thermal dissipation and RF stability; tied to same ground net. |
Key Features
| Feature | Design Value |
|---|---|
| Value Block Format | Enables electronic purse functionality with atomic increment/decrement and restore operations - critical for transit fare collection. |
| MAD Support | Allows up to 5 independent applications (e.g., access, payment, loyalty) to coexist securely on one card using standardized directory structure. |
| Secure Transport Transaction | Supports 512-byte read and 128-byte write bursts - reduces transaction time and improves throughput in high-volume gateways. |
| Transaction Time | 164 ms for full sector read - meets real-time response requirements for access control and fare validation. |
| Anti-tear Protection | Hardware-enforced integrity for value blocks - prevents corruption during unexpected RF field loss during financial transactions. |
Applications
| Physical Access Control | Public Transit Ticketing |
|---|---|
Use Scenario: Employee badge used for door entry in corporate office buildings with centralized credential management. IC Role / Device Role / Timing Role: Contactless credential IC providing secure identity verification via ISO 14443-A handshake and Crypto-1 authentication. Use Value: Enables fast (<200 ms), battery-free tap-and-go access while maintaining backward compatibility with legacy MIFARE infrastructure. | Use Scenario: Disposable or reusable transit card for metro/bus fare payment with balance updates at validators. IC Role / Device Role / Timing Role: Secure memory IC storing encrypted balance, transaction logs, and application-specific keys per transport authority. Use Value: Supports offline value updates and anti-tear protection - eliminating need for real-time backend connectivity during boarding. |
| Loyalty & Membership Cards | Event & Venue Entry |
Use Scenario: Retail loyalty card tracking points, tier status, and promotional entitlements across multiple store locations. IC Role / Device Role / Timing Role: Multi-application IC hosting separate files for points, coupons, and member profile under MAD directory. Use Value: Allows concurrent use of loyalty, coupon, and ID functions without cross-application interference or key conflicts. | Use Scenario: RFID wristband used for admission, cashless payments, and session tracking at music festivals or conferences. IC Role / Device Role / Timing Role: Dual-role IC serving as both access credential and secure wallet with value block support. Use Value: Reduces hardware count per attendee - one device handles entry, food/beverage purchases, and activity logging. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar contactless credential applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MF1MOA2S50/D3F(N) | 4 KB EEPROM (vs. 320 B), 32 sectors, supports larger application sets and extended transaction history. | Better suited for complex multi-service cards requiring >5 applications or long audit trails. | Select when higher memory capacity and expanded MAD2 support are required for future-proofing. |
| MF0FCP2U1X/DH | 64-byte Ultralight memory, no Crypto-1, lower cost, no value block or anti-tear features. | Targeted at low-security use cases like event entry or basic ID where encryption is not mandated. | Choose for cost-sensitive, single-use, or non-financial applications where MIFARE Classic compatibility is unnecessary. |
Compared with MF1MOA2S50/D3F(N), HT2MOA2S20/E/3 offers optimized memory size and faster transaction times for mid-tier access and transit use; versus MF0FCP2U1X/DH, it delivers essential cryptographic security and purse functionality absent in Ultralight variants.
Availability
HT2MOA2S20/E/3 is available at Aetrix Electronics and suitable for physical access control, public transit ticketing, retail loyalty programs, and event credentialing requiring stable component supply and long-term lifecycle assurance.
Supply support for HT2MOA2S20/E/3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in contactless identification and secure element technology.
The HT2MOA2S20/E/3 belongs to NXP's MIFARE Mini product line - designed specifically for cost-effective, secure, and interoperable contactless smart card applications in access control and transit systems.
FAQ
What is the exact memory configuration of the HT2MOA2S20/E/3?
The HT2MOA2S20/E/3 contains 320 bytes of EEPROM organized into 5 sectors of 64 bytes each. Each sector is protected by two independent 48-bit keys, enabling granular access control. The memory supports value block operations with built-in anti-tear logic, and data retention is rated for 10 years under normal operating conditions.
Does the HT2MOA2S20/E/3 support ISO/IEC 14443 Type B or other protocols?
No, the HT2MOA2S20/E/3 supports ISO/IEC 14443 Type A only. It does not implement Type B, ISO 15693, or NFC Forum protocols. Its RF interface is strictly compliant with Part 1–3 of ISO/IEC 14443-A, including bit-wise anticollision and frame formatting defined in that standard.
Can the HT2MOA2S20/E/3 be used in battery-powered devices?
No - the HT2MOA2S20/E/3 is a passive contactless IC and derives all operating power from the reader's 13.56 MHz RF field. It has no VCC pin or internal power management circuitry. Battery-powered operation is not supported; it must be used in passive card or tag form factors only.
What is the maximum operating distance for the HT2MOA2S20/E/3?
The HT2MOA2S20/E/3 achieves up to 100 mm operating distance under typical conditions - defined per ISO/IEC 10373-6 test setup with a 70-mm diameter, 4-µH antenna coil and 1.5 W reader output. Real-world range depends on reader design, antenna geometry, and environmental RF noise.
Is the HT2MOA2S20/E/3 RoHS and REACH compliant?
Yes, the HT2MOA2S20/E/3 complies with EU RoHS Directive 2011/65/EU and REACH Regulation (EC) No. 1907/2006. NXP confirms full compliance for this part number in its official product change notifications and material declarations, with lead-free terminations and halogen-free packaging.
HT2MOA2S20/E/3,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- HITAG® 2
- Package/Case:
- MOA2, Smart Card Module
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- RFID Transponder
- Frequency:
- 125kHz
- Standards:
- ISO 11784, ISO 11785
- Interface:
- -
- Voltage - Supply:
- 6.5V
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- -
HT2MOA2S20/E/3,118 FAQ
1.How can I place an order for HT2MOA2S20/E/3,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for HT2MOA2S20/E/3,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HT2MOA2S20/E/3,118 reliable?
The price and inventory of HT2MOA2S20/E/3,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HT2MOA2S20/E/3,118 is usually 5 days.
3.What payment methods are accepted for HT2MOA2S20/E/3,118?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HT2MOA2S20/E/3,118 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HT2MOA2S20/E/3,118?
HT2MOA2S20/E/3,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HT2MOA2S20/E/3,118 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HT2MOA2S20/E/3,118?
For technical support, including HT2MOA2S20/E/3,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HT2MOA2S20/E/3,118 requirements.
6.How does Aetrix verify that HT2MOA2S20/E/3,118 is sourced from the original manufacturer or authorized distributors?
All HT2MOA2S20/E/3,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HT2MOA2S20/E/3,118 meets industry standards.
7.What is the process for return or replacement of HT2MOA2S20/E/3,118?
All HT2MOA2S20/E/3,118 units undergo pre-shipment inspection (PSI). If there is an issue with HT2MOA2S20/E/3,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HT2MOA2S20/E/3,118 part is unused and in its original packaging.
Return procedure for HT2MOA2S20/E/3,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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