NXP Semiconductors IP4059CX5/LF,135
- Part No.:
- IP4059CX5/LF,135
- Manufacturer:
- NXP Semiconductors
- Category:
- TVS Diodes
- Package:
- 5-UFBGA, WLCSP
- Datasheet:
-
IP4059CX5/LF,135.pdf
- Description:
- TVS DIODE 5.5VWM 5CSP
- Quantity:
- Payment:

- Shipping:

Inventory:3,794
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Product details
Overview
The IP4059CX5/LF,135 from NXP Semiconductors is a monolithic ESD protection diode array designed for USB 2.0 and USB OTG interfaces, featuring four rail-to-rail ultra-low-capacitance diodes (Cd = 3.0 pF typ), ±8 kV IEC 61000-4-2 contact ESD rating, and WLCSP5 package (0.96 × 1.34 mm, 0.5 mm pitch) for space-constrained mobile I/O protection.
For engineers reviewing the IP4059CX5/LF,135 datasheet, IP4059CX5/LF,135 pinout, IP4059CX5/LF,135 application, or IP4059CX5/LF,135 equivalent, this device serves as a compact, RoHS-compliant ESD solution for high-speed differential data lines (D+, D−), VBUS, GND, and ID pins in portable USB host/peripheral designs requiring minimal signal distortion and robust transient immunity.
Technical Context
The IP4059CX5/LF,135 integrates four bidirectional ESD protection diodes in a single wafer-level chip-scale package, each configured for rail-to-rail clamping between I/O and supply/ground rails. It supports full USB 2.0 signaling integrity with 3.0 pF typical capacitance per channel and operates across −40 °C to +85 °C ambient temperature.
Its pin configuration maps directly to USB 2.0/OTG interface signals: A1 = D−, C1 = D+, B1 = GND, A2 = VBUS, C2 = ID. The device withstands ≥200 pulses of ±15 kV contact discharge per IEC 61000-4-2 and complies with Level 4 ESD immunity (±8 kV contact, ±15 kV air).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD Rating | ±8 kV contact / ±15 kV air per IEC 61000-4-2 - ensures compliance with industrial and consumer USB port immunity requirements |
| Diode Capacitance | 3.0 pF typ at 1 MHz - preserves signal integrity on USB 2.0 high-speed (480 Mbps) differential pairs |
| Breakdown Voltage | 6–9 V - provides safe clamping margin above 5 V VBUS while protecting 3.3 V logic rails |
| Forward Voltage | 0.7 V - enables low-voltage clamping without forward conduction during normal operation |
| Package | WLCSP5 (2-1-2 bump layout, 0.5 mm pitch) - enables direct placement under USB connectors with minimal PCB footprint (0.96 × 1.34 mm) |
| Operating Temp | −40 °C to +85 °C - supports deployment in handheld and peripheral devices across commercial environments |
Pinout & Package
IP4059CX5/LF,135 uses a 5-bump Wafer-Level Chip-Scale Package (WLCSP5) with 2-1-2 bump arrangement, measuring 0.96 mm × 1.34 mm and 0.5 mm pitch. Solder bumps face downward; index area located at corner A1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1 | D− | USB 2.0 differential data negative line - protected by dedicated low-Cd ESD diode to GND/VBUS rails |
| C1 | D+ | USB 2.0 differential data positive line - matched capacitance and clamping to A1 for common-mode noise rejection |
| B1 | GND | System ground reference - low-inductance connection critical for effective ESD current shunting |
| A2 | VBUS | 5 V power line input - protected against overvoltage transients and reverse polarity events |
| C2 | ID | USB OTG identification pin - enables role switching detection while maintaining ESD robustness |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail ESD protection | Four integrated diodes clamp each I/O to both VBUS and GND, enabling bidirectional transient suppression without external biasing |
| Ultra-low 3.0 pF capacitance | Minimizes signal attenuation and timing skew on USB 2.0 high-speed differential channels (up to 480 Mbps) |
| WLCSP5 footprint | 0.96 × 1.34 mm body with 0.5 mm pitch allows placement directly beneath micro-USB connectors, reducing trace length and parasitic inductance |
| Pb-free & Halogen-free | RoHS-compliant and Dark Green certified - meets global environmental regulations without compromising ESD performance |
Applications
| Mobile Handset USB Interface | PC Peripheral Port Protection |
|---|---|
Use Scenario: Protecting micro-USB receptacles in smartphones and tablets against repeated plug/unplug ESD events and cable-induced transients. IC Role / Device Role / Timing Role: ESD transient suppressor on D+, D−, ID, VBUS, and GND lines - placed immediately adjacent to the connector to minimize loop inductance. Use Value: Prevents latch-up and permanent damage to USB PHY controllers while maintaining <3.0 pF loading for full-speed and high-speed signaling compliance. | Use Scenario: Securing downstream USB ports on docking stations, keyboards, and external HDD enclosures exposed to user-handling ESD. IC Role / Device Role / Timing Role: Integrated rail-to-rail protection array eliminating need for discrete diodes and saving >1.5 mm² PCB area per port. Use Value: Enables single-component protection for all five USB 2.0/OTG signals, reducing BOM count and assembly cost versus discrete solutions. |
| Digital Camera Data Link | Wireless LAN Device Interface |
Use Scenario: Safeguarding USB-based image transfer and charging circuits in compact digital cameras and camcorders. IC Role / Device Role / Timing Role: Low-capacitance ESD clamp on high-speed D+/D− lines - co-located with USB connector to preserve eye diagram integrity. Use Value: Maintains signal fidelity for burst-mode data transfers up to 480 Mbps while surviving >200 ±15 kV contact discharges per IEC 61000-4-2. | Use Scenario: Protecting USB interfaces on Wi-Fi/Bluetooth dongles and access point modules subject to field-deployed ESD stress. IC Role / Device Role / Timing Role: Compact ESD guard for dual-role USB OTG connections (host/peripheral) including ID pin sensing functionality. Use Value: Supports reliable OTG role negotiation and data exchange by protecting all five essential USB signals in one ultra-small package. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD2E001DRYR | 2-channel, 0.55 pF per line, ±8 kV contact, SOT-5X3 package (1.45 × 1.2 mm) | Lower capacitance but only protects D+/D−; no VBUS, ID, or GND terminals integrated | Select when only differential pair protection is required and board space permits larger footprint |
| SP1002-01WTG | 5-line, 0.35 pF typ, ±12 kV contact, SOD-523 package (1.2 × 0.8 mm) | Higher ESD rating but larger 5-pin discrete layout; requires external routing for VBUS/ID/GND | Choose for extreme ESD environments where 0.35 pF is mandatory and WLCSP assembly capability is unavailable |
Compared with TPD2E001DRYR and SP1002-01WTG, the IP4059CX5/LF,135 delivers full 5-signal USB 2.0/OTG protection in the smallest possible footprint (0.96 × 1.34 mm), with balanced 3.0 pF loading optimized for high-speed signal integrity and system-level ESD compliance - making it ideal for space-constrained mobile designs requiring complete interface hardening.
Availability
IP4059CX5/LF,135 is available at Aetrix Electronics and suitable for mobile handset design, PC peripheral development, and wireless data module production requiring stable component supply and long-term manufacturability.
Supply support for IP4059CX5/LF,135 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer electronics.
The IP4059CX5/LF,135 belongs to NXP's ESD protection portfolio targeting high-speed serial interfaces, engineered specifically to meet USB 2.0/OTG signal integrity and IEC 61000-4-2 Level 4 immunity requirements in miniaturized portable systems.
FAQ
What is the primary function of the IP4059CX5/LF,135 in a USB 2.0 interface?
The IP4059CX5/LF,135 functions as an integrated ESD protection array for all five essential USB 2.0/OTG signals - D+, D−, VBUS, GND, and ID - using ultra-low-capacitance (3.0 pF typ) rail-to-rail diodes to suppress transients up to ±8 kV contact discharge without degrading signal integrity. Its WLCSP5 package enables direct placement at the connector for optimal protection efficacy.
Does the IP4059CX5/LF,135 support USB On-The-Go (OTG) functionality?
Yes, the IP4059CX5/LF,135 explicitly supports USB OTG by including dedicated protection for the ID pin (pin C2) alongside D+, D−, VBUS, and GND. This enables robust ESD hardening of dual-role OTG ports while preserving the voltage-level detection required for host/peripheral role negotiation - confirmed in NXP's product data sheet Rev. 1 (2011).
What is the maximum operating temperature range for the IP4059CX5/LF,135?
The IP4059CX5/LF,135 is rated for ambient operating temperatures from −40 °C to +85 °C, as specified in Table 3 (Limiting Values) of its official NXP product data sheet. This range supports reliable operation in commercial-grade portable electronics, including smartphones, digital cameras, and wireless peripherals.
Can the IP4059CX5/LF,135 be used for Ethernet or DVI interface protection?
No - although the general description mentions Ethernet and DVI as example interfaces, the IP4059CX5/LF,135's pinout (A1=D−, C1=D+, A2=VBUS, C2=ID, B1=GND) and electrical characteristics (e.g., 3.0 pF capacitance, 6–9 V breakdown) are specifically optimized for USB 2.0/OTG signal levels and topology. Its pin assignment does not map to Ethernet MDI or DVI TMDS lanes, and no validation data for those interfaces is provided in the datasheet.
Is the IP4059CX5/LF,135 compatible with lead-free reflow processes?
Yes, the IP4059CX5/LF,135 is qualified for Pb-free soldering with a peak reflow temperature of up to 260 °C (10 s max), as documented in Table 3 and Figure 2 of the NXP product data sheet. It withstands at least three reflow cycles using the recommended SnAgCu solder profile, and its WLCSP5 package is designed for compatibility with standard microvia PCB assembly practices.
IP4059CX5/LF,135 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 5-UFBGA, WLCSP
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Steering (Rail to Rail)
- Unidirectional Channels:
- 3
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5.5V
- Voltage - Breakdown (Min):
- 6V
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- Yes
- Applications:
- Ethernet, USB OTG
- Capacitance @ Frequency:
- 3pF @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-CSP (1.33x0.96)
IP4059CX5/LF,135 FAQ
1.How can I place an order for IP4059CX5/LF,135 through Aetrix?
Please submit a Request for Quotation (RFQ) for IP4059CX5/LF,135 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for IP4059CX5/LF,135 reliable?
The price and inventory of IP4059CX5/LF,135 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for IP4059CX5/LF,135 is usually 5 days.
3.What payment methods are accepted for IP4059CX5/LF,135?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for IP4059CX5/LF,135 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for IP4059CX5/LF,135?
IP4059CX5/LF,135 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your IP4059CX5/LF,135 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for IP4059CX5/LF,135?
For technical support, including IP4059CX5/LF,135 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your IP4059CX5/LF,135 requirements.
6.How does Aetrix verify that IP4059CX5/LF,135 is sourced from the original manufacturer or authorized distributors?
All IP4059CX5/LF,135 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that IP4059CX5/LF,135 meets industry standards.
7.What is the process for return or replacement of IP4059CX5/LF,135?
All IP4059CX5/LF,135 units undergo pre-shipment inspection (PSI). If there is an issue with IP4059CX5/LF,135, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The IP4059CX5/LF,135 part is unused and in its original packaging.
Return procedure for IP4059CX5/LF,135:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
IP4059CX5/LF,135 Tags

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onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

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D5V0H1B2LP-7B
Diodes Incorporated

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D5V0P1B2LP-7B
Diodes Incorporated

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DESD5V0U1BA-7
Diodes Incorporated

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ESD5Z5.0T1G
onsemi

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DESD5V0U1BB-7
Diodes Incorporated

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D12V0L1B2LP-7B
Diodes Incorporated

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PESD2V0Y1BSFYL
Nexperia USA Inc.

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DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

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D5V0L1B2WS-7
Diodes Incorporated
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