Infineon Technologies IPD90N04S402ATMA1

Overview

IPD90N04S402ATMA1 from Infineon Technologies is an AEC-Q101-qualified N-channel enhancement-mode MOSFET in PG-TO252-3-313 package, rated for 40 V V_DS, 90 A continuous drain current at T_C = 25 °C, and 2.4 mΩ max R_DS(on) at V_GS = 10 V. It operates up to 175 °C junction temperature and is 100% avalanche tested for automotive motor control and DC-DC converter primary-side switching.

For engineers reviewing the IPD90N04S402ATMA1 datasheet, IPD90N04S402ATMA1 pinout, IPD90N04S402ATMA1 application, or IPD90N04S402ATMA1 equivalent, key selection criteria include its 1.0 K/W R_thJC, 91–118 nC total gate charge, integrated body diode with 53 ns t_rr, and MSL1 reflow compatibility - all critical for high-reliability 12 V/24 V automotive power stages.

Technical Context

This OptiMOS®-T2 device uses trench-gate superjunction technology optimized for low conduction and switching losses in unidirectional high-current DC applications. Its gate threshold voltage (2.0–4.0 V) ensures robust noise immunity while enabling direct drive from standard 3.3 V or 5 V logic controllers when used with appropriate gate drivers.

The MOSFET integrates a fast-recovery body diode (t_rr = 53 ns, Q_rr = 65 nC) and supports hard-switched operation with 475 mJ single-pulse avalanche energy at I_D = 45 A. Thermal design is enabled by its low R_thJC of 1.0 K/W and defined PCB cooling requirements (6 cm² copper area on FR4).

Key Specifications

Pinout & Package

IPD90N04S402ATMA1 is housed in PG-TO252-3-313 (D-Pak), a surface-mount package with exposed drain pad for thermal performance. The three terminals are arranged in standard D-Pak configuration: Pin 1 = Gate, Pin 2 = Drain (tab), Pin 3 = Source.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel automotive MOSFET applications.

Compared with STL220N4LF8AG and IRF7470PBF, IPD90N04S402ATMA1 delivers optimal balance of automotive qualification, thermal efficiency (1.0 K/W R_thJC), and proven avalanche ruggedness in a standard D-Pak footprint - making it preferred for space-constrained, high-reliability 12 V/24 V power stages.

Availability

IPD90N04S402ATMA1 is available at Aetrix Electronics and suitable for automotive motor control, DC-DC converter primary switching, LED lighting drivers, and start-stop system load switching requiring stable component supply across production lifecycles.

Supply support for IPD90N04S402ATMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive electronics, and security solutions, with global R&D and manufacturing infrastructure.

This device belongs to the OptiMOS®-T2 product line, engineered specifically for high-efficiency, high-reliability power conversion in automotive 12 V/24 V systems - emphasizing low R_DS(on), robust avalanche capability, and AEC-Q101 compliance.

FAQ

What is the maximum allowable gate-source voltage for IPD90N04S402ATMA1?

The absolute maximum gate-source voltage is ±20 V. Operation beyond this range risks permanent gate oxide damage. Recommended drive is 10 V for full enhancement, with minimum 6 V to ensure reliable turn-on across temperature and process variation. Gate resistors should be selected to limit dV/dt-induced shoot-through in half-bridge configurations.

Does IPD90N04S402ATMA1 require a gate driver IC in automotive applications?

Yes - while the gate threshold is compatible with 3.3 V/5 V logic, the 91–118 nC total gate charge necessitates a dedicated gate driver (e.g., Infineon 1EDN7512B) to achieve fast, low-loss switching at >100 kHz. Direct MCU GPIO drive is insufficient for thermally constrained layouts or high-frequency operation.

How is the 100% avalanche test performed on this MOSFET?

Each unit undergoes a single-pulse avalanche test at I_AS = 90 A, V_DD = 25 V, and T_j = 25 °C, verifying E_AS ≥ 475 mJ without parametric shift. Test duration is limited to prevent thermal runaway, and devices failing post-test leakage or R_DS(on) drift are rejected.

Can IPD90N04S402ATMA1 be paralleled for higher current handling?

Yes - its positive temperature coefficient of R_DS(on) (increases with T_j) enables inherent current sharing. Successful paralleling requires matched gate drive impedance, symmetrical PCB layout, and shared thermal plane. Derating to 80% of aggregate current rating is recommended for long-term reliability.