Infineon Technologies IPL65R115CFD7AUMA1

Overview

IPL65R115CFD7AUMA1 from Infineon is a 650 V superjunction MOSFET in ThinPAK 8x8 (PG-VSON-4) package, featuring ultra-fast body diode, 115 mΩ max R_DS(on), 41 nC typical gate charge, and 1300 A/µs diode commutation speed. It serves as a primary switching device in high-efficiency resonant topologies including LLC and phase-shift full-bridge (ZVS) converters for server power supplies, telecom rectifiers, EV charging stations, and solar inverters.

For engineers reviewing the IPL65R115CFD7AUMA1 datasheet, IPL65R115CFD7AUMA1 pinout, IPL65R115CFD7AUMA1 application, or IPL65R115CFD7AUMA1 equivalent, key selection criteria include hard commutation ruggedness (1300 A/µs diF/dt), low temperature coefficient of R_DS(on), E_oss of 5.8 µJ at 400 V, and JEDEC industrial qualification with T_j up to 150 °C.

Technical Context

This CoolMOS™ CFD7 device employs charge compensation technology with integrated fast-recovery body diode and on-chip ESD protection. Its optimized cell structure delivers reduced switching losses and minimal R_DS(on) drift over temperature-0.115 Ω max at 150 °C-enabling stable operation under high bus voltage transients and light-load ZVS conditions.

The MOSFET supports soft-switching operation via low effective output capacitance (Co(er) = 73 pF, Co(tr) = 751 pF) and precise gate drive timing (t_d(on) = 16 ns, t_f = 3 ns). Gate plateau voltage is fixed at 5.7 V, ensuring predictable turn-on behavior across temperature and load variations in high-frequency (>100 kHz) SMPS designs.

Key Specifications

Pinout & Package

Package: PG-VSON-4 (ThinPAK 8x8), surface-mount, drain-connected exposed pad. Pin 1: Gate; Pin 2: Driver Source; Pin 3 & 4: Source (common); Drain is bottom-side thermal pad (non-leaded).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage resonant switching applications.

Compared with IPW65R099CFD7 and IPP65R115CFD7, IPL65R115CFD7AUMA1 offers optimal balance of low-profile SMD packaging, industry-leading diF/dt capability, and proven ZVS performance-making it the preferred choice for space-constrained, high-reliability resonant converters where thermal management and board area are critical.

Availability

IPL65R115CFD7AUMA1 is available at Aetrix Electronics and suitable for server power supplies, telecom rectifiers, and EV on-board chargers requiring stable component supply, JEDEC-qualified industrial reliability, and consistent parametric performance across production lots.

Supply support for IPL65R115CFD7AUMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power semiconductors, microcontrollers, and sensor solutions for industrial, automotive, and renewable energy markets.

This device belongs to the CoolMOS™ CFD7 superjunction MOSFET product line, engineered specifically for high-efficiency, high-power-density resonant converters operating above 100 kHz with stringent hard commutation and thermal cycling requirements.

FAQ

What is the function of Pin 2 (Driver Source) versus Pins 3 and 4 (Source)?

Pin 2 is the dedicated driver return path for the gate driver IC, electrically isolated from the main source terminals (Pins 3 and 4) to prevent ground bounce and ensure clean switching. Connecting Pin 2 to Pins 3/4 violates the internal layout and causes malfunction-designs must route separate low-inductance paths for driver return and power return.

Can IPL65R115CFD7AUMA1 replace older CFD2-series MOSFETs directly?

Yes, it is a direct successor to IPL65R115CFD2 with identical pinout, voltage rating, and R_DS(on) spec, but delivers 15% lower E_oss, 20% faster diF/dt, and improved light-load efficiency. No layout change is needed, though gate resistor tuning may optimize switching speed due to reduced Q_g dispersion.

Why does the datasheet specify "source and sense source pins are not exchangeable"?

Because Pin 2 (Driver Source) connects internally to a separate sense FET structure that monitors gate drive integrity-not to the main channel. Swapping it with Pins 3/4 disrupts the gate driver feedback loop, causing erratic turn-on, shoot-through risk, and potential device failure under load. This is a hard functional constraint, not a recommendation.

Is this MOSFET suitable for hard-switched PFC stages?

No-it is optimized for soft-switching topologies (LLC, PSFB) where its ultra-fast body diode and low E_oss deliver maximum benefit. In hard-switched boost PFC, its higher Q_gd/Q_g ratio and lack of optimized body diode softness increase switching loss and EMI; dedicated PFC MOSFETs like IPA60R190P7X are better suited.