Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Vishay Siliconix IRFS9N60ATRR

Name: IRFS9N60ATRR
Brand: Vishay Siliconix
SKU: IRFS9N60ATRR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: IRFS9N60ATRR

Manufacturer:: Vishay Siliconix

Category:: FETs, MOSFETs

Package:: TO-263-3, D2PAK (2 Leads + Tab), TO-263AB

Datasheet:: IRFS9N60ATRR.pdf

Description:: MOSFET N-CH 600V 9.2A D2PAK

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:9,111

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

IRFS9N60ATRR from Vishay Siliconix is a 600 V, 9.2 A N-channel power MOSFET in D2PAK (TO-263) package, featuring R_DS(on) = 0.75 Ω at V_GS = 10 V, Q_g = 49 nC, and 290 mJ single-pulse avalanche energy - designed for high-voltage switching in offline SMPS main switch and active-clamped forward topologies.

For engineers reviewing the IRFS9N60ATRR datasheet, IRFS9N60ATRR pinout, IRFS9N60ATRR application, or IRFS9N60ATRR equivalent, key selection criteria include its 600 V blocking rating, 0.75 Ω on-resistance at 10 V gate drive, 49 nC total gate charge, robust 290 mJ unclamped inductive switching capability, and D2PAK thermal performance with R_thJC = 0.75 °C/W.

Technical Context

This device employs a planar high-voltage TrenchFET® process to achieve stable 600 V V_DS rating with low R_DS(on) and controlled Q_gd/Q_gs ratio (20 nC / 13 nC), supporting reliable hard-switching in 300–480 V DC bus applications. Its body diode exhibits t_rr = 530–800 ns and Q_rr = 3.0–4.4 μC under 100 A/μs dI/dt, enabling moderate-frequency synchronous rectification support.

The IRFS9N60ATRR is characterized for repetitive avalanche (I_AR = 9.2 A, E_AR = 17 mJ) and specified for peak dV/dt immunity of 5.0 V/ns, with gate threshold voltage V_GS(th) tightly bounded between 2.0 V and 4.0 V - ensuring consistent turn-on behavior across temperature and manufacturing lot.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	600 V - supports 480 V DC bus designs with 25 % safety margin in offline SMPS.
R_DS(on) @ V_GS = 10 V	0.75 Ω - enables <1.5 W conduction loss at 9.2 A continuous drain current.
Q_g	49 nC - determines gate driver power requirement and switching speed in 100–500 kHz converters.
E_AS	290 mJ - allows safe operation under unclamped inductive switching events without external snubbers.
R_thJC	0.75 °C/W - permits 170 W power dissipation at T_C = 25 °C with minimal heatsink interface resistance.
t_rr (body diode)	530–800 ns - defines minimum dead-time requirements in half-bridge configurations.
V_GS(th)	2.0–4.0 V - ensures reliable enhancement-mode turn-on with standard 10 V gate drivers and noise margin.

Pinout & Package

D2PAK (TO-263) package with exposed drain pad on bottom side for thermal conduction; 3-pin configuration (G, D, S) with G and S on leadframe, D soldered to PCB thermal pad.

Pin/Terminal	Circuit Role	Design Meaning
G (Gate)	Control terminal	Receives 10 V logic-level signal; requires ≤49 nC charge for full enhancement; input resistance 0.5–3.2 Ω.
D (Drain)	High-side power output	Connected to HV DC bus (up to 600 V); electrically and thermally tied to exposed backside metal pad.
S (Source)	Power return / reference node	Serves as local ground reference for gate drive; carries full load current (9.2 A continuous) and body diode reverse recovery current.

Key Features

Feature	Design Value
Low Q_g (49 nC)	Reduces gate driver power loss and simplifies drive circuit design for 100–300 kHz SMPS.
Enhanced avalanche ruggedness (E_AS = 290 mJ)	Eliminates need for external clamping circuits in flyback and forward converter primary switches.
Characterized C_oss eff. = 96 pF	Enables accurate soft-switching timing analysis and ZVS transition prediction in resonant topologies.
Specified dV/dt immunity (5.0 V/ns)	Prevents false turn-on during fast transient voltage spikes in high-di/dt power stages.
RoHS-compliant, halogen-free construction	Meets IPC-J-STD-609A Class 1 moisture sensitivity and JEDEC MSL Level 1 requirements.

Applications

Server PSU Main Switch	Industrial UPS Inverter Stage
Use Scenario: Primary-side switch in 3.3 kW telecom rectifier with 380–400 V DC bus and 100 kHz fixed-frequency hard-switched forward converter. IC Role / Device Role / Timing Role: High-side N-channel power switch controlling energy transfer from bulk capacitor to transformer primary. Use Value: 0.75 Ω R_DS(on) limits conduction loss to <1.5 W; 290 mJ E_AS withstands startup surges without failure.	Use Scenario: Half-bridge leg in 5 kVA online UPS inverter delivering 230 VAC output from 750 V DC bus. IC Role / Device Role / Timing Role: Low-side switching element handling bidirectional current flow and body diode commutation. Use Value: 530–800 ns t_rr and 3.0–4.4 μC Q_rr enable predictable dead-time control; 5.0 V/ns dV/dt rating prevents spurious turn-on during bus transients.
EV Charger PFC Boost Switch	Medical Imaging Power Supply
Use Scenario: Boost switch in 6 kW active PFC front-end operating at 65 kHz with 400 V AC input. IC Role / Device Role / Timing Role: Unidirectional high-voltage switch shaping input current waveform via duty-cycle modulation. Use Value: 600 V V_DS rating accommodates 30 % overvoltage margin on 560 V PFC output; Q_g = 49 nC supports efficient gate driving at 65 kHz.	Use Scenario: Isolated DC-DC converter primary switch in MRI gradient amplifier supply requiring >15-year reliability and zero field failures. IC Role / Device Role / Timing Role: Critical safety-critical power switch in redundant 48 V to ±150 V isolated converter stage. Use Value: Fully characterized avalanche parameters (E_AS, I_AR) and 150 °C T_J(max) ensure fail-safe operation under fault conditions per IEC 62368-1.

Server PSU Main Switch

Industrial UPS Inverter Stage

Use Scenario: Primary-side switch in 3.3 kW telecom rectifier with 380–400 V DC bus and 100 kHz fixed-frequency hard-switched forward converter.

IC Role / Device Role / Timing Role: High-side N-channel power switch controlling energy transfer from bulk capacitor to transformer primary.

Use Value: 0.75 Ω R_DS(on) limits conduction loss to <1.5 W; 290 mJ E_AS withstands startup surges without failure.

Use Scenario: Half-bridge leg in 5 kVA online UPS inverter delivering 230 VAC output from 750 V DC bus.

IC Role / Device Role / Timing Role: Low-side switching element handling bidirectional current flow and body diode commutation.

Use Value: 530–800 ns t_rr and 3.0–4.4 μC Q_rr enable predictable dead-time control; 5.0 V/ns dV/dt rating prevents spurious turn-on during bus transients.

EV Charger PFC Boost Switch

Medical Imaging Power Supply

Use Scenario: Boost switch in 6 kW active PFC front-end operating at 65 kHz with 400 V AC input.

IC Role / Device Role / Timing Role: Unidirectional high-voltage switch shaping input current waveform via duty-cycle modulation.

Use Value: 600 V V_DS rating accommodates 30 % overvoltage margin on 560 V PFC output; Q_g = 49 nC supports efficient gate driving at 65 kHz.

Use Scenario: Isolated DC-DC converter primary switch in MRI gradient amplifier supply requiring >15-year reliability and zero field failures.

IC Role / Device Role / Timing Role: Critical safety-critical power switch in redundant 48 V to ±150 V isolated converter stage.

Use Value: Fully characterized avalanche parameters (E_AS, I_AR) and 150 °C T_J(max) ensure fail-safe operation under fault conditions per IEC 62368-1.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage power MOSFET applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
STP9NK60ZFP	R_DS(on) = 0.75 Ω (same), but Q_g = 52 nC and E_AS = 220 mJ; TO-220FP package (higher R_thJC = 1.2 °C/W).	Limited to lower-power (<1.2 kW) SMPS due to thermal constraints; unsuitable for high-duty-cycle UPS inverters.	Acceptable where board space permits TO-220FP and peak power is <1.5 kW.
IXFH9N60P	R_DS(on) = 0.72 Ω, Q_g = 45 nC, E_AS = 270 mJ; TO-247 package with R_thJC = 0.55 °C/W.	Better thermal performance but larger footprint; higher cost; not drop-in compatible with D2PAK layout.	Preferred for >2.5 kW designs needing lower junction temperature rise, if mechanical redesign is feasible.

Compared with STP9NK60ZFP and IXFH9N60P, the IRFS9N60ATRR delivers identical on-resistance and superior avalanche energy (290 mJ vs. 220/270 mJ) in a surface-mount D2PAK package optimized for automated assembly and thermal pad integration - making it the preferred choice for mid-power industrial SMPS where layout density and reliability under surge stress are critical.

Availability

IRFS9N60ATRR is available at Aetrix Electronics and suitable for switch mode power supplies, uninterruptible power systems, and high-speed power switching applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant manufacturing.

Supply support for IRFS9N60ATRR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-reliability MOSFETs, diodes, and optoelectronics for demanding industrial, automotive, and computing applications.

The IRFS9N60ATRR belongs to Vishay's high-voltage TrenchFET® power MOSFET family, engineered for robustness in offline AC-DC conversion, UPS, and motor drive applications where avalanche capability and thermal stability are essential.

FAQ

What is the maximum continuous drain current rating for IRFS9N60ATRR at 100 °C case temperature?

The IRFS9N60ATRR has a maximum continuous drain current (I_D) of 5.8 A at T_C = 100 °C, derated linearly from 9.2 A at 25 °C using a 1.3 W/°C derating factor. This value reflects real thermal limits under sustained conduction and must be validated against actual PCB copper area and heatsinking in the target application. The IRFS9N60ATRR datasheet specifies this rating in absolute maximum ratings table under "Continuous Drain Current".

Does IRFS9N60ATRR support logic-level gate drive?

No, the IRFS9N60ATRR is not a logic-level MOSFET; its gate threshold voltage (V_GS(th)) ranges from 2.0 V to 4.0 V, and it is fully enhanced only at V_GS = 10 V, where R_DS(on) = 0.75 Ω is guaranteed. Driving the IRFS9N60ATRR with 5 V logic will result in incomplete turn-on and excessive conduction losses. The IRFS9N60ATRR requires a dedicated 10 V gate driver stage for optimal performance.

What is the body diode reverse recovery charge (Q_rr) specification for IRFS9N60ATRR?

The IRFS9N60ATRR body diode has a reverse recovery charge (Q_rr) of 3.0–4.4 μC, measured at T_J = 25 °C, I_F = 9.2 A, and dI/dt = 100 A/μs. This parameter directly impacts switching losses and EMI in half-bridge and synchronous rectifier configurations. The IRFS9N60ATRR datasheet lists Q_rr in the "Drain-Source Body Diode Characteristics" section under specifications.

Is IRFS9N60ATRR suitable for use in avalanche-mode operation?

Yes, the IRFS9N60ATRR is fully characterized for repetitive avalanche operation, with rated repetitive avalanche current (I_AR) = 9.2 A and repetitive avalanche energy (E_AR) = 17 mJ. It also supports single-pulse avalanche up to 290 mJ. These values are verified per JEDEC standards and documented in the IRFS9N60ATRR datasheet's Absolute Maximum Ratings and Avalanche sections.

What is the thermal resistance from junction to case (R_thJC) for IRFS9N60ATRR?

The IRFS9N60ATRR has a maximum junction-to-case (drain) thermal resistance (R_thJC) of 0.75 °C/W, measured from the silicon die to the exposed drain pad. This value assumes proper soldering of the thermal pad to a minimum 1.0 cm² copper area on the PCB. The IRFS9N60ATRR thermal performance is validated in Vishay's package reliability reports and reflected in the "Thermal Resistance Ratings" table of its datasheet.

IRFS9N60ATRR Specifications

Product attributes: Attribute value

Manufacturer:: Vishay Siliconix

Series:: -

Package/Case:: TO-263-3, D2PAK (2 Leads + Tab), TO-263AB

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 600 V

Current - Continuous Drain (Id) @ 25°C:: 9.2A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: 10V

Rds On (Max) @ Id, Vgs:: 750mOhm @ 5.5A, 10V

Vgs(th) (Max) @ Id:: 4V @ 250µA

Gate Charge (Qg) (Max) @ Vgs:: 49 nC @ 10 V

Vgs (Max):: ±30V

Input Capacitance (Ciss) (Max) @ Vds:: 1400 pF @ 25 V

FET Feature:: -

Power Dissipation (Max):: 170W (Tc)

Operating Temperature:: -55°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: TO-263 (D2PAK)

IRFS9N60ATRR FAQ

1.How can I place an order for IRFS9N60ATRR through Aetrix?

Please submit a Request for Quotation (RFQ) for IRFS9N60ATRR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for IRFS9N60ATRR reliable?

The price and inventory of IRFS9N60ATRR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for IRFS9N60ATRR is usually 5 days.

3.What payment methods are accepted for IRFS9N60ATRR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for IRFS9N60ATRR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for IRFS9N60ATRR?

IRFS9N60ATRR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your IRFS9N60ATRR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for IRFS9N60ATRR?

For technical support, including IRFS9N60ATRR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your IRFS9N60ATRR requirements.

6.How does Aetrix verify that IRFS9N60ATRR is sourced from the original manufacturer or authorized distributors?

All IRFS9N60ATRR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that IRFS9N60ATRR meets industry standards.

7.What is the process for return or replacement of IRFS9N60ATRR?

All IRFS9N60ATRR units undergo pre-shipment inspection (PSI). If there is an issue with IRFS9N60ATRR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The IRFS9N60ATRR part is unused and in its original packaging.

Return procedure for IRFS9N60ATRR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-11 Comparator Circuit: Voltage Thresholds, Op-Amp Differences, LM393 and Practical Design

Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.

2026-09-10 Schmitt Trigger Explained: Hysteresis, Circuits, Inverters and Applications

Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …