My Inquiry
My Account
Microchip Technology JAN1N6143AUS/TR
- Part No.:
- JAN1N6143AUS/TR
- Manufacturer:
- Microchip Technology
- Category:
- TVS Diodes
- Package:
- SQ-MELF, C
- Datasheet:
-
JAN1N6143AUS/TR.pdf
- Description:
- BI-DIRECTIONAL TVS
- Quantity:
- Payment:
- Shipping:
Inventory:3,107
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
JAN1N6143AUS/TR from Microsemi is a voidless hermetically sealed surface-mount bidirectional Transient Voltage Suppressor (TVS) qualified to MIL-PRF-19500/516 at JAN level, with 8.4 V working standoff voltage (VWM), 10.45 V minimum breakdown voltage (V(BR)) at 125 mA, and 15.6 V clamping voltage (VC) at 96.2 A peak pulse current (IPP) for 10/1000 µs waveform - deployed in avionics power rail protection.
For engineers reviewing the JAN1N6143AUS/TR datasheet, JAN1N6143AUS/TR pinout, JAN1N6143AUS/TR application, or JAN1N6143AUS/TR equivalent, key selection criteria include military-grade reliability certification, hard-glass hermetic package integrity, 1500 W peak pulse power rating, and bidirectional ESD/EFT/IEC61000-4-5 secondary lightning surge suppression capability.
Technical Context
This TVS operates bidirectionally without polarity marking and uses internal Category 1 metallurgical bonds within a voidless hard-glass construction to ensure survivability under high-energy transients. Its 1500 W peak pulse power (10/1000 µs) and 15.6 V clamping voltage at 96.2 A IPP enable robust protection of sensitive downstream circuitry against fast-rising surges.
The device exhibits a temperature coefficient of breakdown voltage (αV(BR)) of 0.07 %/°C and maintains stable performance across –55 °C to +175 °C junction temperature range. Standby leakage current is limited to 20 µA at 8.4 V VWM, supporting low-power system monitoring integrity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VWM | 8.4 V - maximum continuous reverse/forward voltage before conduction begins; sets operating margin for protected line. |
| V(BR) min | 10.45 V @ 125 mA - guaranteed breakdown onset threshold; ensures predictable turn-on during overvoltage events. |
| VC @ IPP | 15.6 V @ 96.2 A - clamped voltage during 10/1000 µs surge; defines worst-case stress on downstream ICs. |
| PPP | 1500 W - peak transient energy absorption capacity; enables compliance with IEC61000-4-5 Level 3/4 surge immunity. |
| ID @ VWM | 20 µA - ultra-low leakage at rated standoff; preserves signal integrity and battery life in always-on systems. |
| TJ Range | –55 °C to +175 °C - extended thermal envelope supports operation in harsh military/aerospace environments. |
| RθJEC | 5.0 °C/W - junction-to-end-cap thermal resistance; enables direct thermal path to PCB copper or heatsink. |
Pinout & Package
Package: SQ-MELF (C-package variant), hermetically sealed voidless hard glass with tungsten slugs and tin/lead-plated copper terminals; weight ≈ 1100 mg; dimensions per Microsemi T4-LDS-0278-1 Rev. 2 (Page 7).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode/Cathode (bidirectional) | Surge current path | No polarity marking - symmetric conduction allows placement without orientation check; both ends serve as interchangeable surge entry points. |
| End Cap (both ends) | Thermal & mechanical interface | Direct thermal conduction path to PCB pad; tungsten slug enables RθJEC = 5.0 °C/W and mechanical stability under thermal cycling. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional TVS architecture | Enables single-device protection of AC-coupled or floating lines without polarity constraints or external diode pairing. |
| Voidless hermetic glass seal | Eliminates moisture ingress and internal delamination risk - critical for long-term reliability in sealed military enclosures. |
| Category 1 metallurgical bonds | Guarantees bond integrity under shock/vibration per MIL-STD-883; prevents interfacial failure during repeated surge events. |
| MIL-PRF-19500/516 JAN qualification | Validates manufacturing process control, screening, and test rigor required for mission-critical defense electronics programs. |
Applications
| Avionics Power Distribution | Ground Vehicle ECUs |
|---|---|
Use Scenario: Protection of 28 V DC bus inputs in flight control computers exposed to load dump and induced lightning transients. IC Role / Device Role / Timing Role: Primary bidirectional surge clamp on main power rail; absorbs >1500 W transient energy without degradation. Use Value: Prevents latch-up or burnout of upstream DC-DC controllers by limiting clamped voltage to 15.6 V during 96.2 A surges. | Use Scenario: Input protection for engine control units subjected to ISO 7637-2 Pulse 5a (load dump) and EFT bursts. IC Role / Device Role / Timing Role: Standoff-rated TVS placed directly at connector entry point to shunt surge energy before filtering stages. Use Value: Maintains 8.4 V VWM margin above nominal 24 V system while delivering sub-16 V clamping under 10/1000 µs threats. |
| Satellite Payload Interfaces | Tactical Radio Front-Ends |
Use Scenario: Signal line protection on RS-422/485 interfaces between payload modules in radiation-hardened LEO platforms. IC Role / Device Role / Timing Role: Bidirectional clamping element on differential pairs; leverages inherent radiation hardness per MicroNote 050. Use Value: Survives total ionizing dose (TID) >100 krad(Si) while maintaining 20 µA leakage and 15.6 V VC performance. | Use Scenario: RF front-end antenna port protection in manpack radios exposed to ESD (IEC61000-4-2 ±15 kV contact) and EFT (IEC61000-4-4 ±2 kV). IC Role / Device Role / Timing Role: First-line transient suppressor before bandpass filters and LNAs; handles fast-rising ESD with <1 ns response. Use Value: Limits coupled ESD voltage to <16 V, preserving LNA input stage integrity without adding insertion loss or capacitance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| JANTX1N6143AUS/TR | Same electrical specs but JANTX-level screening per MIL-PRF-19500/516; higher burn-in and environmental test rigor. | Required for programs specifying JANTX reliability level; not suitable where JAN-level qualification suffices. | Select when program spec mandates JANTX screening; otherwise JAN1N6143AUS/TR meets baseline military surge protection needs. |
| 1N6143AUS/TR | Commercial-grade version; identical electrical parameters but no MIL-PRF-19500/516 qualification or screening. | Applicable only in non-military industrial systems where reliability requirements do not mandate military screening. | Choose for cost-sensitive commercial designs where hermetic packaging and 1500 W PPP remain essential, but MIL qualification is unnecessary. |
Compared with JANTX1N6143AUS/TR and 1N6143AUS/TR, JAN1N6143AUS/TR delivers certified JAN-level reliability at lower cost than JANTX while maintaining full hermeticity and surge performance - making it optimal for defense subsystems requiring verified ruggedness without full JANTX overhead.
Availability
JAN1N6143AUS/TR is available at Aetrix Electronics and suitable for avionics power distribution, ground vehicle ECUs, satellite payload interfaces, and tactical radio front-ends requiring stable component supply across extended product lifecycles.
Supply support for JAN1N6143AUS/TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microsemi Corporation (now part of Microchip Technology) is a U.S.-based semiconductor company specializing in high-reliability analog and mixed-signal ICs, RF solutions, and radiation-hardened components for aerospace, defense, and industrial markets.
The JAN1N6143AUS/TR belongs to Microsemi's legacy MIL-qualified TVS family designed specifically for mission-critical surge protection in environments where failure is unacceptable - emphasizing hermeticity, surge endurance, and military screening compliance.
FAQ
What is the clamping voltage of JAN1N6143AUS/TR and how is it measured?
The clamping voltage (VC) of JAN1N6143AUS/TR is 15.6 V, measured at 96.2 A peak pulse current (IPP) under the standardized 10/1000 µs double-exponential surge waveform. This value represents the maximum voltage that appears across the device during a transient event and directly determines the stress imposed on downstream circuitry. The specification is validated per MIL-PRF-19500/516 test methods and confirmed in the Electrical Characteristics table of the official JAN1N6143AUS/TR datasheet.
Is JAN1N6143AUS/TR RoHS compliant?
No, JAN1N6143AUS/TR is not RoHS compliant. Per the manufacturer's documentation, RoHS-compliant matte-tin terminations are available only on commercial-grade versions (e.g., 1N6143AUS/TR), not on JAN-level qualified parts. JAN1N6143AUS/TR uses standard tin/lead plating per MIL-PRF-19500/516 requirements, which permits lead content for enhanced solderability and reliability in high-reliability applications.
What does the "A" suffix in JAN1N6143AUS/TR signify?
The "A" suffix in JAN1N6143AUS/TR indicates standard voltage tolerance: ±5% on V(BR), ±5% on VC, and ±5% on IPP relative to non-A variants. Non-A parts (e.g., JAN1N6143US/TR) have 5% higher clamping voltage, 5% lower minimum breakdown voltage, and 5% lower peak pulse current - making the "A" version the preferred choice for tighter parametric control in precision surge protection designs.
Can JAN1N6143AUS/TR be used in place of JAN1N6142AUS/TR or JAN1N6144AUS/TR?
JAN1N6143AUS/TR is not a direct replacement for JAN1N6142AUS/TR (VWM = 7.6 V) or JAN1N6144AUS/TR (VWM = 9.1 V), as its 8.4 V working standoff voltage falls between them. Substitution requires verifying that 8.4 V VWM provides sufficient margin above system operating voltage and that 15.6 V VC remains compatible with downstream device absolute maximum ratings. No pin-to-pin or functional equivalence is claimed across this voltage series.
What is the thermal resistance and how does it affect PCB layout for JAN1N6143AUS/TR?
JAN1N6143AUS/TR has a junction-to-end-cap thermal resistance (RθJEC) of 5.0 °C/W, meaning each watt of dissipated surge energy raises the junction temperature by 5 °C above end-cap temperature. To maximize surge handling, PCB pads must provide low-thermal-resistance paths - typically achieved using ≥2 oz copper, thermal vias under end caps, and connection to internal ground/power planes. Layout must avoid narrow traces that impede heat transfer from either end cap.
JAN1N6143AUS/TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- SQ-MELF, C
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 8.4V
- Voltage - Breakdown (Min):
- 10.45V
- Voltage - Clamping (Max) @ Ipp:
- 15.6V
- Current - Peak Pulse (10/1000µs):
- 96.2A
- Power - Peak Pulse:
- 1500W (1.5kW)
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- Military
- Qualification:
- MIL-PRF-19500/516
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- C, SQ-MELF
JAN1N6143AUS/TR FAQ
1.How can I place an order for JAN1N6143AUS/TR through Aetrix?
Please submit a Request for Quotation (RFQ) for JAN1N6143AUS/TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for JAN1N6143AUS/TR reliable?
The price and inventory of JAN1N6143AUS/TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for JAN1N6143AUS/TR is usually 5 days.
3.What payment methods are accepted for JAN1N6143AUS/TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for JAN1N6143AUS/TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for JAN1N6143AUS/TR?
JAN1N6143AUS/TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your JAN1N6143AUS/TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for JAN1N6143AUS/TR?
For technical support, including JAN1N6143AUS/TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your JAN1N6143AUS/TR requirements.
6.How does Aetrix verify that JAN1N6143AUS/TR is sourced from the original manufacturer or authorized distributors?
All JAN1N6143AUS/TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that JAN1N6143AUS/TR meets industry standards.
7.What is the process for return or replacement of JAN1N6143AUS/TR?
All JAN1N6143AUS/TR units undergo pre-shipment inspection (PSI). If there is an issue with JAN1N6143AUS/TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The JAN1N6143AUS/TR part is unused and in its original packaging.
Return procedure for JAN1N6143AUS/TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
JAN1N6143AUS/TR Tags
-
ESD9B5.0ST5G
onsemi
-
DESD3V3E1BL-7B
Diodes Incorporated
-
ESD5Z3.3T1G
onsemi
-
D5V0H1B2LP-7B
Diodes Incorporated
-
D5V0P1B2LP-7B
Diodes Incorporated
-
DESD5V0U1BA-7
Diodes Incorporated
-
ESD5Z5.0T1G
onsemi
-
DESD5V0U1BB-7
Diodes Incorporated
-
D12V0L1B2LP-7B
Diodes Incorporated
-
PESD2V0Y1BSFYL
Nexperia USA Inc.
-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage
-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
