Microchip Technology JAN1N6147AUS/TR
- Part No.:
- JAN1N6147AUS/TR
- Manufacturer:
- Microchip Technology
- Category:
- TVS Diodes
- Package:
- SQ-MELF, C
- Datasheet:
-
JAN1N6147AUS/TR.pdf
- Description:
- BI-DIRECTIONAL TVS
- Quantity:
- Payment:

- Shipping:

Inventory:5,330
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
JAN1N6147AUS/TR from Microsemi is a voidless hermetically sealed surface-mount bidirectional Transient Voltage Suppressor (TVS) qualified to MIL-PRF-19500/516 at JAN level, with 12.2 V working standoff voltage (VWM), 15.20 V minimum breakdown voltage (V(BR)) at 75 mA, and 22.3 V clamping voltage (VC) at 67.3 A peak pulse current (IPP) for 10/1000 µs waveform - deployed in high-reliability military power rail protection.
For engineers reviewing the JAN1N6147AUS/TR datasheet, JAN1N6147AUS/TR pinout, JAN1N6147AUS/TR application, or JAN1N6147AUS/TR equivalent, this part delivers verified 1500 W peak pulse power, Category 1 metallurgical bonds, triple-layer passivation, RoHS-compliant tin/lead terminals (e3), and SQ-MELF "C" package compatibility for ruggedized ESD/EFT/IEC61000-4-5 secondary lightning protection.
Technical Context
This TVS operates bidirectionally with no polarity marking and exhibits linear thermal derating above 150 °C junction temperature, maintaining clamping integrity across -55 °C to +175 °C operating range. Its hard-glass construction and tungsten slug terminations ensure mechanical robustness under shock/vibration stress.
The device meets IEC61000-4-2 (ESD), IEC61000-4-4 (EFT), and select IEC61000-4-5 surge levels, with non-sensitive ESD behavior per MIL-STD-750 Method 1020 and inherent radiation hardness documented in MicroNote 050.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VWM | 12.2 V - Maximum continuous DC or repetitive peak voltage applied without triggering conduction. |
| V(BR) min | 15.20 V @ 75 mA - Confirmed breakdown threshold ensuring predictable turn-on during transients. |
| VC @ IPP | 22.3 V @ 67.3 A - Clamped voltage during 10/1000 µs surge, limiting downstream IC stress. |
| PPP | 1500 W - Peak pulse power handling capability for MIL-STD-1275/DO-160 transient suppression. |
| TJ Range | -55 °C to +175 °C - Full military temperature operation without parameter drift or bond failure. |
| RθJEC | 5.0 °C/W - Low thermal resistance from junction to end cap enables efficient heat dissipation in compact layouts. |
| αV(BR) | 0.08 %/°C - Predictable breakdown voltage shift over temperature for stable clamping design margin. |
Pinout & Package
Package: SQ-MELF "C" - hermetically sealed voidless hard glass case with tungsten slugs and tin/lead-plated copper terminals; weight ≈ 1100 mg; dimensions per Microsemi T4-LDS-0278-1 Rev. 2 (Page 7).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode/Cathode (bidirectional) | Transient current path | No polarity marking - symmetric conduction allows placement without orientation check on PCB. |
| End Cap (both ends) | Thermal & electrical interface | Direct thermal path to PCB pad; tungsten slugs enable low RθJEC of 5.0 °C/W for sustained surge duty. |
Key Features
| Feature | Design Value |
|---|---|
| Voidless hermetic seal | Prevents moisture ingress and internal corrosion over 20+ year field life in humid/marine environments. |
| Category 1 metallurgical bonds | Guarantees bond integrity under thermal cycling (-55 °C ↔ +175 °C) and mechanical shock per MIL-STD-883. |
| Triple-layer passivation | Enhances surface insulation resistance >10¹² Ω and prevents leakage current drift in high-humidity operation. |
| MIL-PRF-19500/516 qualification | JAN-level screening includes burn-in, temperature cycling, and lot acceptance testing for zero-defect reliability. |
| SQ-MELF "C" package | Enables automated pick-and-place with square-end-cap terminals; compatible with standard EIA-481-B tape & reel. |
Applications
| Aerospace Power Distribution | Military Vehicle ECUs |
|---|---|
Use Scenario: Protection of 12 V DC bus against load dump and alternator switching transients in UAV avionics. IC Role / Device Role / Timing Role: Bidirectional TVS clamping transient energy before it reaches DC-DC converters and FPGAs. Use Value: Withstands 1500 W surges while holding clamped voltage ≤22.3 V, preserving 15 V-rated input stages. |
Use Scenario: Input rail protection for engine control units exposed to ISO 7637-2 Pulse 5a/b in tracked vehicle platforms. IC Role / Device Role / Timing Role: Standoff-rated TVS absorbing multi-kV spikes without degradation across 10,000+ cycles. Use Value: Maintains 12.2 V VWM and 22.3 V VC stability after 1000x 10/1000 µs pulses, enabling deterministic BOM lifetime. |
| Naval Communication Radios | Satellite Power Conditioning |
Use Scenario: Surge suppression on RF front-end bias lines subject to lightning-induced coupling in shipboard HF radios. IC Role / Device Role / Timing Role: Fast-response TVS shunting induced common-mode surges on 12–24 V supply rails. Use Value: 67.3 A IPP rating handles IEC61000-4-5 Level 4 (4 kV) surges with <1 ns response time and no parameter shift. |
Use Scenario: Protection of point-of-load regulators feeding radiation-hardened ASICs in LEO satellite power systems. IC Role / Device Role / Timing Role: Radiation-tolerant TVS suppressing single-event transients without latch-up or parametric drift. Use Value: Inherent radiation hardness per MicroNote 050 eliminates need for shielding or redundancy overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| JAN1N6146AUS/TR | 11.4 V VWM, 14.25 V V(BR) min, 21.0 V VC @ 71.4 A - lower clamping voltage but reduced standoff margin. | Better for 12 V systems requiring tighter clamping; less margin against sustained overvoltage conditions. | Select when system VMAX ≤ 13.5 V and clamping headroom is prioritized over long-term overvoltage tolerance. |
| JAN1N6148AUS/TR | 13.7 V VWM, 17.10 V V(BR) min, 25.1 V VC @ 59.8 A - higher standoff but elevated clamping voltage. | Suitable for 15 V nominal rails where higher VWM prevents false triggering during ripple or startup overshoot. | Choose for 15 V systems with ≥2 V design margin to VC; trades peak current capacity for improved steady-state noise immunity. |
Compared with JAN1N6147AUS/TR, JAN1N6146AUS/TR offers lower clamping at the cost of reduced VWM margin, while JAN1N6148AUS/TR increases VWM headroom but raises VC by 2.8 V - making JAN1N6147AUS/TR the optimal balance for 12 V military subsystems requiring both reliable turn-on and controlled clamping.
Availability
JAN1N6147AUS/TR is available at Aetrix Electronics and suitable for aerospace power distribution, military vehicle ECUs, naval communication radios, and satellite power conditioning requiring stable component supply across extended lifecycle programs.
Supply support for JAN1N6147AUS/TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microsemi Corporation (now part of Microchip Technology) designs high-reliability analog and mixed-signal semiconductors for aerospace, defense, and industrial markets, with emphasis on radiation-hardened, high-temperature, and MIL-spec components.
JAN1N6147AUS/TR belongs to Microsemi's legacy MIL-qualified TVS family engineered specifically for mission-critical transient suppression in harsh-environment electronics where failure is not an option.
FAQ
What is the maximum clamping voltage of JAN1N6147AUS/TR under a 10/1000 µs surge?
The JAN1N6147AUS/TR has a maximum clamping voltage (VC) of 22.3 V when subjected to its rated peak pulse current of 67.3 A for a 10/1000 µs waveform. This value is measured per MIL-PRF-19500/516 test conditions and ensures downstream circuitry remains within safe operating limits during standardized surge events. The JAN1N6147AUS/TR maintains this clamping performance across its full -55 °C to +175 °C operating range.
Is JAN1N6147AUS/TR compliant with RoHS requirements?
JAN1N6147AUS/TR is not RoHS compliant, as indicated by the absence of the "e3" suffix in its nomenclature. RoHS-compliant versions (matte-tin plating) are available only for commercial-grade variants of this family, not for JAN-level qualified parts like JAN1N6147AUS/TR. The JAN1N6147AUS/TR uses traditional tin/lead plating per MIL-PRF-19500/516 requirements.
What does the "A" in JAN1N6147AUS/TR signify?
The "A" suffix in JAN1N6147AUS/TR denotes the standard voltage tolerance version: it specifies tighter control over key parameters including minimum breakdown voltage (V(BR)), clamping voltage (VC), and peak pulse current (IPP), compared to non-A variants which have ±5% relaxed tolerances. This ensures consistent transient response across production lots of JAN1N6147AUS/TR.
Can JAN1N6147AUS/TR be used in place of JAN1N6147US/TR?
No - JAN1N6147AUS/TR and JAN1N6147US/TR are not interchangeable. The "A" suffix in JAN1N6147AUS/TR indicates standard voltage tolerance, whereas JAN1N6147US/TR (without "A") has 5% higher VC, 5% lower minimum V(BR), and 5% lower IPP. Substituting them would compromise clamping accuracy and surge current capability in designs relying on JAN1N6147AUS/TR's certified parameters.
What is the thermal resistance from junction to end cap for JAN1N6147AUS/TR?
The thermal resistance from junction to end cap (RθJEC) for JAN1N6147AUS/TR is 5.0 °C/W, as specified in the Microsemi T4-LDS-0278-1 datasheet. This low value results from tungsten slug construction and direct end-cap thermal paths, enabling efficient heat transfer to the PCB during repeated surge events. It supports reliable operation up to 175 °C junction temperature when properly mounted.
JAN1N6147AUS/TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- SQ-MELF, C
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 12.2V
- Voltage - Breakdown (Min):
- 15.2V
- Voltage - Clamping (Max) @ Ipp:
- 22.3V
- Current - Peak Pulse (10/1000µs):
- 67.3A
- Power - Peak Pulse:
- 1500W (1.5kW)
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- Military
- Qualification:
- MIL-PRF-19500/516
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- C, SQ-MELF
JAN1N6147AUS/TR FAQ
1.How can I place an order for JAN1N6147AUS/TR through Aetrix?
Please submit a Request for Quotation (RFQ) for JAN1N6147AUS/TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for JAN1N6147AUS/TR reliable?
The price and inventory of JAN1N6147AUS/TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for JAN1N6147AUS/TR is usually 5 days.
3.What payment methods are accepted for JAN1N6147AUS/TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for JAN1N6147AUS/TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for JAN1N6147AUS/TR?
JAN1N6147AUS/TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your JAN1N6147AUS/TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for JAN1N6147AUS/TR?
For technical support, including JAN1N6147AUS/TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your JAN1N6147AUS/TR requirements.
6.How does Aetrix verify that JAN1N6147AUS/TR is sourced from the original manufacturer or authorized distributors?
All JAN1N6147AUS/TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that JAN1N6147AUS/TR meets industry standards.
7.What is the process for return or replacement of JAN1N6147AUS/TR?
All JAN1N6147AUS/TR units undergo pre-shipment inspection (PSI). If there is an issue with JAN1N6147AUS/TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The JAN1N6147AUS/TR part is unused and in its original packaging.
Return procedure for JAN1N6147AUS/TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
JAN1N6147AUS/TR Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

