Microchip Technology JAN1N6157US/TR
- Part No.:
- JAN1N6157US/TR
- Manufacturer:
- Microchip Technology
- Category:
- TVS Diodes
- Package:
- SQ-MELF, C
- Datasheet:
-
JAN1N6157US/TR.pdf
- Description:
- BI-DIRECTIONAL TVS
- Quantity:
- Payment:

- Shipping:

Inventory:5,643
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Product details
Overview
JAN1N6157US/TR from Microsemi is a military-qualified, voidless hermetically sealed bidirectional Transient Voltage Suppressor (TVS) in SQ-MELF package, rated for 1500 W peak pulse power (10/1000 µs), 32.7 V working standoff voltage (VWM), and 59.1 V clamping voltage (VC) at 25.4 A peak pulse current - deployed in avionics power bus protection and radar front-end surge suppression.
For engineers reviewing the JAN1N6157US/TR datasheet, JAN1N6157US/TR pinout, JAN1N6157US/TR application, or JAN1N6157US/TR equivalent, key selection criteria include MIL-PRF-19500/516 qualification level (JAN), bidirectional clamping symmetry, glass-body thermal resistance (5.0 °C/W), and IEC61000-4-5 lightning secondary-effect compliance.
Technical Context
This device operates as a bidirectional avalanche diode with no polarity marking, delivering symmetrical transient clamping in both directions. Its hard-glass construction uses internal Category 1 metallurgical bonds and triple-layer passivation to ensure reliability under thermal cycling and radiation exposure per MicroNote 050.
It is specified for operation across –55 °C to +175 °C junction temperature, with linear derating of off-state power above 150 °C at end-cap (TEC). Clamping performance is validated for 10/1000 µs waveform per MIL-STD-750 Method 3013.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VWM | 32.7 V - maximum continuous reverse/forward voltage before breakdown; sets system operating margin below clamping threshold |
| VC @ IPP | 59.1 V at 25.4 A - clamped voltage during 10/1000 µs surge; defines worst-case overvoltage seen by downstream circuitry |
| PPP | 1500 W - peak pulse power handling capability; enables protection against high-energy transients like lightning-induced surges |
| IPP | 25.4 A - maximum non-repetitive surge current; determines minimum series impedance required for safe energy dissipation |
| TJ/TSTG | –55 °C to +175 °C - extended temperature range supports deployment in engine bay, space-grade, and missile guidance electronics |
| RθJEC | 5.0 °C/W - low thermal resistance from junction to end cap; allows direct heat sinking via PCB copper or mounting surface |
Pinout & Package
SQ-MELF (Square-End-Cap Metal Electrode Leadless Face) package: hermetically sealed voidless hard glass body with tungsten slugs and tin/lead-plated copper terminals; no polarity marking; weight ≈1100 mg; dimensions per Microsemi T4-LDS-0278-1 Rev. 2 (Page 7).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode/Cathode (bidirectional) | Common terminal pair | Both ends function identically as symmetrical avalanche junctions; no DC bias dependency; enables placement without orientation check |
| End Cap (both ends) | Thermal & electrical interface | Directly contacts PCB pad or heatsink; primary path for surge energy dissipation and thermal conduction to ambient |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional clamping | Enables single-device protection of AC-coupled or floating signal/power lines without polarity constraints |
| Category 1 metallurgical bonds | Guarantees bond integrity under mechanical shock, vibration, and thermal stress per MIL-PRF-19500/516 |
| Voidless hermetic seal | Prevents moisture ingress and long-term parameter drift in humid or vacuum environments (e.g., space launch systems) |
| IEC61000-4-5 compliance | Validated for protection against lightning-induced surges up to Level 3 (2 kV line-to-ground, 1 kV line-to-line) |
Applications
| Avionics Power Bus Protection | Radar Front-End Surge Suppression |
|---|---|
Use Scenario: Protecting 28 V DC aircraft power distribution networks from load dump and inductive switching transients. IC Role / Device Role / Timing Role: Bidirectional TVS placed across bus rails to clamp positive/negative spikes exceeding 32.7 V. Use Value: Limits rail overvoltage to ≤59.1 V during 1500 W surges, preventing damage to flight control computers and sensor interfaces. | Use Scenario: Shielding RF receiver inputs in airborne radar systems from ESD and antenna-coupled lightning surges. IC Role / Device Role / Timing Role: Low-capacitance TVS mounted directly at SMA connector feedthrough to suppress fast transients before LNA input. Use Value: Maintains signal integrity while absorbing >25 A surges with <1 ns response time, preserving receiver sensitivity. |
| Military Vehicle Electronics | Spacecraft Power Conditioning |
Use Scenario: Safeguarding engine control units and CAN bus nodes in tracked vehicles exposed to EMP and alternator ripple. IC Role / Device Role / Timing Role: TVS installed on 12 V/24 V supply lines upstream of DC-DC converters and microcontrollers. Use Value: Withstands repeated 10/1000 µs pulses up to 1500 W without degradation, meeting MIL-STD-1275B requirements. | Use Scenario: Protecting solar array regulator inputs in LEO satellites subject to single-event burnout and total ionizing dose. IC Role / Device Role / Timing Role: Radiation-hardened TVS used in redundant power paths to clamp transients induced by plasma arcing. Use Value: Inherent radiation tolerance (per MicroNote 050) and –55 °C to +175 °C operation enable unattended 15-year mission life. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| JANTXV1N6157US | Same electrical specs but JANTXV reliability level (enhanced screening, tighter parametric limits) | Required for programs demanding higher confidence in burn-in, life test, and lot acceptance testing | Select when full MIL-PRF-19500/516 JANTXV qualification is mandated by system spec |
| 1N6157AUS | Commercial-grade version; same VWM, VC, and PPP but no MIL qualification or radiation hardness data | Suitable only for non-mission-critical industrial or test equipment where cost and lead time outweigh reliability needs | Choose for prototyping or commercial derivatives where JAN-level traceability is not required |
Compared with JANTXV1N6157US and 1N6157AUS, the JAN1N6157US/TR provides verified JAN-level screening and hermeticity for aerospace deployments, while offering identical clamping performance - making it the baseline qualified part for defense prime BOMs requiring MIL-PRF-19500/516 compliance without JANTXV cost premium.
Availability
JAN1N6157US/TR is available at Aetrix Electronics and suitable for avionics power bus protection, radar front-end surge suppression, and military vehicle electronics requiring stable component supply with full traceability and MIL-qualified sourcing.
Supply support for JAN1N6157US/TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microsemi Corporation (now part of Microchip Technology) designs high-reliability analog and mixed-signal semiconductors for aerospace, defense, and industrial markets, with emphasis on radiation-hardened, high-temperature, and MIL-spec components.
The 1N6138AUS–1N6173AUS family delivers military-qualified transient suppression for mission-critical platforms where failure is unacceptable - engineered specifically for survivability in extreme thermal, radiation, and surge environments.
FAQ
What is the clamping voltage of JAN1N6157US/TR at its rated peak pulse current?
The JAN1N6157US/TR has a maximum clamping voltage (VC) of 59.1 V at 25.4 A peak pulse current (IPP) for a 10/1000 µs waveform. This value is measured per MIL-STD-750 Method 3013 and defines the upper voltage limit imposed on protected circuits during surge events. The JAN1N6157US/TR maintains this clamping performance across its full operating temperature range.
Is JAN1N6157US/TR RoHS compliant?
No, JAN1N6157US/TR is not RoHS compliant. Per Microsemi T4-LDS-0278-1 Rev. 2, RoHS-compliant matte-tin terminations are available only on commercial-grade versions (e.g., 1N6157AUS). The JAN1N6157US/TR uses standard tin/lead plating to meet MIL-PRF-19500/516 solderability and reliability requirements.
What does the "TR" suffix indicate in JAN1N6157US/TR?
The "TR" suffix in JAN1N6157US/TR denotes tape-and-reel packaging per EIA-481-B standard. It confirms the part is supplied in automated assembly-ready format with standardized carrier tape, cover tape, and reel dimensions - essential for SMT production of high-reliability boards using JAN1N6157US/TR.
How does JAN1N6157US/TR differ from the non-"A" version (e.g., JAN1N6157US)?
The "A" in JAN1N6157US/TR indicates tighter voltage tolerances: minimum breakdown voltage (VBR) is 40.9 V, versus 5% lower for non-A versions. Non-A parts also exhibit 5% higher clamping voltage (VC) and 5% lower peak pulse current (IPP). The JAN1N6157US/TR therefore offers more precise and robust surge response than JAN1N6157US.
Can JAN1N6157US/TR be used in space applications?
Yes, JAN1N6157US/TR is suitable for space applications due to its inherent radiation hardness (documented in Microsemi MicroNote 050), hermetic glass package, and operation from –55 °C to +175 °C. It has been deployed in LEO satellite power conditioning where single-event effects and total ionizing dose must be mitigated - provided system-level radiation testing validates the full design using JAN1N6157US/TR.
JAN1N6157US/TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- SQ-MELF, C
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 32.7V
- Voltage - Breakdown (Min):
- 40.9V
- Voltage - Clamping (Max) @ Ipp:
- 59.1V
- Current - Peak Pulse (10/1000µs):
- 25.4A
- Power - Peak Pulse:
- 1500W (1.5kW)
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- Military
- Qualification:
- MIL-PRF-19500/516
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- C, SQ-MELF
JAN1N6157US/TR FAQ
1.How can I place an order for JAN1N6157US/TR through Aetrix?
Please submit a Request for Quotation (RFQ) for JAN1N6157US/TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for JAN1N6157US/TR reliable?
The price and inventory of JAN1N6157US/TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for JAN1N6157US/TR is usually 5 days.
3.What payment methods are accepted for JAN1N6157US/TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for JAN1N6157US/TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for JAN1N6157US/TR?
JAN1N6157US/TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your JAN1N6157US/TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for JAN1N6157US/TR?
For technical support, including JAN1N6157US/TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your JAN1N6157US/TR requirements.
6.How does Aetrix verify that JAN1N6157US/TR is sourced from the original manufacturer or authorized distributors?
All JAN1N6157US/TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that JAN1N6157US/TR meets industry standards.
7.What is the process for return or replacement of JAN1N6157US/TR?
All JAN1N6157US/TR units undergo pre-shipment inspection (PSI). If there is an issue with JAN1N6157US/TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The JAN1N6157US/TR part is unused and in its original packaging.
Return procedure for JAN1N6157US/TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
JAN1N6157US/TR Tags

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