STMicroelectronics LIS2DUX12TR

Overview

LIS2DUX12TR from STMicroelectronics is a smart 3-axis digital accelerometer with embedded machine learning core (MLC), finite state machine (FSM), adaptive self-configuration (ASC), and antialiasing filtering. It operates across ±2g/±4g/±8g/±16g full-scale ranges, supports ODR from 1.6 Hz to 800 Hz, delivers ultralow supply current down to 3 µA (ULP mode), and integrates 128-level FIFO for accelerometer + temperature data. It is deployed in wristband-based activity tracking systems requiring always-on motion inference with sub-µA power budget.

For engineers reviewing the LIS2DUX12TR datasheet, LIS2DUX12TR pinout, LIS2DUX12TR application, or LIS2DUX12TR equivalent, key selection criteria include MIPI I3C® interface support with 1.08 V I/O compatibility, dual interrupt pins (INT1/INT2) with configurable latched/level behavior, embedded pedometer and tilt detection logic, and factory-calibrated zero-g offset accuracy of ±30 mg.

Technical Context

The LIS2DUX12TR implements a cascaded analog–digital signal chain: an analog antialiasing low-pass filter precedes a 16-bit ADC, followed by programmable digital LPF1 and advanced motion processing blocks (FSM, MLC, ASC). The FSM and MLC operate independently of host CPU, enabling real-time edge inference on sensor data without waking the main processor.

Its triple-interface architecture supports I²C (up to 1 MHz), SPI (10 MHz), and MIPI I3C® (12.5 MHz) with independent I/O supply (Vdd_IO: 1.08–3.6 V), allowing direct interfacing with ultra-low-voltage SoCs. Interrupt generation is fully configurable per axis and event type (free-fall, wake-up, tap, 6D orientation), with dual dedicated output pins routed via MD1_CFG/MD2_CFG registers.

Key Specifications

Pinout & Package

Package: LGA-12L, 2.0 mm × 2.0 mm × 0.74 mm (max), RoHS and ECOPACK compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar smart accelerometer applications.

Compared with BMI270 and FXOS8700, the LIS2DUX12TR uniquely integrates MIPI I3C® for future-proof low-voltage scalability, ASC for autonomous parameter tuning, and factory-calibrated low-offset performance - making it optimal for next-generation wearables where power, intelligence, and interface flexibility are co-constrained.

Availability

LIS2DUX12TR is available at Aetrix Electronics and suitable for wearable device manufacturing, TWS earbud motion control, and industrial asset tracking requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for LIS2DUX12TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in intelligent power, sensing, and microcontroller solutions for industrial, automotive, and consumer markets.

The LIS2DUX12TR belongs to ST's "smart sensor" product line, designed specifically for ultra-low-power edge AI applications in space- and energy-constrained devices such as hearables, medical wearables, and IoT nodes.

FAQ

What is the minimum I/O supply voltage supported by LIS2DUX12TR for MIPI I3C® operation?

The LIS2DUX12TR supports MIPI I3C® operation down to 1.08 V on Vdd_IO, verified per DS14071 Rev 9 Table 3. This enables direct interfacing with 1.2 V application processors without level-shifting, reducing BOM cost and board area in ultra-low-power designs.

How does the adaptive self-configuration (ASC) feature function without host intervention?

ASC dynamically adjusts FSM and MLC parameters using real-time output from the embedded motion processing blocks - for example, modifying wake-up threshold sensitivity based on detected ambient vibration amplitude - using only on-chip resources and no host CPU involvement or firmware update.

Can the LIS2DUX12TR generate interrupts for both tap detection and orientation change simultaneously?

Yes - INT1 and INT2 are independently configurable via MD1_CFG (1Fh) and MD2_CFG (20h) registers. One pin can be assigned to single/double/tap events while the other handles 6D/4D orientation changes, with latched or level-mode output per pin.

What is the guaranteed shock survivability rating, and under what test conditions is it specified?

The LIS2DUX12TR is rated for 10,000 g survivability for 0.2 ms per Table 7 (Absolute Maximum Ratings) in DS14071 Rev 9. This applies to unpowered conditions and reflects mechanical robustness during handling, drop testing, or high-G industrial environments.