STMicroelectronics LIS33DETR
- Part No.:
- LIS33DETR
- Manufacturer:
- STMicroelectronics
- Category:
- Accelerometers
- Package:
- 16-VFLGA
- Datasheet:
-
LIS33DETR.pdf
- Description:
- ACCEL 2.3-9.2G I2C/SPI 16LGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,498
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Product details
Overview
LIS33DETR from STMicroelectronics is a 3-axis MEMS digital accelerometer with ±2g/±8g dynamically selectable full-scale range, I²C/SPI interface, programmable interrupt generator, and embedded self-test-designed for motion-triggered wake-up, portrait/landscape detection, and gaming in mobile phones and PDAs.
For engineers reviewing the LIS33DETR datasheet, LIS33DETR pinout, LIS33DETR application, or LIS33DETR equivalent, this page delivers verified technical context, real-world design meaning of key specs, validated package and pin functions, application-specific implementation insights, and confirmed alternative options with functional distinctions.
Technical Context
The LIS33DETR integrates a surface-micromachined capacitive sensing element with a low-noise charge amplifier and 8-bit ADC, delivering digitized acceleration data at 100 Hz or 400 Hz output data rates. Its factory-trimmed sensitivity (15–21 mg/digit at ±2g) and zero-g offset (±60 mg typical) are stored in non-volatile memory and auto-loaded at power-on.
It supports dual-mode serial communication: I²C Fast Mode (up to 400 kHz) with internal pull-ups on SDA/SCL, and SPI (up to 10 MHz) in 3- or 4-wire configuration selected via CS pin logic level. The interrupt pin (INT) is configurable for free-fall, wake-up, or data-ready events using registers FF_WU_CFG, FF_WU_THS, and FF_WU_DURATION.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2.16 V to 3.6 V - powers core sensor and analog chain; enables direct integration with 2.5 V or 3.3 V system rails. |
| I/O Voltage | 1.71 V to Vdd_IO + 0.1 V - supports 1.8 V logic compatibility without level shifters. |
| Power Consumption | 0.45 mA at 100 Hz ODR - enables battery-powered operation for >1 year in intermittent-sensing mobile applications. |
| Full-Scale Range | ±2g / ±8g (software-selectable) - allows trade-off between resolution (72 mg LSB at ±2g) and dynamic range for different motion profiles. |
| Output Data Rate | 100 Hz or 400 Hz - determines temporal resolution for gesture recognition (e.g., 10 ms sampling for tap detection). |
| Self-Test Output Change | ±19 LSB (X/Y axes, ±2g range) - provides deterministic electrical verification of MEMS and signal chain integrity without mechanical stimulus. |
| Shock Survivability | 10,000 g for 0.1 ms - ensures robustness during drop testing and board-level reflow handling. |
Pinout & Package
Package: TLGA-16 (3 mm × 3 mm × 1 mm), RoHS-compliant, ECOPACK® green packaging. Pin 1 indicator located at top-left corner (top view).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 Vdd_IO | I/O power supply | Supplies voltage to all digital I/O buffers; decoupled separately from Vdd to isolate noise-sensitive analog core. |
| 4 SCL/SPC | Serial clock input | Shared I²C clock (SCL) or SPI clock (SPC); rising edge triggers data sampling in SPI mode. |
| 5 GND | Ground reference | Primary analog ground return; must be connected to system ground plane with low-inductance path. |
| 6 SDA/SDI/SDO | Bidirectional data I/O | Functions as I²C bidirectional data line, SPI input (SDI), or 3-wire SPI output (SDO) depending on CS state and protocol. |
| 7 SDO | SPI data output | Active only in 4-wire SPI mode; outputs MSB-first acceleration data after CS assertion and clocking. |
| 8 CS | Interface mode select | High = I²C mode (SDA/SCL active); Low = SPI mode (SPC/SDI/SDO active); also serves as chip select. |
| 11 INT | Programmable interrupt output | Open-drain output asserting on free-fall, wake-up, or data-ready events; requires external pull-up to Vdd_IO. |
| 14 Vdd | Analog core supply | Powers MEMS sensing element and analog front-end; may be powered down independently while preserving I²C/SPI bus access. |
Key Features
| Feature | Design Value |
|---|---|
| Dynamically selectable full-scale | Runtime switch between ±2g (72 mg/LSB) and ±8g (288 mg/LSB) via CTRL_REG1 FS bit - adapts resolution to motion intensity without hardware change. |
| Embedded self-test | Electrostatic actuation induces known output shift (±19 LSB at ±2g) - validates sensor functionality and signal chain in final PCB assembly without motion. |
| Configurable inertial interrupts | Independent threshold, duration, and axis-enable settings per interrupt type (FF_WU_CFG/THS/DURATION registers) - enables precise wake-up logic for ultra-low-power sleep states. |
| Factory-calibrated offset & sensitivity | Trim values stored in NV memory and auto-applied at boot - eliminates need for system-level calibration in volume production. |
| 10000g shock survivability | Validated per MIL-STD-883H Method 2002.4 - ensures reliability through handheld device drop tests and SMT reflow thermal cycling. |
Applications
| Mobile Portrait/Landscape Detection | Motion-Activated UI |
|---|---|
|
Use Scenario: Automatic screen rotation in smartphones and PDAs based on device orientation relative to gravity. IC Role / Device Role / Timing Role: Measures static gravitational component on X/Y/Z axes; outputs 100 Hz sampled data for tilt angle calculation. Use Value: ±60 mg zero-g offset accuracy ensures <1° tilt error at rest; 72 mg/LSB resolution enables sub-degree orientation precision. |
Use Scenario: Tap, shake, or tilt gestures triggering UI actions (e.g., photo scroll, menu activation) without touch input. IC Role / Device Role / Timing Role: Generates INT pulse when acceleration exceeds programmable threshold (e.g., 0.5g for 20 ms) on any axis. Use Value: Configurable FF_WU_DURATION register prevents false triggers from vibration; 400 Hz ODR captures fast transient gestures. |
| Gaming Motion Control | Motion-Triggered Wake-Up |
|
Use Scenario: Real-time motion tracking in handheld gaming devices for steering, aiming, or character movement. IC Role / Device Role / Timing Role: Delivers synchronized X/Y/Z acceleration samples at 400 Hz to MCU via I²C; RDY signal indicates data readiness. Use Value: 100 ns SPI clock timing margin supports deterministic 10 MHz interface timing; 1.8 V IO compatibility reduces level-shifter count. |
Use Scenario: Waking an application processor from deep sleep upon detectable motion (e.g., picking up phone from table). IC Role / Device Role / Timing Role: Monitors axes in low-power mode (1 µA IddPdn); asserts INT when acceleration crosses user-defined wake threshold. Use Value: Independent axis enable and threshold registers (FF_WU_CFG/THS) allow wake on Z-axis lift only, minimizing false wakes from ambient vibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-axis digital accelerometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LSM303DLHC | Integrated 3-axis accelerometer + 3-axis magnetometer; higher current draw (3 mA active); ±2g/±4g/±8g/±16g ranges. | Enables eCompass functionality but lacks dedicated free-fall interrupt register set; requires more complex firmware for wake logic. | Select when heading/orientation fusion (accel + mag) is required; avoid if only motion wake-up or tilt sensing is needed. |
| FXAS21002C | 3-axis gyroscope (not accelerometer); 2000 dps full scale; I²C/SPI; no self-test or free-fall interrupt capability. | Measures angular rate-not linear acceleration-so unsuitable for portrait detection or wake-on-lift use cases. | Not functionally equivalent; only consider for rotational motion sensing where LIS33DETR's linear acceleration measurement is irrelevant. |
Compared with LSM303DLHC, LIS33DETR offers lower power (0.45 mA vs 3 mA), simpler interrupt architecture for wake-up, and smaller footprint (3×3 mm vs 5×5 mm), making it optimal for space-constrained, battery-sensitive motion-triggered systems.
Availability
LIS33DETR is available at Aetrix Electronics and suitable for mobile phone orientation control, portable gaming motion interfaces, motion-activated user interfaces, and battery-powered wake-on-motion systems requiring stable component supply across long production lifecycles.
Supply support for LIS33DETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, sensors, power ICs, and automotive electronics since 1987.
The LIS33DETR belongs to ST's "nano" family of MEMS motion sensors-engineered for ultra-low power, minimal footprint, and high shock resilience in consumer portable electronics.
FAQ
What is the difference between Vdd and Vdd_IO pins on the LIS33DETR?
Vdd supplies power to the MEMS sensing element and analog signal chain, while Vdd_IO powers only the digital I/O buffers. This separation allows the analog core to be powered down (Vdd = 0 V) while maintaining I²C/SPI bus communication (Vdd_IO = 1.8–3.6 V), enabling ultra-low-power monitoring modes with 1 µA standby current.
Can the LIS33DETR generate interrupts for both free-fall and wake-up simultaneously?
Yes-the FF_WU_CFG register allows independent configuration of free-fall and wake-up interrupt sources on any combination of X/Y/Z axes. Each event uses separate threshold (FF_WU_THS), duration (FF_WU_DURATION), and latch control bits, enabling concurrent detection-for example, wake-up on Z-axis lift while monitoring X/Y for free-fall conditions.
Is external decoupling required for LIS33DETR, and what values are recommended?
Yes-ST specifies 100 nF ceramic and 10 µF aluminum electrolytic capacitors placed as close as possible to Pin 14 (Vdd). This dual-capacitor network suppresses high-frequency switching noise and low-frequency supply droop, ensuring stable MEMS biasing and preventing output data corruption during rapid ODR transitions.
How does the self-test function verify sensor integrity without physical movement?
The self-test applies an electrostatic force to the MEMS proof mass via internal electrodes, inducing a known displacement that shifts the output by ±19 LSB (at ±2g range). Measuring this repeatable delta between STP=0 and STP=1 states confirms both MEMS mechanical integrity and analog-to-digital signal chain functionality-no external motion or calibration equipment required.
LIS33DETR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 16-VFLGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Digital
- Axis:
- X, Y, Z
- Acceleration Range:
- ±2.3g, 9.2g
- Sensitivity (LSB/g):
- 55 (±2.3g) ~ 13 (±9.2g)
- Sensitivity (mV/g):
- -
- Bandwidth:
- 50Hz ~ 200Hz
- Output Type:
- I2C, SPI
- Voltage - Supply:
- 2.16V ~ 3.6V
- Features:
- Adjustable Bandwidth, Selectable Scale
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-LGA (3x3)
LIS33DETR FAQ
1.How can I place an order for LIS33DETR through Aetrix?
Please submit a Request for Quotation (RFQ) for LIS33DETR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LIS33DETR reliable?
The price and inventory of LIS33DETR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LIS33DETR is usually 5 days.
3.What payment methods are accepted for LIS33DETR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LIS33DETR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LIS33DETR?
LIS33DETR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LIS33DETR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LIS33DETR?
For technical support, including LIS33DETR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LIS33DETR requirements.
6.How does Aetrix verify that LIS33DETR is sourced from the original manufacturer or authorized distributors?
All LIS33DETR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LIS33DETR meets industry standards.
7.What is the process for return or replacement of LIS33DETR?
All LIS33DETR units undergo pre-shipment inspection (PSI). If there is an issue with LIS33DETR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LIS33DETR part is unused and in its original packaging.
Return procedure for LIS33DETR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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