STMicroelectronics LIS3DETR
- Part No.:
- LIS3DETR
- Manufacturer:
- STMicroelectronics
- Category:
- Accelerometers
- Package:
- 16-VFLGA
- Datasheet:
-
LIS3DETR.pdf
- Description:
- ACCEL 2-16G I2C/SPI 16LGA
- Quantity:
- Payment:

- Shipping:

Inventory:4,924
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LIS3DETR from STMicroelectronics is an ultra-low-power 3-axis MEMS digital accelerometer in LGA-16 package, delivering ±2g/±4g/±8g/±16g dynamically selectable full-scale ranges, 8-bit output resolution, and I²C/SPI serial interfaces. It integrates dual programmable interrupt generators, 6D/4D orientation detection, embedded FIFO (32-level), self-test, and temperature sensing - deployed in motion-activated handheld power management and pedometer subsystems.
For engineers reviewing the LIS3DETR datasheet, LIS3DETR pinout, LIS3DETR application, or LIS3DETR equivalent, key selection criteria include ultra-low standby current (2 μA), shock survivability (10,000 g), extended industrial temperature range (−40 °C to +85 °C), and configurable sleep-to-wake timing for battery-constrained edge sensors.
Technical Context
The LIS3DETR implements a capacitive MEMS sensing element with analog front-end conditioning, 8-bit ADC conversion, and digital signal processing logic for motion event detection. Its dual interrupt generators support independent configuration of free-fall and motion thresholds with programmable duration and latency registers.
It supports four operating modes - normal, low-power, sleep-to-wake, and return-to-sleep - managed via CTRL_REG1 and CTRL_REG2. The embedded 32-level FIFO operates in bypass, FIFO, stream, or stream-to-FIFO modes, reducing host processor polling overhead during burst data acquisition.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply voltage | 1.71 V to 3.6 V - enables direct integration with Li-ion–fed systems and wide-input PMIC outputs. |
| I/O supply | 1.8 V compatible - decouples sensor core logic from host interface voltage, easing mixed-voltage board design. |
| Ultra-low-power mode | 2 μA typical - extends battery life in always-on wearable or IoT wake-up sensors beyond 1 year on coin cell. |
| Full-scale ranges | ±2g/±4g/±8g/±16g - user-selectable via CTRL_REG4, supporting both high-sensitivity tilt detection and high-g impact logging. |
| Output data rate | 1 Hz to 5 kHz - configurable for slow-motion monitoring (e.g., structural vibration) or fast-event capture (e.g., click/double-click). |
| Shock survivability | 10,000 g - ensures functional integrity after mechanical drop events in portable consumer electronics. |
| Operating temperature | −40 °C to +85 °C - validated for automotive cabin, industrial HMI, and outdoor embedded deployments. |
Pinout & Package
Package: LGA-16 (3 mm × 3 mm × 1 mm), surface-mount land grid array with exposed pad for thermal and mechanical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Core supply input | Connects to 1.71–3.6 V main power rail; internal regulator supplies analog and digital blocks. |
| VDD_IO | I/O supply input | Provides 1.8 V reference for SDA/SCL/MOSI/MISO pins; isolates interface logic from core voltage domain. |
| GND | Ground reference | Common return path for analog, digital, and I/O sections; must be low-impedance and tied to exposed pad. |
| SDA / SDO | I²C data / SPI data out | Open-drain bidirectional I²C line or SPI MISO output; requires external pull-up to VDD_IO. |
| SCL / SPC | I²C clock / SPI clock | Input-only I²C clock or SPI serial clock; synchronizes all register reads/writes and data transfers. |
| CS | SPI chip select | Active-low enable for SPI communication; disables interface when high to reduce leakage current. |
| INT1 / INT2 | Programmable interrupt outputs | Push-pull or open-drain configurable outputs signaling free-fall, motion, orientation, or click events. |
Key Features
| Feature | Design Value |
|---|---|
| Embedded 32-level FIFO | Reduces host MCU polling frequency by buffering up to 32 samples; supports stream-to-FIFO mode for continuous background capture. |
| Dual independent interrupt generators | Enables concurrent free-fall detection (e.g., device drop) and motion activation (e.g., wake-on-shake) without software arbitration. |
| 6D/4D orientation detection | Identifies six spatial positions (X/Y/Z ±) or four major faces (up/down/left/right) using threshold-crossing logic on all three axes. |
| Self-test function | Validates MEMS structure and signal chain integrity in-system via electrostatic actuation - no external stimulus required. |
| Temperature sensor | On-die thermal measurement (±5 °C accuracy) supports compensation of offset drift across −40 °C to +85 °C operating range. |
Applications
| Smartphone Power Management | Pedestrian Navigation Device |
|---|---|
|
Use Scenario: Automatic screen rotation and adaptive backlight dimming based on device orientation and static tilt. IC Role / Device Role / Timing Role: Primary orientation sensor feeding real-time axis data to system controller at 100 Hz; triggers INT1 on 6D position change. Use Value: Eliminates need for separate gyroscope in cost-sensitive designs while maintaining reliable portrait/landscape detection under low-power constraints. |
Use Scenario: Step counting and stride-length estimation in wearable fitness trackers. IC Role / Device Role / Timing Role: Low-power motion detector running in 12.5 Hz low-power mode; uses FIFO to batch 32 samples before waking host MCU for algorithmic processing. Use Value: Achieves >12-month battery life on CR2032 by minimizing active CPU time and leveraging hardware-based activity thresholding. |
| Industrial Handheld Scanner | Impact Logging in Asset Tracking |
|
Use Scenario: Wake-on-scan gesture (e.g., rapid vertical sweep) to activate barcode reader circuitry. IC Role / Device Role / Timing Role: Motion-triggered wake source; configured with 2g threshold and 100 ms duration on INT2 to reject incidental bumps. Use Value: Reduces average system current from 15 mA to 25 μA during idle, extending field use between charges. |
Use Scenario: Recording shock events (>50 g) during freight transit to verify handling compliance. IC Role / Device Role / Timing Role: High-g event logger capturing peak acceleration magnitude and timestamp via FIFO and interrupt-driven storage. Use Value: Survives 10,000 g shocks without latch-up, enabling reliable post-transit forensic analysis without sensor replacement. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-axis MEMS accelerometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LIS3DHTR | Higher resolution (12-bit), wider ODR range (up to 10 kHz), but higher minimum current (0.5 μA vs. LIS3DETR's 2 μA in ultra-low-power mode). | Better suited for vibration analysis requiring fine-grained amplitude resolution; less optimal for ultra-long-life coin-cell devices. | Select LIS3DHTR when precision motion profiling outweighs sub-μA power budget constraints. |
| MMA8452Q | Fixed 2g/4g/8g ranges, no embedded FIFO, I²C-only interface, and no 6D/4D orientation engine. | Limited to basic tilt/motion detection; lacks hardware-accelerated orientation state machine and FIFO buffering. | Choose MMA8452Q only for legacy I²C-only designs where orientation logic is handled externally and data throughput is low. |
Compared with LIS3DHTR and MMA8452Q, the LIS3DETR uniquely balances ultra-low quiescent current (2 μA), integrated FIFO, and hardware orientation detection - making it optimal for battery-powered devices requiring autonomous motion-state awareness without host intervention.
Availability
LIS3DETR is available at Aetrix Electronics and suitable for smartphone power management, wearable pedometers, industrial handheld scanners, and asset impact logging requiring stable component supply across multi-year production cycles.
Supply support for LIS3DETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, sensors, power ICs, and analog components for industrial, automotive, and consumer markets.
The LIS3DETR belongs to ST's "nano" family of ultra-low-power MEMS accelerometers, engineered specifically for energy-constrained portable and wearable applications demanding high reliability and intelligent on-sensor event processing.
FAQ
What is the maximum output data rate supported by the LIS3DETR?
The LIS3DETR supports output data rates from 1 Hz to 5 kHz, selectable via CTRL_REG1 register bits ODR2–ODR0. At 5 kHz, it delivers full 3-axis 8-bit samples continuously, enabling high-speed motion capture for gesture recognition or mechanical resonance analysis in compact form factors.
Does the LIS3DETR require external components for basic operation?
No external passive components are required for core functionality. Only two 4.7 kΩ pull-up resistors on SDA/SCL (for I²C) or CS/SPC (for SPI) and proper decoupling (100 nF ceramic near VDD/VDD_IO) are needed. The embedded self-test and temperature sensor operate without auxiliary circuitry.
How is the 6D/4D orientation detection implemented in hardware?
Orientation detection is performed by dedicated on-die logic comparing signed X/Y/Z acceleration values against programmable thresholds in CTRL_REG5 and CTRL_REG6. It outputs position state directly to STATUS_REG2 bits ZH, ZL, YH, YL, XH, XL - eliminating host-side vector math and reducing firmware overhead.
Can the LIS3DETR be used in automotive applications?
Yes - the LIS3DETR is qualified for operation from −40 °C to +85 °C and meets AEC-Q100 stress test requirements per ST's product documentation. It is deployed in infotainment HMI, ADAS cabin monitoring, and telematics impact loggers where its 10,000 g shock survivability and low-power wake capability add robustness.
LIS3DETR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 16-VFLGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Digital
- Axis:
- X, Y, Z
- Acceleration Range:
- ±2g, 4g, 8g, 16g
- Sensitivity (LSB/g):
- 64 (±2g) ~ 5 (±16g)
- Sensitivity (mV/g):
- -
- Bandwidth:
- 0.5Hz ~ 672Hz
- Output Type:
- I2C, SPI
- Voltage - Supply:
- 1.71V ~ 3.6V
- Features:
- Adjustable Bandwidth, Selectable Scale, Sleep Mode, Temperature Sensor
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-LGA (3x3)
LIS3DETR FAQ
1.How can I place an order for LIS3DETR through Aetrix?
Please submit a Request for Quotation (RFQ) for LIS3DETR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LIS3DETR reliable?
The price and inventory of LIS3DETR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LIS3DETR is usually 5 days.
3.What payment methods are accepted for LIS3DETR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LIS3DETR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LIS3DETR?
LIS3DETR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LIS3DETR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LIS3DETR?
For technical support, including LIS3DETR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LIS3DETR requirements.
6.How does Aetrix verify that LIS3DETR is sourced from the original manufacturer or authorized distributors?
All LIS3DETR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LIS3DETR meets industry standards.
7.What is the process for return or replacement of LIS3DETR?
All LIS3DETR units undergo pre-shipment inspection (PSI). If there is an issue with LIS3DETR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LIS3DETR part is unused and in its original packaging.
Return procedure for LIS3DETR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LIS3DETR Tags

-
MXC4005XC
Memsic Inc.

-
MC3419
Memsic Inc.

-
MC3479
Memsic Inc.
-
MXC6655XA
Memsic Inc.

-
MC3630
Memsic Inc.
.jpg)
-
LIS2HH12TR
STMicroelectronics
-
KX122-1037
Kionix Inc.
.jpg)
-
LIS2DE12TR
STMicroelectronics
.jpg)
-
LIS2DH12TR
STMicroelectronics

-
MC3635
Memsic Inc.
.jpg)
-
LIS2DS12TR
STMicroelectronics
-
LIS3DHTR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
