NXP Semiconductors MF1PH2200DA4/00J
- Part No.:
- MF1PH2200DA4/00J
- Manufacturer:
- NXP Semiconductors
- Category:
- RFID, RF Access, Monitoring ICs
- Package:
- MOA4, Smart Card Module
- Datasheet:
-
MF1PH2200DA4/00J.pdf
- Description:
- MIFAREA PLUS EV2
- Quantity:
- Payment:

- Shipping:

Inventory:3,538
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Product details
Overview
MF1PH2200DA4/00 from NXP Semiconductors is a MIFARE Plus EV2 contactless smart card IC with 2 kB non-volatile memory, 7-byte UID, 70 pF input capacitance, and Common Criteria EAL5+ security certification. It operates at 13.56 MHz, supports ISO/IEC 14443-4 and ISO/IEC 7816-4 (SL3), and enables AES-128 authentication for secure micro-payment and access management systems.
For engineers reviewing the MF1PH2200DA4/00 datasheet, MF1PH2200DA4/00 pinout, MF1PH2200DA4/00 application, or MF1PH2200DA4/00 equivalent, key selection considerations include SL3 security migration capability, sector-wise AES key management, Transaction MAC support, Random ID compliance for GDPR-aligned deployments, and MOA4 SOT500-2 package compatibility with compact form factors like wristbands and key fobs.
Technical Context
The MF1PH2200DA4/00 implements a dual-protocol architecture supporting both ISO/IEC 14443-3 (for MIFARE Classic EV1 backward compatibility) and ISO/IEC 14443-4 (T=CL) for SL0–SL3 operation. Its memory is organized into 32 sectors of 4 blocks each (2 kB total), with sector trailers containing CRYPTO1 keys A/B and access bytes governing DaVaBlock permissions.
Security level switching occurs at card or sector level: SL0 enables personalization; SL1 adds optional AES authentication and update restrictions via configuration blocks; SL3 mandates AES-128 for all commands and introduces Transaction Timer and Transaction MAC for tamper-resistant value operations. The chip integrates TRNG, active shielding, voltage/rail/light/glitch sensors, and ECC-based NXP Originality Signature verification.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 2 kB non-volatile EEPROM, organized in 32 sectors × 4 blocks (16 bytes/block), enabling legacy-to-SL3 migration without infrastructure overhaul. |
| Input capacitance | 70 pF - optimized for small-form-factor antennas (e.g., wristbands, key fobs) while maintaining reliable coupling at up to 10 cm read distance. |
| UID type | 7-byte UID - factory-programmed, write-protected, globally unique identifier supporting ISO/IEC 14443-3 Random ID mode for privacy-compliant applications. |
| Security certification | Common Criteria EAL5+ - validated resistance against high-potential attackers, meeting banking and e-passport security requirements. |
| Communication protocol | ISO/IEC 14443-4 (T=CL) + ISO/IEC 7816-4 SL3 - ensures interoperability with NFC mobile handsets and backend clearing systems using APDU-wrapped native commands. |
| Encryption | AES-128 mandatory in SL3 - secures all data reads/writes and enables Transaction MAC for end-to-end integrity verification of payment or loyalty transactions. |
| Write endurance | 200,000–1,000,000 cycles - supports long-term deployment in high-frequency transaction environments such as transit gates or event turnstiles. |
| Data retention | 25 years at 25 °C - guarantees persistent storage of cryptographic keys, credentials, and balance data over full product lifecycle. |
Pinout & Package
MF1PH2200DA4/00 is housed in a plastic leadless module carrier package (MOA4) conforming to SOT500-2 mechanical outline, designed for automated tape-and-reel handling and embedding into thin-profile cards or wearable devices.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| LA | Antenna coil connection A | RF input terminal for 13.56 MHz carrier coupling; forms resonant LC tank with external antenna coil and internal 70 pF capacitance. |
| LB | Antenna coil connection B | RF return path for antenna loop; completes RF energy harvesting circuit and enables demodulation of PCD commands. |
Key Features
| Feature | Design Value |
|---|---|
| SL3 CardSecurityLevel upgrade | Enables full-card migration from SL1 to SL3 without reissuance-critical for phased security rollout in public transport or government ID programs. |
| SectorSecurityLevel flexibility | Allows individual sectors to operate at SL1, SL3, or SL1SL3Mix mode-supporting hybrid applications where legacy and high-security zones coexist on one card. |
| Transaction Timer | Configurable timeout prevents Man-in-the-Middle attacks during multi-step transactions (e.g., fare calculation + deduction), enforcing strict timing boundaries. |
| Transaction MAC (TMAC) | Generates cryptographic checksum over entire transaction payload-verifiable by clearing entities to ensure data integrity and non-repudiation in micropayment systems. |
| NXP Originality Signature | ECC-based asymmetric signature verifiable with public key-eliminates need for shared secrets in authenticity checks for ticketing or credential validation. |
| Random ID support | Complies with GDPR and similar regulations by preventing passive tracking across readers-enabled per ISO/IEC 14443-3 standard without sacrificing interoperability. |
Applications
| Public Transportation | Access Management |
|---|---|
Use Scenario: Contactless fare collection at subway gates and bus validators with offline balance updates and fraud-resistant transaction logging. IC Role / Device Role / Timing Role: Secure credential storage and AES-encrypted value block operations (increment/decrement/transfer) executed within <100 ms per transaction. Use Value: Enables offline-first operation with TMAC-verified reconciliation, reducing dependency on real-time network connectivity while maintaining auditability. | Use Scenario: Multi-site corporate access control with role-based permissions and time-limited visitor badges issued via centralized backend. IC Role / Device Role / Timing Role: SL3-secured credential vault storing encrypted access rules and session keys; supports ISO/IEC 7816-4 APDUs for PKI-based authentication handshakes. Use Value: Eliminates credential cloning risk through EAL5+-certified AES-128 and NXP Originality Signature, meeting ISO/IEC 27001 physical security controls. |
| Event Ticketing | Electronic Voucher |
Use Scenario: NFC-enabled concert or festival entry with dynamic seat assignment, anti-duplication enforcement, and real-time attendance reporting. IC Role / Device Role / Timing Role: Sector-wise SL3 activation isolates ticket data from loyalty points; uses Transaction Timer to prevent replay of entry tokens. Use Value: Prevents unauthorized resale and reuse via cryptographic binding of UID, timestamp, and venue-specific MAC-validated at gate without cloud round-trip. | Use Scenario: Branded retail vouchers redeemable across POS terminals and mobile wallets, with expiration, usage limits, and balance protection. IC Role / Device Role / Timing Role: Dual-mode operation: SL1 for fast redemption at legacy terminals; SL3 for secure top-up and balance inquiry via NFC-enabled smartphones. Use Value: Supports seamless migration path-retailers deploy SL1 today, upgrade to SL3 tomorrow without replacing existing cards or readers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar contactless smart card IC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MF1P2200DA4/00 | 17 pF input capacitance vs. 70 pF; identical 2 kB memory, 7-byte UID, MOA4/SOT500-2 package. | Optimized for standard credit-card-sized cards with larger antennas-not suitable for wristbands or key fobs requiring higher coupling efficiency. | Select MF1P2200DA4/00 only when deploying in traditional PVC cards with ≥100 mm² antenna area and no regulatory requirement for Random ID. |
| MF1PH2201DUD/00 | FFC wafer format (no package); same 70 pF, 2 kB, 7-byte UID; lacks MOA4 mechanical robustness and tape-and-reel compatibility. | Targeted for embedded modules or custom antenna integration-not for direct card lamination or mass production card assembly lines. | Choose MF1PH2201DUD/00 only for OEMs designing proprietary reader-integrated tags or specialized wearables with die-level antenna bonding. |
Compared with MF1P2200DA4/00 and MF1PH2201DUD/00, MF1PH2200DA4/00 uniquely balances small-form-factor RF performance (70 pF), industrial packaging (MOA4 tape), and full SL3 feature set-making it the only option certified for GDPR-compliant Random ID in wearable deployments without sacrificing EAL5+ assurance.
Availability
MF1PH2200DA4/00 is available at Aetrix Electronics and suitable for public transportation fare collection, secure corporate access management, and event ticketing systems requiring stable component supply, long-term lifecycle support, and certified cryptographic assurance.
Supply support for MF1PH2200DA4/00 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, IoT, and identification markets, with headquarters in Eindhoven, Netherlands.
The MIFARE Plus EV2 product line was engineered to deliver bank-grade security (EAL5+) in mainstream contactless smart cards-enabling seamless infrastructure upgrades from MIFARE Classic while supporting privacy-by-design features like Random ID and Transaction MAC.
FAQ
What security certifications does MF1PH2200DA4/00 hold?
MF1PH2200DA4/00 is certified to Common Criteria EAL5+ (AVA_VAN.5), confirming resistance against high-potential attackers-matching the assurance level required for electronic passports and banking cards. This certification covers the full IC stack including AES-128 crypto engine, TRNG, active shielding, and fault injection countermeasures. The MF1PH2200DA4/00 certificate number and scope are published by NXP and validated by accredited labs; no additional third-party validation is needed for deployment in regulated environments.
How does MF1PH2200DA4/00 support migration from MIFARE Classic systems?
MF1PH2200DA4/00 maintains full backward compatibility with MIFARE Classic EV1 in SL1 mode-including identical frame structure, CRYPTO1 authentication, and command set-allowing existing readers to authenticate and access data without firmware changes. It also supports sector-wise SL3 upgrades, so operators can incrementally enhance security in high-risk zones (e.g., financial transactions) while retaining SL1 for low-risk functions (e.g., door access). The MF1PH2200DA4/00 achieves this via its SL1SL3Mix mode and configuration block that restricts updates without permanent locking.
What is the difference between MF1PH2200DA4/00 and MF1P2200DA4/00?
The core functional difference is input capacitance: MF1PH2200DA4/00 has 70 pF, while MF1P2200DA4/00 has 17 pF. This makes MF1PH2200DA4/00 optimized for compact antennas used in wristbands, key fobs, and thin cards-delivering reliable coupling at 10 cm despite reduced coil area. Both share identical memory (2 kB), UID (7-byte), package (MOA4/SOT500-2), and security features (EAL5+, SL3, TMAC). MF1PH2200DA4/00 is the only choice when deploying in space-constrained form factors requiring GDPR-aligned Random ID support.
Does MF1PH2200DA4/00 support ISO/IEC 7816-4 commands?
Yes, MF1PH2200DA4/00 supports ISO/IEC 7816-4 APDU wrapping for all native commands after ISO/IEC 14443-4 activation, including Virtual Card Selection via ISOSelect (INS A4h) and ISOExternalAuthenticate (INS 82h). This enables interoperability with NFC-enabled smartphones and backend systems using standardized smart card protocols. In SL3, all commands-including ReadEncryptedMAC_MACed and Read_Sig-are accessible via ISO/IEC 7816-4 framing, allowing MF1PH2200DA4/00 to function as a standards-compliant secure element in mobile wallet integrations.
Can MF1PH2200DA4/00 be used in wearable applications like wristbands?
Yes, MF1PH2200DA4/00 is specifically designed for wearable use: its 70 pF input capacitance compensates for small antenna size, enabling reliable operation in wristbands and key fobs with reading distances up to 10 cm. The MOA4 package (SOT500-2) provides mechanical robustness for flex-cycle durability, and Random ID support ensures GDPR-compliant user privacy during repeated proximity interactions. NXP validates MF1PH2200DA4/00 in EN 14971-certified wearable reference designs-confirming performance under bending, moisture, and temperature cycling typical of consumer wearables.
MF1PH2200DA4/00J Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- MOA4, Smart Card Module
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- RFID Reader
- Frequency:
- 13.56MHz
- Standards:
- Mifare, NFC
- Interface:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -25°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PLLMC
MF1PH2200DA4/00J FAQ
1.How can I place an order for MF1PH2200DA4/00J through Aetrix?
Please submit a Request for Quotation (RFQ) for MF1PH2200DA4/00J on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MF1PH2200DA4/00J reliable?
The price and inventory of MF1PH2200DA4/00J are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MF1PH2200DA4/00J is usually 5 days.
3.What payment methods are accepted for MF1PH2200DA4/00J?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MF1PH2200DA4/00J transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MF1PH2200DA4/00J?
MF1PH2200DA4/00J orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MF1PH2200DA4/00J order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MF1PH2200DA4/00J?
For technical support, including MF1PH2200DA4/00J datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MF1PH2200DA4/00J requirements.
6.How does Aetrix verify that MF1PH2200DA4/00J is sourced from the original manufacturer or authorized distributors?
All MF1PH2200DA4/00J products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MF1PH2200DA4/00J meets industry standards.
7.What is the process for return or replacement of MF1PH2200DA4/00J?
All MF1PH2200DA4/00J units undergo pre-shipment inspection (PSI). If there is an issue with MF1PH2200DA4/00J, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MF1PH2200DA4/00J part is unused and in its original packaging.
Return procedure for MF1PH2200DA4/00J:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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