NXP Semiconductors MMA5124KWR2
- Part No.:
- MMA5124KWR2
- Manufacturer:
- NXP Semiconductors
- Category:
- Accelerometers
- Package:
- 16-QFN Exposed Pad
- Datasheet:
-
MMA5124KWR2.pdf
- Description:
- ACCELEROMETER 240G PCM/SPI 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,845
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Product details
Overview
MMA5124KWR2 from NXP Semiconductors (formerly Freescale) is a Z-axis PSI5-compatible inertial sensor designed for automotive airbag crash detection systems. It delivers ±240g full-scale range, 10-bit digital output with ±2% non-linearity, 400 Hz selectable 3-pole or 4-pole low-pass filtering, and operates across -40°C to +125°C under AEC-Q100 Grade 1 qualification.
For engineers reviewing the MMA5124KWR2 datasheet, MMA5124KWR2 pinout, MMA5124KWR2 application, or MMA5124KWR2 equivalent, key selection criteria include PSI5 v1.3 compliance (125/190.5 kBaud, 8/10-bit data, CRC/parity), daisy-chain capability via BUS_SW, 16 μs internal sampling with 1 μs interpolation latency, and qualified operation in high-EMI automotive safety-critical environments.
Technical Context
The MMA5124KWR2 integrates an overdamped MEMS g-cell with a ΣΔ ADC, SINC filter, and programmable IIR/HPF/LPF DSP chain. Its PSI5 interface uses current modulation on IDATA with VCC power delivery over two wires, supporting synchronous/asynchronous modes, programmable time slots (0.5 μs resolution), and optional external low-side daisy chain switching.
Internal regulation includes independent VBUF buffer supply (3.6–4.0 V), VREG digital rail (2.425–2.575 V), and VREGA analog rail (2.425–2.575 V), each with dedicated decoupling and low-voltage detection thresholds. Offset cancellation occurs in two stages with configurable HPF cutoffs (0.04/0.1/0.3 Hz).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Full-Scale Range | ±240g - defines maximum measurable acceleration before clipping at gADC_Clip240ZP/N (836 g / -1909 g) |
| Output Resolution | 10-bit - provides 480 LSB/g sensitivity with ±2% total sensitivity error over temperature |
| PSI5 Compatibility | Version 1.3 - supports 125/190.5 kBaud, 8/10-bit data length, even parity or 3-bit CRC, and daisy-chain mode |
| Filtering | Selectable 400 Hz 3-pole or 4-pole LPF - sets bandwidth for crash pulse discrimination while suppressing noise |
| Operating Temperature | -40°C to +125°C - qualified per AEC-Q100 Rev G Grade 1 for under-hood and passenger compartment deployment |
| Supply Current | 4.0–8.0 mA quiescent, +22–30 mA modulation - enables low-power wake-on-event and high-fidelity signal capture |
| Sampling & Latency | 16 μs internal sample rate, 1 μs interpolated output - ensures sub-millisecond timing accuracy for airbag deployment decisions |
Pinout & Package
Pb-free 16-pin QFN package (Case 2086-01, 6 mm × 6 mm, 0.5 mm pitch) with exposed die attach pad internally connected to VSS.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | PSI5 Power & Data Line Supply | Supplies device via resistor from PSI5 bus; requires 2.2 nF + 15 nF decoupling to VSS |
| IDATA | PSI5 Response Current Modulator | Modulates current onto VCC line for digital communication; supports 125/190.5 kBaud |
| VBUF | Buffer Regulator Input | Feeds internal regulators (VREG/VREGA); requires 500–1500 nF capacitor to VSS for EMC immunity |
| BUS_SW | Daisy Chain Gate Driver | Drives external N-channel FET gate to enable multi-sensor daisy chain topology |
| VREG / VREGA | Digital / Analog Supply Outputs | Provide regulated 2.5 V rails; require 1 μF capacitors to respective ground planes (VSS/VSSA) |
| VSS / VSSA | Digital / Analog Ground Returns | Separate ground paths prevent coupling between digital switching and analog sensing circuits |
Key Features
| Feature | Design Value |
|---|---|
| PSI5 v1.3 Compliance | Enables direct integration into modern automotive domain controllers without protocol translation or additional interface ICs |
| Programmable Time Slots | 0.5 μs resolution allows precise scheduling of up to 1023 sensors on single PSI5 bus with deterministic latency |
| Overdamped Z-Axis Sensing | ζ = 1.75 damping ratio and 13.6 kHz natural frequency ensure stable response to high-slew crash pulses without resonance artifacts |
| Two-Wire Programming Mode | Allows field reconfiguration of range, filter, CRC, baud rate, and daisy-chain address using only VCC/IDATA lines |
| Self-Test Capability | Generates known 35 LSB output during active self-test (gST10_240Z), enabling end-of-line functional verification |
Applications
| Frontal Crash Detection | Side Impact Detection |
|---|---|
Use Scenario: Mounted on vehicle firewall or dashboard to detect rapid deceleration during head-on collisions. IC Role / Device Role / Timing Role: Z-axis accelerometer providing real-time acceleration data to airbag control unit via PSI5 bus. Use Value: ±240g range and 400 Hz LPF reject road noise while capturing crash pulse rise time <10 ms for timely airbag deployment. | Use Scenario: Integrated into door modules or B-pillars to sense lateral acceleration during T-bone or side-swipe impacts. IC Role / Device Role / Timing Role: Single-axis inertial sensor delivering synchronized PSI5 data streams in daisy-chained configurations. Use Value: BUS_SW pin enables up to 32 sensors on one bus; 1 μs interpolation latency ensures phase-aligned impact timing across vehicle zones. |
| Occupant Classification System | Electronic Stability Control Backup |
Use Scenario: Mounted in seat structure to monitor occupant presence, position, and weight-induced static tilt. IC Role / Device Role / Timing Role: High-stability Z-axis sensor supplying low-drift offset-canceled data for classification algorithms. Use Value: 0.04 Hz HPF and two-stage offset cancellation reduce thermal drift to ±2 LSB over -40°C to +125°C. | Use Scenario: Redundant acceleration measurement in ESC modules where CAN bus failure may occur. IC Role / Device Role / Timing Role: Fail-operational inertial sensor with independent PSI5 interface and AEC-Q100 Grade 1 qualification. Use Value: Qualified for 150°C junction temperature; survives 2000 g powered shock and 2500 g unpowered shock per AEC-Q100. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inertial sensor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP MMA5222KWR2 | Same PSI5 interface, ±240g range, but uses newer SafeAssure architecture with enhanced diagnostics and lower power (3.5 mA typical) | Designed for next-gen ADAS platforms requiring ISO 26262 ASIL-B support; lacks legacy OTP programming flexibility | Select when functional safety certification and reduced power consumption outweigh need for field-programmable configuration |
| Analog Devices ADXL313WBRMZ-RL | I²C/SPI digital output, ±200g range, 13-bit resolution, no PSI5 support; requires external level-shifting for 12 V automotive bus | Suitable for non-PSI5 ECUs or prototyping; lacks integrated voltage regulators and daisy-chain capability | Select for cost-sensitive non-safety applications or development platforms lacking PSI5 infrastructure |
Compared with MMA5222KWR2, the MMA5124KWR2 offers broader field-programmability and proven legacy integration, while ADXL313WBRMZ-RL provides higher resolution but demands additional interface hardware and does not meet AEC-Q100 Grade 1 thermal requirements.
Availability
MMA5124KWR2 is available at Aetrix Electronics and suitable for automotive airbag systems, occupant classification modules, and electronic stability control units requiring stable component supply, long-term lifecycle management, and AEC-Q100-compliant sourcing.
Supply support for MMA5124KWR2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in sensor signal conditioning and automotive safety systems.
The MMA51xxKW product line was engineered specifically for PSI5-based automotive crash sensing, emphasizing robustness in high-EMI environments, deterministic timing, and fail-safe operation under extreme mechanical stress.
FAQ
What is the full-scale range and sensitivity of the MMA5124KWR2?
The MMA5124KWR2 has a ±240g full-scale range with 480 LSB/g sensitivity in 10-bit mode. Total sensitivity error is ±2% over temperature (-40°C to +125°C) and supply voltage (4.2 V to 17.0 V). This range balances high-g crash detection with sufficient resolution for low-level vibration monitoring in automotive safety systems.
How does the MMA5124KWR2 interface with the host controller?
The MMA5124KWR2 uses a two-wire PSI5 v1.3 interface: VCC supplies power and carries modulated response current on IDATA. It supports 125/190.5 kBaud, 8/10-bit data, even parity or 3-bit CRC, and programmable time slots. No external transceiver is needed - the MMA5124KWR2 drives the bus directly with built-in current modulation.
What are the key power supply requirements for the MMA5124KWR2?
The MMA5124KWR2 requires three regulated supplies: VBUF (3.6–4.0 V), VREG (2.425–2.575 V), and VREGA (2.425–2.575 V), each with dedicated 1 μF ceramic capacitors. VCC input ranges from 4.2 V to 17.0 V. Quiescent current is 4.0–8.0 mA; modulation current adds 22–30 mA during data transmission.
Does the MMA5124KWR2 support daisy-chaining multiple sensors?
Yes, the MMA5124KWR2 supports optional daisy chaining via the BUS_SW pin, which drives an external N-channel MOSFET gate to connect VSS to VSS_OUT. This enables up to 32 sensors on a single PSI5 bus. Time slot assignment (0x000–0x3FF) and sync pulse timing ensure deterministic, collision-free communication.
What diagnostic and self-test capabilities does the MMA5124KWR2 provide?
The MMA5124KWR2 includes continuous offset monitoring (±66 LSB limit), two-stage offset cancellation, and active self-test generating 35 LSB output (gST10_240Z). Built-in low-voltage detection on VCC/VBUF/VREG/VREGA, capacitor monitoring, and OTP CRC verification provide comprehensive fault coverage for ASIL-B compliance.
MMA5124KWR2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- MMA
- Package/Case:
- 16-QFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Digital
- Axis:
- Z
- Acceleration Range:
- ±240g
- Sensitivity (LSB/g):
- 2
- Sensitivity (mV/g):
- -
- Bandwidth:
- -
- Output Type:
- PCM, SPI
- Voltage - Supply:
- 4.2V ~ 17V
- Features:
- Selectable Low Pass Filter
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (6x6)
MMA5124KWR2 FAQ
1.How can I place an order for MMA5124KWR2 through Aetrix?
Please submit a Request for Quotation (RFQ) for MMA5124KWR2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MMA5124KWR2 reliable?
The price and inventory of MMA5124KWR2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MMA5124KWR2 is usually 5 days.
3.What payment methods are accepted for MMA5124KWR2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MMA5124KWR2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MMA5124KWR2?
MMA5124KWR2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MMA5124KWR2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MMA5124KWR2?
For technical support, including MMA5124KWR2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MMA5124KWR2 requirements.
6.How does Aetrix verify that MMA5124KWR2 is sourced from the original manufacturer or authorized distributors?
All MMA5124KWR2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MMA5124KWR2 meets industry standards.
7.What is the process for return or replacement of MMA5124KWR2?
All MMA5124KWR2 units undergo pre-shipment inspection (PSI). If there is an issue with MMA5124KWR2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MMA5124KWR2 part is unused and in its original packaging.
Return procedure for MMA5124KWR2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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