NXP Semiconductors MMA6222KEGR2
- Part No.:
- MMA6222KEGR2
- Manufacturer:
- NXP Semiconductors
- Category:
- Accelerometers
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
MMA6222KEGR2.pdf
- Description:
- ACCELEROMETER 20G ANALOG 20SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MMA6222KEGR2 from NXP Semiconductors (formerly Freescale) is a dual-axis micromachined accelerometer with SPI-compatible digital interface and ratiometric analog voltage outputs for X/Y axes. It delivers ±20g full-scale range per axis, 10-bit signed digital output, 400 Hz low-pass/0.1 Hz high-pass DSP filtering, and operates from 3.3 V or 5 V supply across –40°C to +105°C - designed for automotive crash detection and impact monitoring systems.
For engineers reviewing the MMA6222KEGR2 datasheet, MMA6222KEGR2 pinout, MMA6222KEGR2 application, or MMA6222KEGR2 equivalent, this page provides verified technical context, validated pin functions, confirmed AEC-Q100 Grade 2 qualification, real-world use cases in airbag deployment, and two documented alternative accelerometers with explicit functional and application-level differences.
Technical Context
The MMA6222KEGR2 integrates dual MEMS g-cells with on-chip DSP performing SINC filtering, offset/gain correction, and programmable high-pass/low-pass filtering. Its internal 4 MHz oscillator drives a 16 μs sample time and supports configurable filter cutoffs - 400 Hz LPF (–3 dB) and 0.1 Hz HPF - with 4-pole architecture.
Dual 10-bit signed digital outputs are delivered via SPI (CPOL=0, CPHA=0, MSB-first), while independent ratiometric DACs generate analog XOUT/YOUT voltages referenced to VCC. The device includes bidirectional self-test, on-chip temperature sensor, voltage regulator, and CAP/HOLD input for synchronized multi-sensor sampling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Full-Scale Range | ±20 g per axis - enables precise low-g crash event discrimination without saturation in airbag control units. |
| Digital Output Resolution | 10-bit signed - yields 1024 discrete levels with zero-centered coding (–512 to +511), supporting direct acceleration quantization. |
| Low-Pass Filter Cutoff | 400 Hz (–3 dB) - suppresses high-frequency vibration noise while preserving critical crash pulse rise-time fidelity. |
| High-Pass Filter Cutoff | 0.1 Hz - removes DC offset and quasi-static tilt effects, essential for dynamic shock detection in vehicle-mounted sensors. |
| Supply Voltage | 3.3 V or 5 V single supply - simplifies integration into legacy 5 V automotive ECUs or modern 3.3 V microcontroller domains. |
| Operating Temperature | –40°C to +105°C - meets AEC-Q100 Grade 2 requirements for under-hood and passenger compartment placement. |
| Self-Test Capability | Bidirectional internal self-test - verifies signal chain integrity for both axes simultaneously without external stimulus. |
Pinout & Package
Pb-free 20-pin SOIC package (Case 475A-02), 7.5 mm × 12.8 mm body, 1.27 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Digital power supply input | Accepts 3.15–5.25 V; requires external bypass capacitor to VSS for stable core operation. |
| VSS | Digital ground reference | Return path for digital circuitry; must be separated from analog ground (VSSA) for noise immunity. |
| VSSA | Analog ground reference | Return path for analog circuitry including DACs and g-cell front-end; requires dedicated bypass to VCC. |
| CREG | Digital regulator output filter node | Connects to internal digital rail; requires 800–1000 nF capacitor to VSS for clock stability and noise suppression. |
| CREGA | Analog regulator output filter node | Parallel pins for redundant connection to analog rail; each requires capacitor to VSSA for DAC accuracy. |
| CREF | Internal reference voltage filter node | Parallel pins tied to DAC reference; capacitors to VSSA ensure stable ratiometric analog output scaling. |
| SCLK | SPI serial clock input | Drives internal timing; also serves as hardware reset qualifier when held high with CS low for 512 μs. |
| CS/RESET | SPI chip select / hardware reset | Active-low SPI enable; double-function reset input - no external pull-up needed (internal pull-up provided). |
| DIN | SPI data input | Receives register address and control bits during first transfer phase; latched on SCLK rising edge. |
| DOUT | SPI data output | Drives acceleration data, status, and configuration during second transfer phase; high-impedance post-reset. |
| XOUT | X-axis analog DAC output | Ratiometric voltage (0.44×VCC to 0.56×VCC at 0 g); ±12% inherent DAC accuracy; 25 kΩ load capability. |
| YOUT | Y-axis analog DAC output | Functionally identical to XOUT; enables independent analog monitoring of both axes without multiplexing. |
| CAP/HOLD | Data capture synchronization input | Freezes acceleration result registers on rising edge - critical for time-aligned multi-sensor acquisition. |
| ST1/ST0 | Self-test control bits (via DEVCTL register) | Enable bidirectional electrostatic actuation of g-cells; ST0 activates test, ST1 selects polarity (± deflection). |
Key Features
| Feature | Design Value |
|---|---|
| Dual-axis SPI + analog outputs | Simultaneous 10-bit digital and ratiometric analog access to X/Y acceleration - eliminates need for external ADC in cost-sensitive designs. |
| Programmable DSP filtering | Configurable 400 Hz LPF and 0.1 Hz HPF implemented in silicon - reduces host MCU processing load and improves real-time response. |
| AEC-Q100 Grade 2 qualification | Validated for –40°C to +105°C operation with robust ESD (±2000 V HBM) and shock tolerance (±1500 g powered) - suitable for safety-critical automotive use. |
| Integrated diagnostics | On-chip temperature sensor, oscillator fault detection, offset error flags, and parity-protected OTP array - enables ISO 26262 ASIL-B ready system monitoring. |
| Minimal external components | Only five required capacitors (VCC/VSS, VSSA/VCC, CREG/VSS, CREGA/VSSA, CREF/VSSA) - reduces BOM count and PCB area vs. discrete solutions. |
Applications
| Crash Detection (Airbag) | Impact & Vibration Monitoring |
|---|---|
|
Use Scenario: Real-time deceleration measurement during frontal collision to trigger airbag deployment within 20 ms. IC Role / Device Role / Timing Role: Primary inertial sensing element feeding acceleration data to airbag control unit (ACU) via SPI; analog outputs used for redundant safing path. Use Value: ±20g range and 400 Hz LPF preserve crash pulse fidelity while rejecting road noise; AEC-Q100 Grade 2 ensures reliability in harsh under-hood environments. |
Use Scenario: Continuous monitoring of mechanical stress on industrial equipment or vehicle chassis to detect abnormal impacts or fatigue. IC Role / Device Role / Timing Role: Dual-axis motion sensor capturing transient shock events and sustained vibration spectra; CAP/HOLD enables synchronized logging across multiple nodes. Use Value: Bidirectional self-test validates sensor health before/after events; 0.1 Hz HPF removes mounting tilt drift, improving long-term baseline stability. |
| Shock Detection | Vehicle Safety System Safing |
|
Use Scenario: Detecting sudden high-g events such as drop testing, cargo handling impacts, or off-road vehicle landings. IC Role / Device Role / Timing Role: Standalone shock event detector triggering alarms or data capture; uses digital output for threshold comparison and analog output for waveform analysis. Use Value: ±800 g non-destructive limit and ±1500 g powered shock rating allow survivability in severe mechanical environments without recalibration. |
Use Scenario: Providing secondary confirmation signal to airbag deployment ICs, preventing false triggers from single-point failures. IC Role / Device Role / Timing Role: Independent sensing channel in dual-redundant safety architecture; communicates via SPI while analog outputs feed comparator-based safing logic. Use Value: Cross-axis sensitivity < ±4% prevents misinterpretation of lateral motion as longitudinal crash; on-chip temperature sensor compensates for thermal drift in real time. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-axis accelerometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MMA6255KEGR2 | ±50g full-scale range per axis; identical pinout, SPI interface, and package; same AEC-Q100 Grade 2 rating. | Higher g-range suits rollover detection or heavy-duty vehicle impact monitoring where ±20g is insufficient. | Select when higher dynamic range is required without changing layout or firmware interface - only register configuration differs. |
| ADXL322ARUZ | Analog-only output (X/Y/Z), no SPI; 3.3 V supply only; ±2 g to ±10 g selectable range; smaller 16-lead LFCSP package. | Lacks digital interface and self-test; suited for non-safety-critical consumer or industrial vibration sensing with simpler signal chain. | Choose for cost-sensitive, space-constrained applications needing only analog outputs and no functional safety compliance. |
Compared with MMA6222KEGR2, MMA6255KEGR2 offers extended range without design changes, while ADXL322ARUZ trades digital features and automotive qualification for compact size and lower cost in less demanding environments.
Availability
MMA6222KEGR2 is available at Aetrix Electronics and suitable for automotive safety systems, industrial impact monitors, and vehicle dynamics recorders requiring stable component supply, AEC-Q100 compliance, and long-term production continuity.
Supply support for MMA6222KEGR2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors acquired Freescale in 2015 and continues development of its automotive sensor portfolio, emphasizing functional safety, reliability, and integration for intelligent transportation systems.
The MMA62XXKEG series was engineered specifically for automotive crash sensing and occupant protection systems, combining MEMS precision with robust digital signal processing and AEC-Q100 qualification.
FAQ
What is the operating voltage range for the MMA6222KEGR2?
The MMA6222KEGR2 supports dual supply options: 3.15 V to 3.45 V (3.3 V nominal) or 4.75 V to 5.25 V (5 V nominal). Both ranges are fully characterized across the full temperature range (–40°C to +105°C), and internal regulation ensures stable operation regardless of rail choice. The MMA6222KEGR2 does not support intermediate voltages outside these bands.
Does the MMA6222KEGR2 provide true 10-bit resolution across its full ±20g range?
Yes, the MMA6222KEGR2 delivers 10-bit signed digital output (–512 to +511) with guaranteed monotonicity and ±1 LSB INL. At ±20g range, sensitivity is 0.04097 g/digit (typical), yielding ~0.04 g per LSB - confirmed by production test at both VL and VH supply conditions per datasheet Section 2.3, Ref 45.
How is the analog output (XOUT/YOUT) calibrated, and what is its accuracy?
XOUT and YOUT are ratiometric DAC outputs trimmed for digital operation, with inherent accuracy of ±12% over temperature (–40°C to +105°C). Offset is trimmed to 0.5 × VCC at 0 g (±0.06 × VCC), and gain error is ±0.3%FSR. DAC linearity is specified as ±2 digits DNL and ±3.5 digits INL (Ref 84–90).
Can the MMA6222KEGR2's high-pass filter be disabled?
Yes - the high-pass filter can be bypassed via the HPFB bit (bit 4) in the DEVCTL register ($0E). When HPFB = 1, the 0.1 Hz HPF is removed from the DSP signal chain, allowing DC-coupled acceleration measurement. This setting persists until cleared or reset, and is confirmed in Section 3.1.1.3 of the datasheet.
What is the purpose of the CAP/HOLD pin on the MMA6222KEGR2?
The CAP/HOLD pin freezes the contents of the acceleration result registers on its rising edge, enabling synchronized sampling across multiple MMA6222KEGR2 devices or with other sensors. While held high, registers retain their last sampled value - critical for time-aligned crash event capture in multi-axis safety systems.
MMA6222KEGR2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- MMA
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Analog
- Axis:
- X, Y
- Acceleration Range:
- ±20g
- Sensitivity (LSB/g):
- -
- Sensitivity (mV/g):
- 23.40mV/V/g
- Bandwidth:
- 3kHz
- Output Type:
- Analog Voltage
- Voltage - Supply:
- 3.15V ~ 5.25V
- Features:
- -
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SOIC
MMA6222KEGR2 FAQ
1.How can I place an order for MMA6222KEGR2 through Aetrix?
Please submit a Request for Quotation (RFQ) for MMA6222KEGR2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MMA6222KEGR2 reliable?
The price and inventory of MMA6222KEGR2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MMA6222KEGR2 is usually 5 days.
3.What payment methods are accepted for MMA6222KEGR2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MMA6222KEGR2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MMA6222KEGR2?
MMA6222KEGR2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MMA6222KEGR2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MMA6222KEGR2?
For technical support, including MMA6222KEGR2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MMA6222KEGR2 requirements.
6.How does Aetrix verify that MMA6222KEGR2 is sourced from the original manufacturer or authorized distributors?
All MMA6222KEGR2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MMA6222KEGR2 meets industry standards.
7.What is the process for return or replacement of MMA6222KEGR2?
All MMA6222KEGR2 units undergo pre-shipment inspection (PSI). If there is an issue with MMA6222KEGR2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MMA6222KEGR2 part is unused and in its original packaging.
Return procedure for MMA6222KEGR2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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