My Inquiry
My Account
Microchip Technology MPLAD36KP18CAE3/TR
- Part No.:
- MPLAD36KP18CAE3/TR
- Manufacturer:
- Microchip Technology
- Category:
- TVS Diodes
- Package:
- Nonstandard SMD
- Datasheet:
-
MPLAD36KP18CAE3/TR.pdf
- Description:
- SURFACE MOUNT 36,000 WATT, TVS,
- Quantity:
- Payment:
- Shipping:
Inventory:5,655
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MPLAD36KP18CAE3/TR from Microsemi (now Microchip) is a bidirectional surface-mount transient voltage suppressor (TVS) designed for high-energy surge protection in aerospace, automotive, and industrial power rails. It features a 18 V working standoff voltage (VWM), 20.0–22.1 V breakdown voltage (VBR) at 5 mA, 30.8 V clamping voltage (VC) at 1169 A peak pulse current, and 36,000 W peak pulse power rating at 10/1000 μs waveform - validated for RTCA DO-160 Section 22 multi-stroke lightning compliance.
For engineers reviewing the MPLAD36KP18CAE3/TR datasheet, MPLAD36KP18CAE3/TR pinout, MPLAD36KP18CAE3/TR application, or MPLAD36KP18CAE3/TR equivalent, key selection criteria include bidirectional polarity, low thermal resistance (RθJC = 1.0 °C/W), IEC 61000-4-5 Class 5 secondary lightning protection capability, and RoHS-compliant matte-tin plating with e3 marking.
Technical Context
This TVS diode operates in avalanche breakdown mode to clamp transient overvoltages across DC power lines, with bidirectional symmetry enabling protection against both positive and negative polarity surges without external polarity management. Its PLAD package integrates a metal base acting as the cathode terminal, optimized for low-inductance, high-current pulse conduction and efficient heat transfer to PCB copper planes.
The device meets AEC-Q101 qualification and supports full IEC 61000-4-2 ESD (±30 kV contact), IEC 61000-4-4 EFT (40 A), and IEC 61000-4-5 surge immunity up to Class 5 (42 Ω source, long-distance configuration). Clamping response time is <5 ns for bidirectional operation, ensuring sub-microsecond suppression of fast-rising transients such as pin injection per RTCA/DO-160G Waveform 4.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VWM | 18 V - Maximum continuous DC or repetitive peak reverse voltage the device blocks without conduction; sets minimum system operating voltage margin. |
| VBR @ IBR | 20.0–22.1 V at 5 mA - Measured breakdown threshold defining onset of avalanche clamping; tight tolerance enables precise overvoltage trip setting. |
| VC @ IPP | 30.8 V at 1169 A - Maximum voltage seen by protected circuit during 10/1000 μs surge; determines downstream component voltage stress. |
| PPP | 36,000 W - Peak pulse power handling capacity at standard 10/1000 μs waveform; defines single-event energy absorption limit. |
| RθJC | 1.0 °C/W - Junction-to-case thermal resistance; enables direct mounting to heatsink or thick copper pour for sustained surge duty cycling. |
| IPP Max | 1169 A - Maximum non-repetitive peak impulse current; defines maximum surge current the device safely diverts without failure. |
| αV(BR) | 16 mV/°C - Temperature coefficient of breakdown voltage; allows accurate derating of VBR over –55°C to +150°C operating range. |
Pinout & Package
The MPLAD36KP18CAE3/TR uses the PLAD (Power Leadless Array Device) surface-mount package: a void-free UL94V-0 epoxy body with exposed metal base (cathode) and top-side anode marking. Dimensions are 10.3 × 8.2 × 3.7 mm (L × W × H); weight ≈ 1.8 g. Mounting requires recommended pad layout per Figure 7 (FR4, 1 oz Cu) for optimal thermal performance and solder joint reliability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Metal Base (Bottom) | Cathode (Bidirectional) | Primary current return path and thermal interface; must be soldered to large copper area for RθJC = 1.0 °C/W performance. |
| Top-Side Marked Terminal | Anode (Bidirectional) | Signal/power input node; polarity marking indicates cathode location; symmetric construction enables AC or dual-polarity DC protection. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional construction (CA suffix) | Enables symmetrical clamping for AC lines or ungrounded DC buses without polarity-sensitive placement or external diodes. |
| 36 kW peak pulse power rating | Supports single-event lightning surge immunity per RTCA DO-160 Section 22 Level 4/5 without cascaded protection stages. |
| AEC-Q101 qualified & lot traceable | Validated for automotive under-hood applications with wafer/assembly lot tracking for failure root-cause analysis. |
| Moisture sensitivity Level 1 | Eliminates dry-pack requirement and bake-out prior to reflow; compatible with standard J-STD-020D.1 assembly flow. |
| RoHS-compliant matte-tin plating (e3) | Ensures reliable solderability per MIL-STD-750 Method 2026 and eliminates lead-based process compatibility concerns. |
Applications
| Aerospace Power Distribution | Automotive Load Dump Protection |
|---|---|
Use Scenario: 28 V DC distribution bus in commercial aircraft avionics bays subjected to multi-stroke lightning-induced surges per RTCA DO-160G Section 22. IC Role / Device Role / Timing Role: Primary bidirectional TVS clamp on main power feed, placed upstream of DC-DC converters and flight control electronics. Use Value: Withstands ≥36,000 W pulses at <5 ns response, meeting Level 5 pin injection (Waveform 4) and multi-stroke endurance without degradation. |
Use Scenario: 12 V/24 V battery-fed ECU power input exposed to ISO 7637-2 Load Dump pulses (up to 120 V, 400 ms). IC Role / Device Role / Timing Role: Standoff-clamp TVS placed directly at connector entry point to shunt surge energy before LDO regulators and microcontrollers. Use Value: 18 V VWM ensures no conduction during normal 28.5 V max alternator output; 30.8 V VC protects downstream ICs rated for 36 V absolute max. |
| Industrial Motor Drive DC Bus | Renewable Energy Inverter Input |
Use Scenario: 400 V DC link in servo drive systems subject to IGBT switching transients and induced RFI from adjacent power cables. IC Role / Device Role / Timing Role: Bidirectional TVS across DC+ and DC− rails to suppress common-mode and differential-mode voltage spikes. Use Value: 1.0 °C/W RθJC allows direct thermal coupling to aluminum heatsink, sustaining repeated 10/1000 μs surges without thermal runaway. |
Use Scenario: PV string combiner box input terminals exposed to IEC 61000-4-5 surge events (Class 4, 42 Ω source) during thunderstorms. IC Role / Device Role / Timing Role: Secondary protection stage after gas discharge tube (GDT), providing low-clamping final-stage suppression. Use Value: 30.8 V clamping at 1169 A ensures downstream MPPT controller survives 4 kV open-circuit surge with <100 V residual voltage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMBJ18CA | Lower PPP (600 W), smaller SMB package, higher VC (29.2 V at 32.4 A), RθJC ≈ 35 °C/W. | Suitable only for low-energy ESD/EFT; cannot meet DO-160G Section 22 or IEC 61000-4-5 Class 4/5. | Select when space-constrained and surge energy ≤100 J; not a drop-in replacement for MPLAD36KP18CAE3/TR. |
| SMCJ18CA | Higher PPP (1500 W), SMC package, VC = 29.2 V at 51.1 A, RθJC ≈ 15 °C/W, no AEC-Q101 or DO-160 qualification. | Acceptable for industrial IEC 61000-4-5 Class 3, but lacks aerospace-grade traceability and multi-stroke validation. | Choose for cost-sensitive industrial designs where full DO-160G compliance is not required. |
Compared with SMBJ18CA and SMCJ18CA, the MPLAD36KP18CAE3/TR delivers 24× and 24× higher peak power handling respectively, with certified aerospace qualification, lower thermal resistance, and validated multi-stroke lightning endurance - making it irreplaceable in safety-critical airborne and high-reliability automotive systems.
Availability
MPLAD36KP18CAE3/TR is available at Aetrix Electronics and suitable for aerospace power distribution, automotive load dump protection, and industrial motor drive DC bus applications requiring stable component supply, full traceability, and long-term lifecycle support.
Supply support for MPLAD36KP18CAE3/TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microsemi - now part of Microchip Technology - is a U.S.-based semiconductor company specializing in high-reliability analog, mixed-signal, and power management solutions for aerospace, defense, and industrial markets.
The MPLAD36KP18CAE3/TR belongs to Microsemi's high-power PLAD-series TVS family, engineered specifically for mission-critical surge protection in environments demanding RTCA DO-160, AEC-Q101, and IEC 61000-4-x compliance.
FAQ
What is the clamping voltage of the MPLAD36KP18CAE3/TR at its rated peak pulse current?
The MPLAD36KP18CAE3/TR has a maximum clamping voltage (VC) of 30.8 V when subjected to its rated peak pulse current of 1169 A under the standard 10/1000 μs waveform. This value is measured per test condition defined in Table 4 of the official datasheet and represents the upper voltage limit imposed on the protected circuit during worst-case surge events.
Is the MPLAD36KP18CAE3/TR suitable for automotive applications per AEC-Q101?
Yes, the MPLAD36KP18CAE3/TR is fully AEC-Q101 qualified and tested for temperature cycling, humidity bias, mechanical shock, and surge robustness. Its qualification covers the full –55°C to +150°C junction temperature range and includes wafer-level and assembly lot traceability - making it approved for under-hood automotive ECUs and powertrain modules.
Does the MPLAD36KP18CAE3/TR require moisture-sensitive handling precautions?
No - the MPLAD36KP18CAE3/TR is rated IPC/JEDEC J-STD-020D.1 Moisture Sensitivity Level 1, meaning it may be stored indefinitely at ambient conditions and processed in standard reflow without baking or dry-pack requirements. This simplifies manufacturing logistics and reduces assembly risk.
How does the PLAD package of the MPLAD36KP18CAE3/TR improve thermal performance compared to SMB or SMC packages?
The PLAD package of the MPLAD36KP18CAE3/TR achieves a junction-to-case thermal resistance (RθJC) of just 1.0 °C/W - over 10× better than typical SMB (≈12 °C/W) or SMC (≈15 °C/W) packages - due to its exposed metal base directly bonded to PCB copper. This enables effective heat dissipation during repetitive surge events and supports higher average power handling in compact layouts.
Can the MPLAD36KP18CAE3/TR be used for bidirectional AC line protection?
Yes, the "CA" suffix confirms bidirectional construction, allowing the MPLAD36KP18CAE3/TR to protect AC-coupled or floating DC systems where voltage polarity reverses. Its symmetrical VBR and VC characteristics ensure consistent clamping in both directions, eliminating need for back-to-back diode configurations in transformerless or isolated power interfaces.
MPLAD36KP18CAE3/TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- Nonstandard SMD
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 18V
- Voltage - Breakdown (Min):
- 20V
- Voltage - Clamping (Max) @ Ipp:
- 30.8V
- Current - Peak Pulse (10/1000µs):
- 1169A (1.169kA)
- Power - Peak Pulse:
- 36000W (36kW)
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- Military
- Qualification:
- MIL-PRF-19500
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PLAD
MPLAD36KP18CAE3/TR FAQ
1.How can I place an order for MPLAD36KP18CAE3/TR through Aetrix?
Please submit a Request for Quotation (RFQ) for MPLAD36KP18CAE3/TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPLAD36KP18CAE3/TR reliable?
The price and inventory of MPLAD36KP18CAE3/TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPLAD36KP18CAE3/TR is usually 5 days.
3.What payment methods are accepted for MPLAD36KP18CAE3/TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPLAD36KP18CAE3/TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPLAD36KP18CAE3/TR?
MPLAD36KP18CAE3/TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPLAD36KP18CAE3/TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPLAD36KP18CAE3/TR?
For technical support, including MPLAD36KP18CAE3/TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPLAD36KP18CAE3/TR requirements.
6.How does Aetrix verify that MPLAD36KP18CAE3/TR is sourced from the original manufacturer or authorized distributors?
All MPLAD36KP18CAE3/TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPLAD36KP18CAE3/TR meets industry standards.
7.What is the process for return or replacement of MPLAD36KP18CAE3/TR?
All MPLAD36KP18CAE3/TR units undergo pre-shipment inspection (PSI). If there is an issue with MPLAD36KP18CAE3/TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPLAD36KP18CAE3/TR part is unused and in its original packaging.
Return procedure for MPLAD36KP18CAE3/TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MPLAD36KP18CAE3/TR Tags
-
ESD9B5.0ST5G
onsemi
-
DESD3V3E1BL-7B
Diodes Incorporated
-
ESD5Z3.3T1G
onsemi
-
D5V0H1B2LP-7B
Diodes Incorporated
-
D5V0P1B2LP-7B
Diodes Incorporated
-
DESD5V0U1BA-7
Diodes Incorporated
-
ESD5Z5.0T1G
onsemi
-
DESD5V0U1BB-7
Diodes Incorporated
-
D12V0L1B2LP-7B
Diodes Incorporated
-
PESD2V0Y1BSFYL
Nexperia USA Inc.
-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage
-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
