onsemi NUP4000DR2G
- Part No.:
- NUP4000DR2G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
NUP4000DR2G.pdf
- Description:
- TVS DIODE 15VWM 30VC 8-SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,924
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Product details
Overview
NUP4000DR2G from onsemi is a bi-directional ESD protection diode array in SO-8 package, designed for high-speed data line protection with 15 V reverse working voltage, ±15 kV air/±8 kV contact ESD rating per IEC 61000-4-2, and 400 W peak pulse power (8 × 20 µs). It safeguards up to four communication lines in notebook PCs, LAN/WAN equipment, and serial/parallel ports.
For engineers reviewing the NUP4000DR2G datasheet, pinout, applications, or equivalent options, key selection considerations include clamping voltage at 1 A (≤24 V), junction capacitance (75 pF @ 0 V, 1 MHz), and SOIC-8 NB (Case 751-07) mechanical compatibility for high-density PCB layouts.
Technical Context
The NUP4000DR2G integrates four identical bi-directional TVS diodes in a single SO-8 package, each configured as an anode-cathode pair sharing a common cathode terminal (Pin 8). Its architecture enables simultaneous protection of four independent signal lines without cross-talk or shared conduction paths.
It meets IEC 61000-4-2 (ESD), -4-4 (EFT), and -4-5 (lightning surge) standards with verified 12 A (8/20 µs) surge current capability and 10 A peak pulse current rating. The device operates across −55 °C to +150 °C junction temperature range and features UL 94 V-0 flammability compliance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Working Voltage | 15 V - Maximum continuous DC or RMS signal voltage the device tolerates without clamping. |
| Clamping Voltage @ 1 A | ≤24 V - Voltage seen by protected circuit during 1 A ESD event; ensures downstream ICs remain within safe operating limits. |
| Junction Capacitance | 75 pF @ 0 V, 1 MHz - Low enough for USB 2.0 and other high-speed interfaces without signal integrity degradation. |
| Peak Pulse Power | 400 W (8 × 20 µs) - Sustains transient energy from lightning surges and system-level ESD events. |
| ESD Rating | ±15 kV air / ±8 kV contact (IEC 61000-4-2) - Meets industrial and computing equipment immunity requirements. |
| Package | SOIC-8 NB (Case 751-07) - Standard surface-mount footprint with 1.27 mm pitch; compatible with automated assembly. |
Pinout & Package
SOIC-8 NB package (Case 751-07), 8-pin narrow-body surface-mount outline with 1.27 mm lead pitch and 5.0 mm × 4.0 mm body dimensions. Pin 1 marked by notch or dot; moisture sensitivity level (MSL) 1 per J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–4 | Anode (per channel) | Each connects to one protected I/O line; conducts transient current toward common cathode during overvoltage events. |
| 5–7 | Not connected (N.C.) | No internal connection; electrically isolated; must be left floating or tied to ground only if required by layout rules. |
| 8 | Common Cathode | Single return path for all four channels; must be routed with low-inductance connection to system ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| Bi-directional ESD protection | Enables symmetric clamping for AC-coupled or bidirectional data lines (e.g., USB D+, D−, RS-485 A/B) without polarity constraints. |
| Low junction capacitance | 75 pF supports signal integrity in 480 Mbps USB 2.0 and 100 Mbps Ethernet applications without measurable rise-time degradation. |
| High surge robustness | 12 A (8/20 µs) lightning surge rating allows use in unshielded front-panel connectors exposed to harsh environments. |
| Pb-free, RoHS-compliant construction | Meets global environmental regulations and reflow soldering profiles up to 260 °C peak temperature for lead-free assembly. |
Applications
| USB 2.0 Port Protection | LAN/WAN Interface Protection |
|---|---|
|
Use Scenario: Protecting D+ and D− differential pairs on motherboard USB 2.0 headers against ESD discharge during hot-plug insertion. IC Role / Device Role / Timing Role: Transient voltage suppressor placed directly at connector entry point to clamp fast-rising ESD pulses before reaching USB transceiver. Use Value: Limits clamped voltage to ≤24 V at 1 A, preserving USB PHY tolerance while maintaining 480 Mbps data rate via 75 pF capacitance. |
Use Scenario: Shielding RJ-45 Ethernet PHY pins (TX+/−, RX+/−) from ESD and EFT events in enterprise switches and routers. IC Role / Device Role / Timing Role: Four-channel bi-directional TVS array providing coordinated protection for full-duplex 100BASE-TX signaling lines. Use Value: Delivers ±15 kV air-gap ESD immunity and 40 A EFT burst suppression without degrading signal edge rates due to low capacitance. |
| Notebook PC I/O Port Protection | Server Backplane Data Line Protection |
|
Use Scenario: Safeguarding serial (RS-232), parallel (IEEE 1284), and PS/2 keyboard/mouse ports on compact laptop motherboards. IC Role / Device Role / Timing Role: Single-component solution replacing discrete diode arrays, reducing BOM count and PCB area for multi-interface protection. Use Value: SOIC-8 footprint consolidates protection for four independent lines with 15 V VRWM matching typical I/O rail voltages. |
Use Scenario: Protecting high-speed control and status signals (e.g., SMBus, I²C, GPIO) between server CPU and hot-swap backplane controllers. IC Role / Device Role / Timing Role: ESD guard for low-voltage, low-current digital buses operating at 3.3 V or 5 V with strict noise immunity requirements. Use Value: 1.0 µA max leakage at 15 V ensures no impact on bus pull-up/pull-down networks or logic thresholds. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD4E001DRYR | Lower clamping voltage (≤14 V @ 1 A), higher capacitance (12 pF per channel), 4-channel SC-70 package. | Better for ultra-high-speed interfaces (e.g., USB 3.0 Gen 1), but limited to lower surge ratings (4 A IEC 61000-4-5). | Choose TPD4E001DRYR when signal integrity at >1 Gbps is critical and surge exposure is limited to ESD/EFT only. |
| SZ1.5SMC15AT3G | Single-channel 15 V TVS, 1500 W peak power, DO-214AB package; not multi-channel or pin-compatible. | Requires four separate devices and more PCB area; suited for high-energy lightning protection where channel isolation is mandatory. | Choose SZ1.5SMC15AT3G only when individual channel surge handling >12 A is required and board space permits discrete placement. |
Compared with TPD4E001DRYR and SZ1.5SMC15AT3G, the NUP4000DR2G uniquely balances multi-line integration, 400 W surge capacity, and 75 pF capacitance-making it optimal for cost-sensitive, space-constrained designs requiring certified IEC 61000-4-2/4-4/4-5 protection across four lines in one SO-8 footprint.
Availability
NUP4000DR2G is available at Aetrix Electronics and suitable for notebook PC I/O protection, LAN/WAN interface hardening, and server backplane signal line safeguarding requiring stable component supply and long-term lifecycle support.
Supply support for NUP4000DR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensor, and ESD protection solutions for automotive, industrial, and computing markets.
The NUP4000DR2G belongs to onsemi's ESD protection diode array product line, engineered specifically for high-speed data line immunity in consumer and enterprise computing platforms with stringent IEC compliance requirements.
FAQ
What is the maximum clamping voltage of the NUP4000DR2G at 5 A surge current?
The NUP4000DR2G exhibits a maximum clamping voltage of 30 V when subjected to a 5.0 A, 8 × 20 µs surge pulse. This value ensures protected circuits remain within safe operating margins during moderate-energy transients such as contact ESD or EFT bursts. The clamping performance is specified under standardized test conditions and verified per IEC 61000-4-2 methodology. Designers should reference this parameter alongside the 15 V reverse working voltage to confirm margin for downstream ICs. The NUP4000DR2G maintains consistent clamping behavior across its full operating temperature range.
Does the NUP4000DR2G support bi-directional signal lines like USB D+ and D−?
Yes, the NUP4000DR2G is explicitly designed for bi-directional high-speed data lines including USB 2.0 D+ and D−. Its internal structure consists of four identical anode-cathode diode pairs sharing a common cathode (Pin 8), enabling symmetrical clamping for both positive and negative transients. This eliminates polarity concerns during layout and ensures equal protection regardless of signal swing direction. The NUP4000DR2G's 75 pF junction capacitance avoids signal distortion in 480 Mbps USB applications. Its SOIC-8 footprint simplifies routing for differential pair protection.
What is the meaning of "NUP4000DR2G" in the part number breakdown?
In NUP4000DR2G, "NUP" denotes onsemi's ESD protection diode array family; "4000" identifies the specific 4-channel, 15 V device; "D" indicates SOIC-8 package; "R2" specifies tape-and-reel packaging (2500 units per reel); and "G" certifies Pb-free, RoHS-compliant construction. This full designation ensures traceability to the exact mechanical, electrical, and environmental specifications defined in the NUP4000/D datasheet. The NUP4000DR2G is not interchangeable with variants lacking the "G" suffix due to differing material content and reflow profile requirements.
Can the NUP4000DR2G replace discrete Zener diodes in ESD protection circuits?
The NUP4000DR2G is not a drop-in replacement for discrete Zener diodes, as it functions as a specialized bi-directional TVS array-not a voltage regulator. While both limit overvoltage, the NUP4000DR2G offers faster response (<1 ns), lower clamping voltage at high currents, and integrated multi-channel architecture. Discrete Zeners lack standardized ESD ratings and cannot meet IEC 61000-4-2 ±15 kV requirements. For new designs targeting certified ESD immunity, the NUP4000DR2G provides validated performance where discrete Zeners would require complex external biasing and fail qualification testing.
Is the NUP4000DR2G suitable for protecting 3.3 V logic interfaces?
Yes, the NUP4000DR2G is suitable for protecting 3.3 V logic interfaces, provided the protected line operates within its 15 V reverse working voltage limit and does not exceed 1.0 µA leakage at that voltage. Its 24 V clamping voltage at 1 A ensures adequate margin above 3.3 V rail levels during ESD events. Designers must verify that downstream receivers tolerate the clamped voltage and that PCB layout minimizes inductance in the cathode return path. The NUP4000DR2G has been deployed in 3.3 V I²C, SMBus, and GPIO protection schemes in servers and notebooks.
NUP4000DR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 4
- Voltage - Reverse Standoff (Typ):
- 15V (Max)
- Voltage - Breakdown (Min):
- 16.7V
- Voltage - Clamping (Max) @ Ipp:
- 30V
- Current - Peak Pulse (10/1000µs):
- 10A (8/20µs)
- Power - Peak Pulse:
- 400W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 75pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
NUP4000DR2G FAQ
1.How can I place an order for NUP4000DR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NUP4000DR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NUP4000DR2G reliable?
The price and inventory of NUP4000DR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NUP4000DR2G is usually 5 days.
3.What payment methods are accepted for NUP4000DR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NUP4000DR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NUP4000DR2G?
NUP4000DR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NUP4000DR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NUP4000DR2G?
For technical support, including NUP4000DR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NUP4000DR2G requirements.
6.How does Aetrix verify that NUP4000DR2G is sourced from the original manufacturer or authorized distributors?
All NUP4000DR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NUP4000DR2G meets industry standards.
7.What is the process for return or replacement of NUP4000DR2G?
All NUP4000DR2G units undergo pre-shipment inspection (PSI). If there is an issue with NUP4000DR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NUP4000DR2G part is unused and in its original packaging.
Return procedure for NUP4000DR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NUP4000DR2G Tags

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ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

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ESD5Z3.3T1G
onsemi

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D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
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