onsemi NUP4016P5T5G
- Part No.:
- NUP4016P5T5G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SOT-953
- Datasheet:
-
NUP4016P5T5G.pdf
- Description:
- TVS DIODE 5VWM SOT953
- Quantity:
- Payment:

- Shipping:

Inventory:3,459
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Product details
Overview
NUP4016P5T5G from onsemi is an ultra-low-capacitance TVS diode array designed for ESD protection of high-speed data lines. It features 0.5 pF typical junction capacitance between I/O and ground, 5.0 V reverse working voltage, and IEC 61000−4−2 ±15 kV contact ESD rating - making it suitable for USB 2.0 differential data line protection in portable electronics.
For engineers reviewing the NUP4016P5T5G datasheet, pinout, applications, or equivalent options, key selection criteria include clamping voltage under 8 kV ESD stress, sub-1 pF inter-pin capacitance, AEC-Q101 qualification status, and SOT-953 package compatibility with high-density PCB layouts.
Technical Context
The NUP4016P5T5G integrates four bidirectional TVS diodes in a single SOT-953 package, configured to protect two differential pairs (e.g., D+/D− and VBUS/GND in USB 2.0). Its low 0.3–0.5 pF inter-pin capacitance preserves signal integrity up to 480 Mbps without distortion.
It operates across −40°C to +125°C, supports 5.5 V breakdown voltage at 1 mA test current, and delivers clamping voltage ≤12 V under 8 kV IEC 61000−4−2 contact discharge - critical for safeguarding 3.3 V/5 V interface transceivers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Working Voltage | 5.0 V - matches standard USB 2.0 VBUS and data line DC bias levels without leakage-induced signal degradation |
| Breakdown Voltage | 5.5 V min at 1 mA - ensures reliable conduction onset before damage to downstream PHY circuitry |
| Junction Capacitance (I/O–GND) | 0.5 pF typical - enables minimal signal rise-time degradation on 480 Mbps USB 2.0 channels |
| Junction Capacitance (I/O–I/O) | 0.3 pF typical - preserves differential impedance and common-mode rejection in high-speed pairs |
| ESD Rating (IEC 61000−4−2) | ±15 kV contact - exceeds industrial immunity requirements for handheld and docking interfaces |
| Operating Temperature Range | −40°C to +125°C - supports deployment in automotive infotainment and industrial USB host ports |
Pinout & Package
SOT-953 (Case 527AE), 1.00 mm × 0.80 mm × 0.37 mm, 5-pin package with exposed pad (non-electrical); lead-free, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | I/O1 (Data Line A+) | Protected input/output terminal for first high-speed differential signal |
| 2 | GND | Common reference for all TVS clamps; must be low-inductance connection to system ground plane |
| 3 | I/O2 (Data Line A−) | Complementary terminal to Pin 1; forms differential pair with Pin 1 |
| 4 | I/O3 (Power or Data Line B+) | Second protected line - configurable for VBUS or auxiliary data path |
| 5 | I/O4 (Data Line B− or GND) | Paired with Pin 4; may serve as return or second differential pair depending on layout |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low I/O-to-GND capacitance | 0.5 pF typical - maintains USB 2.0 eye diagram compliance and minimizes jitter accumulation |
| AEC-Q101 qualification | Validated for automotive-grade reliability including temperature cycling and HTRB - suitable for center-stack USB ports |
| IEC 61000−4−2 ±15 kV contact ESD protection | Clamps transient energy before IC-level damage occurs - eliminates need for secondary board-level protection |
| SZ-prefix variant availability | SZNUP4016P5T5G denotes automotive-specific traceability and PPAP support - required for Tier 1 OEM BOMs |
Applications
| USB 2.0 High-Speed Interface | Gigabit Ethernet PHY Protection |
|---|---|
Use Scenario: Protecting D+/D− lines of USB 2.0 host/device connectors against repeated ESD events during plugging/unplugging. IC Role / Device Role / Timing Role: Bidirectional TVS clamp placed immediately adjacent to connector to shunt ESD current to ground before reaching transceiver. Use Value: 0.5 pF capacitance prevents signal integrity loss at 480 Mbps; ±15 kV IEC rating ensures >10,000 insertion cycles without performance drift. | Use Scenario: Safeguarding MDI differential pairs in 1000BASE-T Ethernet PHYs exposed to field ESD during cable mating. IC Role / Device Role / Timing Role: Low-capacitance transient suppressor bridging each twisted pair to chassis ground, preserving 100 MHz bandwidth. Use Value: 0.3 pF inter-pin capacitance avoids skew between pair members; 5.5 V VBR aligns with PHY common-mode voltage range. |
| Automotive Infotainment Display Link | Portable Media Player I/O Protection |
Use Scenario: Shielding LVDS or internal USB links between head unit MCU and TFT display module in vehicles. IC Role / Device Role / Timing Role: AEC-Q101-qualified TVS array mounted at display flex-cable entry point to absorb coupling from nearby RF sources and handling ESD. Use Value: −40°C to +125°C operation sustains protection across cabin thermal extremes; SOT-953 footprint enables placement within tight connector keepouts. | Use Scenario: Securing headphone jack, microSD slot, and mini-USB port on MP3 players subjected to frequent user contact. IC Role / Device Role / Timing Role: Single-device solution protecting multiple low-voltage I/O rails with shared ground return, minimizing BOM count. Use Value: UL 94 V-0 flammability rating meets portable device safety standards; 4000-unit tape-and-reel packaging supports high-volume SMT assembly. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar TVS array applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD4E001DQAR | 0.7 pF I/O–GND capacitance; lower 3.6 V VRWM; same SOT-563 package | Better suited for 3.3 V logic interfaces; less margin for 5 V VBUS lines | Select when protecting only low-voltage data lines (e.g., I²C, UART) with tighter capacitance tolerance |
| SMA6J5.0A | Discrete SMA package; 5.0 V VRWM; 100 pF capacitance; unidirectional | Requires external routing for multi-line protection; unsuitable for USB 2.0 due to capacitance | Use only for cost-sensitive, non-high-speed power rail clamping where layout space permits discrete devices |
Compared with TPD4E001DQAR and SMA6J5.0A, the NUP4016P5T5G uniquely balances 5.0 V VRWM, 0.5 pF I/O–GND capacitance, and integrated 4-line protection - enabling compact, high-fidelity USB 2.0 interface hardening without signal compromise.
Availability
NUP4016P5T5G is available at Aetrix Electronics and suitable for USB 2.0 interface protection, automotive infotainment systems, and portable media player designs requiring stable component supply and long-term lifecycle assurance.
Supply support for NUP4016P5T5G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient, high-performance silicon solutions for automotive, industrial, cloud, medical, and consumer electronics.
The NUP4016P5T5G belongs to onsemi's transient voltage suppression portfolio, engineered specifically for high-speed serial interface protection where signal fidelity and ESD robustness must coexist in miniature packages.
FAQ
What is the maximum operating temperature for the NUP4016P5T5G?
The NUP4016P5T5G supports continuous operation from −40°C to +125°C junction temperature. This range is validated per AEC-Q101 stress testing and allows use in under-hood automotive modules and thermally constrained portable enclosures. Derating is not required within this envelope, and the NUP4016P5T5G maintains specified clamping performance across the full span.
Does the NUP4016P5T5G support bidirectional ESD protection?
Yes, the NUP4016P5T5G provides symmetrical, bidirectional clamping on all protected lines. Each I/O pin connects to ground through back-to-back diode junctions, enabling protection against both positive and negative ESD transients - essential for AC-coupled differential signals like USB 2.0 D+ and D−. This behavior is confirmed in the device's IEC 61000−4−2 test reports.
Is the NUP4016P5T5G pin-compatible with the SZNUP4016P5T5G?
Yes, the NUP4016P5T5G and SZNUP4016P5T5G share identical electrical specifications, pinout, package dimensions, and thermal characteristics. The SZ prefix indicates automotive-specific traceability, PPAP documentation, and enhanced process controls - but no physical or functional differences exist between the two part numbers in circuit design or layout.
What is the clamping voltage of the NUP4016P5T5G under 8 kV IEC 61000−4−2 contact discharge?
Per the official onsemi datasheet Figure 1, the NUP4016P5T5G clamps to ≤12 V at peak current under 8 kV IEC 61000−4−2 contact discharge. This clamping level remains stable across temperature and ensures safe operation for 3.3 V and 5 V transceivers. Measured values are verified using standardized transmission line pulse (TLP) characterization.
Can the NUP4016P5T5G be used for HDMI or PCIe interface protection?
No - the NUP4016P5T5G is not recommended for HDMI or PCIe. While its 0.5 pF capacitance is low, its 5.0 V VRWM and 5.5 V VBR are mismatched to HDMI's 3.3 V common-mode and PCIe's 0.8 V differential swing. Dedicated arrays such as USBN6V8 or SP1003 are better aligned for those protocols' voltage and bandwidth requirements.
NUP4016P5T5G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOT-953
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- 4
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 5.5V
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 0.5pF @ 1MHz
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-953
NUP4016P5T5G FAQ
1.How can I place an order for NUP4016P5T5G through Aetrix?
Please submit a Request for Quotation (RFQ) for NUP4016P5T5G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NUP4016P5T5G reliable?
The price and inventory of NUP4016P5T5G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NUP4016P5T5G is usually 5 days.
3.What payment methods are accepted for NUP4016P5T5G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NUP4016P5T5G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NUP4016P5T5G?
NUP4016P5T5G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NUP4016P5T5G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NUP4016P5T5G?
For technical support, including NUP4016P5T5G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NUP4016P5T5G requirements.
6.How does Aetrix verify that NUP4016P5T5G is sourced from the original manufacturer or authorized distributors?
All NUP4016P5T5G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NUP4016P5T5G meets industry standards.
7.What is the process for return or replacement of NUP4016P5T5G?
All NUP4016P5T5G units undergo pre-shipment inspection (PSI). If there is an issue with NUP4016P5T5G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NUP4016P5T5G part is unused and in its original packaging.
Return procedure for NUP4016P5T5G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NUP4016P5T5G Tags

-
ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
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