onsemi NUP4060AXV6T1G
- Part No.:
- NUP4060AXV6T1G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SOT-563, SOT-666
- Datasheet:
-
NUP4060AXV6T1G.pdf
- Description:
- TVS DIODE 5VWM SOT563
- Quantity:
- Payment:

- Shipping:

Inventory:3,439
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NUP4060AXV6T1G from onsemi is a 4-line ESD protection diode array in SOT-563 package, featuring common-cathode architecture with 6.8 V breakdown voltage for D1–D3 lines and 16 V for VCC, <7 pF capacitance at 3 V, and IEC61000-4-2 Level 4 ESD rating (8 kV contact / 15 kV air). It protects USB interfaces, SIM card slots, and portable device data lines against transient surges.
For engineers reviewing the NUP4060AXV6T1G datasheet, pinout, applications, or equivalent options, key selection criteria include line-specific VRWM (5.0 V), low-clamping voltage, sub-10 pF signal-line capacitance, and dual-voltage protection capability across four independent channels plus VCC rail.
Technical Context
This device implements a monolithic silicon avalanche diode array with shared cathode connection to GND, enabling compact multi-line protection without discrete component stacking. Its dual-breakdown structure supports separate 5.0 V working voltage for signal lines (D1–D3) and 16 V for power rail (VCC), with clamping performance validated under 8×20 µs surge waveforms.
Designed for high-speed digital interfaces, it maintains <7 pF capacitance per protected line at 3 V bias-critical for preserving signal integrity in USB 2.0 and SIM card applications-while delivering 20 W peak pulse power handling for D1–D3 and 200 W for VCC under standardized transient conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Protection Lines | 4 independent signal lines (D1–D3) + VCC rail, all referenced to common GND |
| VRWM (D1–D3) | 5.0 V maximum - ensures no conduction during normal 3.3 V/5 V interface operation |
| VBR (D1–D3) | 6.2–7.2 V - defines precise clamping onset for ESD transients on data lines |
| VBR (VCC) | 15.3–17.1 V - enables robust 12–15 V power-rail surge suppression |
| Capacitance (D1–D3) | 7 pF typical at 3 V - preserves signal rise/fall times in USB 2.0 (480 Mbps) paths |
| ESD Rating | IEC61000-4-2 Level 4: 8 kV contact / 15 kV air - meets industrial handheld immunity requirements |
| Package | SOT-563 (1.60 × 1.20 × 0.55 mm) - enables ultra-compact placement near connectors |
Pinout & Package
SOT-563 6-pin plastic surface-mount package with gull-wing leads; 0.50 mm pitch; moisture sensitivity level (MSL) 1 per J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | D1 Anode | Input terminal for first protected signal line (e.g., USB D+) |
| 2 | D2 Anode | Input terminal for second protected signal line (e.g., USB D−) |
| 3 | GND | Common cathode reference for all diodes - must be low-inductance PCB connection |
| 4 | GND | Second GND terminal - improves thermal dissipation and reduces ground bounce |
| 5 | D3 Anode | Input terminal for third protected signal line (e.g., SIM CLK) |
| 6 | VCC | Anode of VCC protection diode - connects to system power rail (e.g., 12 V or 15 V) |
Key Features
| Feature | Design Value |
|---|---|
| Multi-line integration | Four independent protection paths (D1–D3 + VCC) in single 1.6 × 1.2 mm footprint - eliminates layout space for four discrete TVS devices |
| Low signal-line capacitance | 7 pF typical at 3 V bias - avoids signal distortion in high-speed interfaces up to 480 Mbps |
| Dual-voltage clamping | 6.8 V clamping for data lines + 16 V clamping for VCC - matches differential signaling and power rail surge profiles separately |
| IEC61000-4-2 Level 4 compliance | Validated 8 kV contact / 15 kV air discharge - satisfies EN 61000-4-2 for consumer and industrial portables |
| Pb-free construction | RoHS-compliant SOT-563 package with matte tin lead finish - supports lead-free reflow assembly |
Applications
| USB 2.0 Interface Protection | SIM Card Slot Protection |
|---|---|
Use Scenario: Protecting USB D+ and D− lines in smartphones and tablets against ESD events during cable insertion/removal. IC Role / Device Role / Timing Role: Low-capacitance transient voltage suppressor placed within 2 mm of USB connector to clamp fast-rising ESD pulses before reaching PHY IC. Use Value: Maintains 480 Mbps signal integrity while suppressing >8 kV contact discharges per IEC61000-4-2. | Use Scenario: Safeguarding SIM card clock, data, and reset lines in mobile handsets and IoT modules exposed to user-handling ESD. IC Role / Device Role / Timing Role: Signal-line protector with matched 5.0 V VRWM aligned to SIM interface voltage levels (1.8 V / 3.0 V). Use Value: Prevents latch-up or damage to SIM controller ICs without adding jitter or timing skew to 1–5 MHz clock/data signals. |
| Notebook Internal Data Buses | Portable Device Power Rail Clamping |
Use Scenario: Shielding internal LVDS or eMMC command lines in thin notebooks where board space limits discrete protection options. IC Role / Device Role / Timing Role: Compact 4-channel ESD array replacing multiple 0201 TVS diodes to reduce BOM count and routing congestion. Use Value: Achieves same protection level in 30% less PCB area versus discrete solutions, with verified 7 pF loading per line. | Use Scenario: Suppressing surges on 12 V or 15 V power rails feeding RF front-end modules in portable radios and wearables. IC Role / Device Role / Timing Role: Dedicated VCC protection diode with 16 V breakdown - clamps transients before they propagate into sensitive analog circuitry. Use Value: Delivers 200 W peak pulse power handling at VCC pin, exceeding standard 100 W requirements for automotive-grade power rails. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESD5V3U4-2/TR | Lower VRWM (3.3 V), higher capacitance (12 pF), same SOT-563 package | Better suited for 3.3 V-only systems; marginal for 5 V tolerant interfaces | Select when protecting only 3.3 V logic with tighter VRWM margin required |
| TPD4E001DPYR | Higher VRWM (5.5 V), lower capacitance (3.5 pF), same 4-line + VCC topology | Optimized for USB 3.0 and MIPI lanes requiring sub-5 pF loading | Choose for next-gen high-speed interfaces where signal integrity dominates over cost |
Compared with NUP4060AXV6T1G, ES5V3U4-2/TR offers tighter 3.3 V VRWM but sacrifices bandwidth due to higher capacitance, while TPD4E001DPYR delivers superior high-frequency performance at higher unit cost and reduced surge power rating on VCC.
Availability
NUP4060AXV6T1G is available at Aetrix Electronics and suitable for USB interface protection, SIM card slot hardening, and notebook internal bus shielding requiring stable component supply across high-volume portable electronics programs.
Supply support for NUP4060AXV6T1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and edge applications.
The NUP4060AXV6T1G belongs to onsemi's ESD protection diode array product line, engineered specifically for space-constrained portable electronics needing multi-line, low-capacitance transient suppression with dual-voltage clamping capability.
FAQ
What is the maximum operating junction temperature for the NUP4060AXV6T1G?
The NUP4060AXV6T1G has an operating junction temperature range of −40°C to +125°C, as specified in its Absolute Maximum Ratings table. This allows reliable deployment in portable devices subject to ambient extremes, including battery-powered equipment operating near heat-generating components. Thermal derating begins above 25°C ambient, with 100% rated power available only at TA ≤ 25°C per the published power derating curve.
Does the NUP4060AXV6T1G support bidirectional ESD protection on all signal lines?
No - the NUP4060AXV6T1G uses unidirectional diode configuration: D1–D3 anodes connect to protected lines and cathodes tie to common GND, while the VCC pin functions as an anode for positive-going surges on the power rail. It does not provide symmetrical clamping for negative transients on VCC or reverse-biased protection on signal lines.
Can the NUP4060AXV6T1G be used to protect a 5 V USB interface?
Yes - the NUP4060AXV6T1G is suitable for 5 V USB interfaces because its D1–D3 lines have a 5.0 V VRWM and 6.8 V typical breakdown voltage, providing sufficient margin above 5 V DC operation while clamping ESD events before damage occurs. Its <7 pF capacitance also preserves signal fidelity at USB 2.0 data rates.
How many ground connections does the NUP4060AXV6T1G require in PCB layout?
The NUP4060AXV6T1G requires two dedicated GND pins (pins 3 and 4) in the SOT-563 package. Both must be connected to the same low-impedance system ground plane using short, wide traces to minimize inductance and ensure effective transient current shunting during ESD events.
Is the NUP4060AXV6T1G compliant with RoHS and REACH regulations?
Yes - the NUP4060AXV6T1G is a Pb-free device manufactured in accordance with RoHS Directive 2011/65/EU and fully compliant with REACH SVHC requirements. The "G" suffix in the part number explicitly denotes lead-free packaging, and the SOT-563 case uses matte tin-plated leads compatible with lead-free reflow soldering profiles.
NUP4060AXV6T1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOT-563, SOT-666
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 4
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 6.2V
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- Yes
- Applications:
- General Purpose
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-563
NUP4060AXV6T1G FAQ
1.How can I place an order for NUP4060AXV6T1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NUP4060AXV6T1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NUP4060AXV6T1G reliable?
The price and inventory of NUP4060AXV6T1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NUP4060AXV6T1G is usually 5 days.
3.What payment methods are accepted for NUP4060AXV6T1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NUP4060AXV6T1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NUP4060AXV6T1G?
NUP4060AXV6T1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NUP4060AXV6T1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NUP4060AXV6T1G?
For technical support, including NUP4060AXV6T1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NUP4060AXV6T1G requirements.
6.How does Aetrix verify that NUP4060AXV6T1G is sourced from the original manufacturer or authorized distributors?
All NUP4060AXV6T1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NUP4060AXV6T1G meets industry standards.
7.What is the process for return or replacement of NUP4060AXV6T1G?
All NUP4060AXV6T1G units undergo pre-shipment inspection (PSI). If there is an issue with NUP4060AXV6T1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NUP4060AXV6T1G part is unused and in its original packaging.
Return procedure for NUP4060AXV6T1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NUP4060AXV6T1G Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

