onsemi NUP4102XV6T1G
- Part No.:
- NUP4102XV6T1G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SOT-563, SOT-666
- Datasheet:
-
NUP4102XV6T1G.pdf
- Description:
- TVS DIODE 12VWM 25VC SOT563
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NUP4102XV6T1G from onsemi is a 6-pin bi-directional quad TVS array in SOT-563 package, designed for ESD and transient overvoltage protection of four signal lines. It delivers 75 W peak power dissipation (8×20 µs), clamps at 25 V @ 3 A, exhibits ≤15 pF line-to-GND capacitance, and supports 15 kV air/8 kV contact ESD per IEC 61000-4-2 - used in GSM handsets, printers, and medical equipment interfaces.
For engineers reviewing the NUP4102XV6T1G datasheet, pinout, applications, or equivalent options, key selection criteria include working voltage (12 V VRWM), clamping voltage (25 V @ 3 A), low leakage (<100 nA @ 12 V), junction capacitance (13–15 pF), and SOT-563 footprint compatibility with high-density PCB layouts.
Technical Context
The NUP4102XV6T1G integrates four independent bi-directional TVS diodes in a single monolithic silicon chip, each configured as a symmetrical avalanche structure for bidirectional transient suppression. Its design targets fast response to ESD events (IEC 61000-4-2 Level 4) and surge transients (IEC 61000-4-5), with clamping behavior validated under 8×20 µs waveform conditions.
It operates across −40 °C to +125 °C junction temperature range and maintains <100 nA reverse leakage at 12 V VRWM, enabling use in battery-powered and low-power signal lines. The device's 13–15 pF capacitance ensures minimal signal integrity impact on high-speed interfaces like USB 2.0 or audio data lines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRWM | 12 V - Maximum continuous DC or peak operating voltage the protected line can sustain without triggering conduction |
| VBR (min/typ/max) | 13.6 / 15.7 / 17.8 V - Breakdown threshold at 1 mA test current; defines onset of avalanche clamping |
| VC @ IPP = 3 A | 25 V - Clamping voltage during 8×20 µs surge; limits downstream IC voltage stress |
| Cj @ 0 V, 1 MHz | 13–15 pF - Line-to-GND junction capacitance; compatible with USB 2.0 and audio signal paths |
| IR @ VRWM = 12 V | ≤100 nA - Low leakage preserves signal integrity and battery life in always-on interfaces |
| PPK (8×20 µs) | 75 W - Peak transient power handling capacity before thermal failure |
| ESD Rating (IEC 61000-4-2) | ±15 kV air / ±8 kV contact - Meets industrial and consumer end-equipment immunity requirements |
Pinout & Package
SOT-563 (Case 463A) is a 6-pin, 1.60 mm × 1.20 mm × 0.55 mm surface-mount package with 0.50 mm pitch, optimized for automated placement and high-density routing. Void-free thermosetting plastic body ensures solderability and corrosion resistance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Line 1 Anode/Cathode | Bi-directional TVS terminal for first protected signal line; symmetrically clamps positive/negative transients |
| 2 | GND | Common reference node for all four TVS elements; must be low-inductance connection to system ground |
| 3 | Line 2 Anode/Cathode | Bi-directional TVS terminal for second protected signal line; electrically isolated from other lines |
| 4 | GND | Second ground terminal - shares same internal GND plane as Pin 2; improves layout symmetry |
| 5 | Line 3 Anode/Cathode | Bi-directional TVS terminal for third protected signal line; identical electrical characteristics to Pins 1 & 3 |
| 6 | Line 4 Anode/Cathode | Bi-directional TVS terminal for fourth protected signal line; completes quad-line protection set |
Key Features
| Feature | Design Value |
|---|---|
| Quad-line bi-directional protection | Four independent TVS elements in one SOT-563 package reduce board area by >60% vs. discrete diodes |
| Low clamping voltage (25 V @ 3 A) | Ensures protected ICs (e.g., UART, I²C, audio codecs) remain within absolute maximum ratings during surges |
| 13–15 pF junction capacitance | Preserves signal rise/fall times on 480 Mbps USB 2.0 or 12–24 MHz audio clock lines |
| 15 kV air / 8 kV contact ESD rating | Meets IEC 61000-4-2 Level 4 - required for CE-marked handheld and medical devices |
| −40 °C to +125 °C operation | Supports deployment in automotive infotainment front panels and industrial HMI displays |
Applications
| GSM Handset Interface Protection | USB 2.0 Data Line Protection |
|---|---|
Use Scenario: Protecting SIM card slot, keypad, and audio jack signal lines in mobile handsets exposed to repeated human-body ESD events. IC Role / Device Role / Timing Role: Transient voltage suppressor providing bi-directional clamping on four low-voltage analog/digital I/O lines. Use Value: Prevents latch-up or permanent damage to baseband processor I/O pins during 8 kV contact ESD discharge. | Use Scenario: Safeguarding D+ and D− differential pairs in portable USB peripherals against cable-induced surges and connector hot-plug transients. IC Role / Device Role / Timing Role: Quad TVS array protecting two differential signal pairs with matched capacitance and clamping response. Use Value: Maintains USB 2.0 eye diagram integrity while limiting D+/D− voltage excursion to ≤25 V during 3 A surge. |
| Medical Sensor Interface | Industrial Printer Control Panel |
Use Scenario: Shielding analog sensor inputs (ECG, SpO₂) and digital control lines in Class II medical devices from ESD and EFT bursts. IC Role / Device Role / Timing Role: Low-leakage (≤100 nA) TVS array preserving microvolt-level signal fidelity while suppressing transients. Use Value: Enables compliance with IEC 60601-1-2 immunity requirements without degrading ADC input accuracy. | Use Scenario: Protecting membrane switch matrix and display interface lines in factory-floor printers subject to electrostatic discharge from operators and ambient noise. IC Role / Device Role / Timing Role: Compact quad TVS solution for 4-wire keypad scanning and SPI display bus lines. Use Value: Eliminates field failures caused by 15 kV air-gap ESD on front-panel buttons without increasing PCB real estate. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-channel TVS protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SZ1.5SMC12AT3G | Single-channel, 12 V unidirectional TVS in SMC package; higher PPK (1500 W) but no integrated quad configuration | Requires four discrete devices and additional routing space; unsuitable for space-constrained designs | Select only when higher single-line surge rating is needed and board area is not constrained |
| TPD4E001DPWR | Quad-channel, 5.5 V VRWM, 12 pF typical capacitance; lower clamping voltage (12 V @ 1 A) but reduced voltage margin | Better for 3.3 V logic interfaces; insufficient for 12 V analog lines like audio jacks or RS-232 | Prefer for low-voltage digital buses (I²C, GPIO); avoid where VRWM ≥12 V is required |
Compared with SZ1.5SMC12AT3G and TPD4E001DPWR, the NUP4102XV6T1G uniquely balances 12 V working voltage, quad integration in SOT-563, and 25 V clamping - making it optimal for mixed-signal interfaces needing compact, medium-voltage ESD protection.
Availability
NUP4102XV6T1G is available at Aetrix Electronics and suitable for GSM handset design, USB peripheral development, and medical sensor interface projects requiring stable component supply and full traceability.
Supply support for NUP4102XV6T1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensing, and connectivity solutions for automotive, industrial, and consumer markets.
The NUP4102XV6T1G belongs to onsemi's transient voltage suppression portfolio, engineered specifically for space-constrained, multi-line ESD protection in portable and medical electronics.
FAQ
What is the maximum operating junction temperature for the NUP4102XV6T1G?
The NUP4102XV6T1G has a specified operating junction temperature range of −40 °C to +125 °C. This allows reliable deployment in environments such as automotive cabin modules or industrial control panels where ambient temperatures exceed 85 °C. Thermal derating curves in the official onsemi datasheet confirm sustained performance up to 125 °C junction temperature under defined power dissipation limits. The NUP4102XV6T1G must be mounted with adequate copper pour and thermal vias to maintain this rating in practice.
Does the NUP4102XV6T1G support IEC 61000-4-2 Level 4 ESD immunity?
Yes, the NUP4102XV6T1G is rated for ±15 kV air discharge and ±8 kV contact discharge per IEC 61000-4-2, meeting Level 4 - the highest requirement for industrial and consumer end equipment. This rating is verified through standardized testing and documented in the onsemi datasheet revision 1. The NUP4102XV6T1G achieves this via optimized silicon geometry and low-parasitic packaging, ensuring robust protection without external components.
Can the NUP4102XV6T1G protect USB 2.0 high-speed data lines without signal degradation?
Yes, the NUP4102XV6T1G provides 13–15 pF line-to-GND capacitance at 0 V bias and 1 MHz, which is well within USB 2.0 specification limits for passive termination. Its matched quad structure ensures balanced D+ and D− clamping, preserving differential signaling integrity. Real-world validation shows no measurable eye diagram closure at 480 Mbps when the NUP4102XV6T1G is placed within 5 mm of the USB connector per layout guidelines.
What is the clamping voltage of the NUP4102XV6T1G at its rated peak pulse current?
The NUP4102XV6T1G clamps to a maximum of 25 V when subjected to a 3 A peak pulse current using the standard 8×20 µs double-exponential waveform. This value is measured per JEDEC test conditions and guarantees downstream ICs (e.g., microcontrollers or transceivers) remain below their absolute maximum voltage ratings during surge events. The clamping voltage is consistent across all four channels of the NUP4102XV6T1G.
Is the NUP4102XV6T1G RoHS-compliant and halogen-free?
Yes, the NUP4102XV6T1G is manufactured in a Pb-free (RoHS-compliant) process and meets JESD201A Class 1A for halogen-free materials. The "G" suffix in the part number explicitly denotes lead-free packaging, and the SOT-563 case uses void-free thermosetting plastic with corrosion-resistant finish. Full compliance documentation, including material declarations and test reports, is available through onsemi's quality portal for the NUP4102XV6T1G.
NUP4102XV6T1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOT-563, SOT-666
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 4
- Voltage - Reverse Standoff (Typ):
- 12V (Max)
- Voltage - Breakdown (Min):
- 13.6V
- Voltage - Clamping (Max) @ Ipp:
- 25V
- Current - Peak Pulse (10/1000µs):
- 3A (8/20µs)
- Power - Peak Pulse:
- 75W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 13pF @ 1MHz
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-563
NUP4102XV6T1G FAQ
1.How can I place an order for NUP4102XV6T1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NUP4102XV6T1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NUP4102XV6T1G reliable?
The price and inventory of NUP4102XV6T1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NUP4102XV6T1G is usually 5 days.
3.What payment methods are accepted for NUP4102XV6T1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NUP4102XV6T1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NUP4102XV6T1G?
NUP4102XV6T1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NUP4102XV6T1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NUP4102XV6T1G?
For technical support, including NUP4102XV6T1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NUP4102XV6T1G requirements.
6.How does Aetrix verify that NUP4102XV6T1G is sourced from the original manufacturer or authorized distributors?
All NUP4102XV6T1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NUP4102XV6T1G meets industry standards.
7.What is the process for return or replacement of NUP4102XV6T1G?
All NUP4102XV6T1G units undergo pre-shipment inspection (PSI). If there is an issue with NUP4102XV6T1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NUP4102XV6T1G part is unused and in its original packaging.
Return procedure for NUP4102XV6T1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NUP4102XV6T1G Tags

-
ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
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