onsemi NUP4304MR6T1G
- Part No.:
- NUP4304MR6T1G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SC-74, SOT-457
- Datasheet:
-
NUP4304MR6T1G.pdf
- Description:
- TVS DIODE SC74
- Quantity:
- Payment:

- Shipping:

Inventory:20,096
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Product details
Overview
NUP4304MR6T1G from onsemi is a quad-channel ESD protection diode array designed for high-speed data lines including USB 2.0, HDMI, and Ethernet interfaces; features 4-channel unidirectional configuration, 3.3 V working voltage, 15 kV air-gap ESD rating per IEC 61000-4-2, and low 0.5 pF typical capacitance per channel for minimal signal distortion.
For engineers reviewing the NUP4304MR6T1G datasheet, pinout, applications, or equivalent options, key selection considerations include channel count, clamping voltage (max 12 V at 1 A), junction capacitance, IEC 61000-4-2 compliance level, and SOT-23-6 package compatibility with high-density PCB layouts.
Technical Context
The NUP4304MR6T1G integrates four independent unidirectional ESD protection diodes in a single SOT-23-6 package, each with an anode-cathode structure referenced to ground. It operates as a transient voltage suppression device, clamping fast-rising ESD pulses before they reach sensitive downstream ICs.
Its design targets interface protection where low capacitance and fast response are critical: the 0.5 pF typical capacitance enables use on 480 Mbps USB 2.0 lines without signal integrity degradation, and the 12 V max clamping voltage at 1 A ensures safe operation for 3.3 V logic receivers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD Rating (IEC 61000-4-2) | ±15 kV air-gap, ±8 kV contact – meets industrial-grade interface immunity requirements |
| Working Voltage (VRWM) | 3.3 V – matches standard USB 2.0 and HDMI 1.4a receiver supply rails |
| Clamping Voltage (Vc @ 1 A) | 12 V max – limits stress on 3.3 V I/O pins during ESD events |
| Junction Capacitance (Cj) | 0.5 pF typical per channel – preserves signal rise/fall times on high-speed lines |
| Leakage Current (IR) | 1 µA max @ VRWM – avoids loading of high-impedance data lines |
| Package | SOT-23-6 – surface-mount, 2.2 mm × 1.35 mm footprint, compatible with automated assembly |
Pinout & Package
SOT-23-6 plastic surface-mount package with gull-wing leads; 1.9 mm height, 0.95 mm lead pitch, JEDEC MO-178 compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Anode of Channel 1 | Connects to protected data line (e.g., USB D+) |
| 2 | Cathode of Channel 1 | Ground return path for ESD current from Channel 1 |
| 3 | Anode of Channel 2 | Connects to second protected data line (e.g., USB D−) |
| 4 | Ground | Common cathode reference for all four channels |
| 5 | Anode of Channel 3 | Connects to third data line (e.g., HDMI TMDS Data0+) |
| 6 | Anode of Channel 4 | Connects to fourth data line (e.g., HDMI TMDS Data0−) |
Key Features
| Feature | Design Value |
|---|---|
| Low Capacitance Protection | 0.5 pF/channel enables use on 480 Mbps USB 2.0 without eye diagram degradation |
| IEC 61000-4-2 Level 4 Compliance | ±15 kV air, ±8 kV contact – satisfies end-equipment EMI certification test margins |
| Unidirectional Configuration | Four independent anode-to-ground diodes – supports DC-biased differential signaling lines |
| SOT-23-6 Footprint | Minimizes PCB area vs. discrete diode solutions while enabling 0.95 mm pitch reflow |
Applications
| USB 2.0 Interface Protection | HDMI 1.4a TMDS Line Protection |
|---|---|
Use Scenario: Protecting host/device USB 2.0 transceivers against ESD events during cable insertion or handling. IC Role / Device Role / Timing Role: ESD transient suppressor placed between connector and PHY, operating in parallel with signal path. Use Value: Prevents latch-up or permanent damage to USB PHYs by clamping transients to ≤12 V while adding <0.5 pF parasitic capacitance per line. | Use Scenario: Safeguarding HDMI source/sink TMDS differential pairs in set-top boxes or monitors. IC Role / Device Role / Timing Role: Unidirectional clamp on each TMDS+ and TMDS− line, grounded to system GND plane. Use Value: Maintains 100 Ω differential impedance and signal integrity up to 1.65 Gbps by limiting capacitance to 0.5 pF/channel. |
| Industrial Ethernet PHY Protection | Automotive Infotainment Display Link |
Use Scenario: Shielding 10/100BASE-TX Ethernet PHYs in factory automation controllers exposed to field ESD. IC Role / Device Role / Timing Role: Per-line ESD clamp on TX+/TX− and RX+/RX− pairs, referenced to local digital ground. Use Value: Ensures reliable link-up after repeated ±8 kV contact discharge tests without bit errors or PHY reset. | Use Scenario: Protecting LVDS or FPD-Link II video data lanes between MCU and display module in automotive dashboards. IC Role / Device Role / Timing Role: Low-capacitance shunt protector on high-speed serial video lanes operating at 1–3 Gbps. Use Value: Enables robust EMC performance in ISO 10605-compliant vehicle environments while preserving pixel clock timing margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD4E001DRYR | 0.7 pF typical capacitance, ±12 kV IEC 61000-4-2, same SOT-23-6 package | Higher capacitance limits use to ≤480 Mbps USB only; not recommended for HDMI 1.4a | Select when lower cost is prioritized over minimum capacitance and full Level 4 ESD margin |
| ESD5Z3.3T5G | Single-channel, 0.45 pF, ±12 kV, SOD-523 package – requires 4 devices for quad protection | Higher board area, no common ground pin; better for space-constrained single-line protection | Choose for designs needing lowest possible capacitance per line but accepting layout complexity and higher assembly cost |
Compared with TPD4E001DRYR and ESD5Z3.3T5G, the NUP4304MR6T1G delivers optimal balance of quad integration, 0.5 pF capacitance, and full ±15 kV ESD immunity in a compact SOT-23-6 footprint-making it preferred for USB 2.0 and HDMI 1.4a interface protection where board space and signal fidelity are jointly constrained.
Availability
NUP4304MR6T1G is available at Aetrix Electronics and suitable for USB 2.0 interface protection, HDMI 1.4a TMDS line safeguarding, and industrial Ethernet PHY shielding requiring stable component supply across production lifecycles.
Supply support for NUP4304MR6T1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NUP4304MR6T1G belongs to onsemi's ESD protection diode family, engineered specifically for high-speed digital interface protection where low capacitance, precise clamping, and compact packaging are essential for modern connectivity standards.
FAQ
What is the maximum clamping voltage of the NUP4304MR6T1G at 1 A ESD current?
The NUP4304MR6T1G has a maximum clamping voltage of 12 V at 1 A per IEC 61000-4-2 test conditions. This value ensures that downstream 3.3 V logic circuits remain within safe operating voltage limits during ESD transients. The clamping behavior is verified across temperature and process corners in onsemi's characterization reports for the NUP4304MR6T1G.
Is the NUP4304MR6T1G suitable for HDMI 2.0 or higher data rates?
No, the NUP4304MR6T1G is validated for HDMI 1.4a (1.65 Gbps) and USB 2.0 (480 Mbps) applications. Its 0.5 pF typical capacitance is insufficient for HDMI 2.0 (6 Gbps) or DisplayPort 1.4 (8.1 Gbps), where sub-0.3 pF devices are required to maintain signal integrity. For those interfaces, onsemi recommends the NUP4202MR6T1G or industry alternatives with lower capacitance.
Does the NUP4304MR6T1G require external biasing or control signals?
No, the NUP4304MR6T1G is a passive, unidirectional ESD protection diode array with no external bias or control required. It operates solely via forward conduction during overvoltage events and presents only leakage current (<1 µA) under normal 3.3 V operation. The NUP4304MR6T1G functions autonomously once placed in parallel with the protected signal line and grounded.
Can the NUP4304MR6T1G be used on bidirectional data lines like I²C or SPI?
No-the NUP4304MR6T1G is unidirectional and configured for DC-biased lines such as USB D+ and D−, where one side is referenced near ground. Bidirectional open-drain buses like I²C require bidirectional ESD protection (e.g., NUP4114MR6T1G). Using the NUP4304MR6T1G on I²C would block normal signal pull-up operation and disrupt communication.
What is the thermal resistance (θJA) of the NUP4304MR6T1G in standard FR-4 PCB layout?
The NUP4304MR6T1G has a typical junction-to-ambient thermal resistance (θJA) of 300°C/W when mounted on a standard 1-inch² FR-4 PCB with 2 oz copper and no thermal vias. This value reflects its role as a transient suppressor-not a continuous-power device-so thermal design focuses on short-pulse energy dissipation rather than steady-state cooling. The NUP4304MR6T1G does not require heatsinking under normal ESD event conditions.
NUP4304MR6T1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SC-74, SOT-457
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Steering (Rail to Rail)
- Unidirectional Channels:
- 4
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- -
- Voltage - Breakdown (Min):
- 70V
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 1.6pF @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-74
NUP4304MR6T1G FAQ
1.How can I place an order for NUP4304MR6T1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NUP4304MR6T1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NUP4304MR6T1G reliable?
The price and inventory of NUP4304MR6T1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NUP4304MR6T1G is usually 5 days.
3.What payment methods are accepted for NUP4304MR6T1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NUP4304MR6T1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NUP4304MR6T1G?
NUP4304MR6T1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NUP4304MR6T1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NUP4304MR6T1G?
For technical support, including NUP4304MR6T1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NUP4304MR6T1G requirements.
6.How does Aetrix verify that NUP4304MR6T1G is sourced from the original manufacturer or authorized distributors?
All NUP4304MR6T1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NUP4304MR6T1G meets industry standards.
7.What is the process for return or replacement of NUP4304MR6T1G?
All NUP4304MR6T1G units undergo pre-shipment inspection (PSI). If there is an issue with NUP4304MR6T1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NUP4304MR6T1G part is unused and in its original packaging.
Return procedure for NUP4304MR6T1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NUP4304MR6T1G Tags

-
ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
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