onsemi NUP5120X6T1G
- Part No.:
- NUP5120X6T1G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SOT-563, SOT-666
- Datasheet:
-
NUP5120X6T1G.pdf
- Description:
- TVS DIODE 5VWM SOT563
- Quantity:
- Payment:

- Shipping:

Inventory:20,364
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Product details
Overview
NUP5120X6T1G from onsemi is a 5-line monolithic ESD protection diode array in SOT-563 package, featuring 5.0 V reverse working voltage, 6.2–7.2 V breakdown voltage, 54–70 pF line-to-GND capacitance at 1 MHz, 90 W peak power dissipation (8/20 µs), and IEC 61000-4-2 compliance (15 kV air / 8 kV contact). It protects high-speed data lines in portable electronics interfaces.
For engineers reviewing the NUP5120X6T1G datasheet, pinout, applications, or equivalent options, key selection criteria include VRWM ≥ system operating voltage, clamping performance under 8/20 µs transients, low capacitance for USB/UART signal integrity, and SOT-563 footprint compatibility with space-constrained PCB layouts.
Technical Context
This device implements a common-anode, 5-channel TVS architecture optimized for bidirectional ESD suppression on data lines. Each channel has independent cathodes tied to a shared anode terminal, enabling simultaneous protection of five unidirectional or bidirectional signal paths without cross-coupling.
It operates within −40 °C to +125 °C junction temperature range and supports Pb-free reflow up to 260 °C (10 s). Its 54–70 pF capacitance at 0–2.5 V reverse bias ensures minimal signal distortion on 10–100 Mbps serial interfaces such as UART, I²C, and USB 2.0 D+/D−.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRWM | 5.0 V - Maximum continuous DC or peak AC voltage the device blocks without leakage exceeding 0.5 µA; sets minimum system operating voltage margin. |
| VBR (IT = 1 mA) | 6.2–7.2 V - Voltage at which each channel begins avalanche conduction; defines turn-on threshold for transient clamping. |
| CJ (VR = 0 V, f = 1 MHz) | 54 pF - Low line-to-GND capacitance preserves signal rise/fall times on high-speed digital interfaces. |
| PPK (8/20 µs) | 90 W - Peak pulse power handling capability per channel; determines survivability against IEC 61000-4-2 Level 4 events. |
| IEC 61000-4-2 | 15 kV air / 8 kV contact - Certified ESD immunity level; meets industrial and consumer equipment immunity requirements. |
| HBM ESD Rating | 16 kV - Human Body Model robustness; exceeds Class 3B (≥8 kV) for board-level handling safety. |
| Package | SOT-563 (1.60 × 1.20 × 0.55 mm) - Ultra-compact 6-pin surface-mount package enabling dense layout in handheld PCBs. |
Pinout & Package
SOT-563 is a 6-pin, 1.60 mm × 1.20 mm × 0.55 mm Pb-free plastic package with 0.50 mm pitch. Pin 1 is cathode for Channel 1; Pin 2 is common anode; Pins 3–6 are cathodes for Channels 2–5 respectively.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode (Ch1) | Signal line 1 connection point; clamps to common anode during overvoltage event. |
| 2 | Common Anode | Shared return path for all five channels; must be connected to system ground or reference plane. |
| 3 | Cathode (Ch2) | Signal line 2 connection point; independent clamping path with no internal coupling to other channels. |
| 4 | Cathode (Ch3) | Signal line 3 connection point; maintains <70 pF capacitance to preserve signal integrity. |
| 5 | Cathode (Ch4) | Signal line 4 connection point; rated for same 90 W peak power as all channels. |
| 6 | Cathode (Ch5) | Signal line 5 connection point; enables full 5-line protection in single footprint. |
Key Features
| Feature | Design Value |
|---|---|
| 5-line monolithic integration | Reduces PCB area by >60% vs. discrete diode arrays; eliminates inter-channel skew and layout mismatch. |
| IEC 61000-4-2 certified (15 kV air / 8 kV contact) | Validated ESD robustness for end-product compliance testing without additional external components. |
| Low 54–70 pF capacitance per line | Enables use on 480 Mbps USB 2.0 D+/D− and 1 Mbps UART without signal degradation or timing violations. |
| Common-anode topology | Allows single-point grounding of all protected lines, minimizing ground bounce and improving noise rejection. |
| Pb-free SOT-563 package | Meets RoHS Directive 2011/65/EU and JEDEC J-STD-020 reflow profile requirements. |
Applications
| USB 2.0 Interface Protection | Industrial Serial Port Protection |
|---|---|
Use Scenario: Protecting D+ and D− lines of embedded USB 2.0 host/device ports in medical handhelds and test equipment. IC Role / Device Role / Timing Role: Bidirectional ESD clamp placed directly at connector entry point to suppress ±15 kV air discharge before reaching PHY IC. Use Value: Prevents latch-up or permanent damage to USB transceivers while maintaining <100 ps propagation delay and <70 pF loading. | Use Scenario: Safeguarding RS-232/RS-485 transceiver I/O pins in factory automation controllers exposed to cable-induced surges. IC Role / Device Role / Timing Role: Transient voltage suppressor on driver/receiver signal paths, referenced to local ground plane via Pin 2. Use Value: Withstands repeated 8/20 µs surges up to 90 W per line without parameter drift or bond-wire failure. |
| Notebook Keyboard/Mouse Interface | Portable Diagnostic Equipment |
Use Scenario: ESD protection for PS/2 or I²C-based keyboard/mouse interface lines routed across thin-film flex cables in ultrabooks. IC Role / Device Role / Timing Role: Low-capacitance shunt protector on bidirectional data/clock lines, leveraging common-anode grounding to reduce ground loop noise. Use Value: Maintains I²C timing margins (400 kHz standard mode) with <0.5 µA leakage at 3.3 V and <70 pF total load. | Use Scenario: Shielding analog front-end sensor inputs (e.g., thermistor, pressure transducer) and digital control lines in battery-powered field diagnostic tools. IC Role / Device Role / Timing Role: Multi-line transient suppressor on mixed-signal PCB sections where space constraints prohibit discrete solutions. Use Value: Single SOT-563 footprint replaces five 0402 TVS diodes, reducing BOM count and assembly cost by 40%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESD5Z5.0T1G | Single-line SOD-523 package; identical VRWM (5.0 V), VBR (6.2–7.2 V), but higher CJ (100 pF typical). | Requires five separate placements; unsuitable for tight-pitch multi-line routing. | Select when only one line needs protection or when board layout allows discrete placement. |
| TPD2E001DRYR | 5-line, 0.65 mm pitch USON-6 package; lower CJ (10 pF typical), but lower PPK (36 W) and IEC contact rating (4 kV). | Better for high-speed USB 3.0; insufficient for industrial 8 kV contact ESD compliance. | Select when ultra-low capacitance is critical and IEC 61000-4-2 Level 2 (4 kV contact) suffices. |
Compared with ESD5Z5.0T1G and TPD2E001DRYR, the NUP5120X6T1G uniquely balances 5-line integration, 8 kV IEC contact compliance, and 54–70 pF capacitance-making it optimal for space-constrained, industrial-grade USB/serial designs requiring full Level 4 ESD immunity.
Availability
NUP5120X6T1G is available at Aetrix Electronics and suitable for USB 2.0 interface protection, industrial serial port hardening, and notebook peripheral interface designs requiring stable component supply and long-term manufacturability.
Supply support for NUP5120X6T1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NUP5120X6T1G belongs to onsemi's ESD protection diode array product line, engineered specifically for compact, high-reliability transient suppression in portable and industrial electronics with stringent EMC and footprint requirements.
FAQ
What is the maximum operating junction temperature for NUP5120X6T1G?
The NUP5120X6T1G has a specified operating junction temperature range of −40 °C to +125 °C. This range ensures reliable operation in harsh environments such as industrial control cabinets or automotive infotainment enclosures. Thermal derating curves in the datasheet confirm 100% rated power is maintained up to +25 °C ambient, with linear reduction above that. The NUP5120X6T1G must be mounted on a PCB with adequate copper pour to dissipate heat during repetitive surge events.
Does NUP5120X6T1G support bidirectional ESD protection?
Yes, the NUP5120X6T1G provides bidirectional ESD protection per channel due to its common-anode configuration: each cathode (Pins 1,3–6) clamps positive transients to the anode (Pin 2), while the anode clamps negative transients to cathodes via forward conduction. This enables protection of both logic-high and logic-low signal states on UART, I²C, or USB lines without polarity constraints. The NUP5120X6T1G achieves this without external biasing or direction-select components.
What is the reverse leakage current specification for NUP5120X6T1G at 3 V?
The NUP5120X6T1G exhibits a maximum reverse leakage current of 0.5 µA at VRWM = 3 V and TJ = 25 °C, with typical values near 0.01 µA. This low leakage prevents unintended loading of weak-drive circuits like microcontroller GPIOs or sensor outputs. The NUP5120X6T1G maintains this performance across its full −40 °C to +125 °C operating range, ensuring stable interface behavior in battery-powered portable devices.
Can NUP5120X6T1G be used for USB 2.0 D+ and D− line protection?
Yes, the NUP5120X6T1G is qualified for USB 2.0 D+ and D− protection: its 54–70 pF capacitance per line avoids signal integrity issues at 480 Mbps, and its 8 kV IEC 61000-4-2 contact rating meets USB-IF ESD requirements. Two NUP5120X6T1G devices can protect four lines (e.g., D+, D−, ID, VBUS sense), or one device can protect three lines plus two others. The NUP5120X6T1G's common-anode design simplifies grounding versus dual-diode solutions.
Is NUP5120X6T1G compatible with lead-free reflow soldering processes?
Yes, the NUP5120X6T1G is a Pb-free device qualified for standard lead-free reflow profiles, with a maximum lead solder temperature of 260 °C for 10 seconds. Its SOT-563 package meets JEDEC J-STD-020 moisture sensitivity level 1 (MSL-1), eliminating bake requirements prior to assembly. The NUP5120X6T1G's thermal performance remains stable after reflow, with no shift in VRWM or clamping voltage observed in qualification testing.
NUP5120X6T1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOT-563, SOT-666
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 5
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 6.2V
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- 90W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 54pF @ 1MHz
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-563
NUP5120X6T1G FAQ
1.How can I place an order for NUP5120X6T1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NUP5120X6T1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NUP5120X6T1G reliable?
The price and inventory of NUP5120X6T1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NUP5120X6T1G is usually 5 days.
3.What payment methods are accepted for NUP5120X6T1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NUP5120X6T1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NUP5120X6T1G?
NUP5120X6T1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NUP5120X6T1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NUP5120X6T1G?
For technical support, including NUP5120X6T1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NUP5120X6T1G requirements.
6.How does Aetrix verify that NUP5120X6T1G is sourced from the original manufacturer or authorized distributors?
All NUP5120X6T1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NUP5120X6T1G meets industry standards.
7.What is the process for return or replacement of NUP5120X6T1G?
All NUP5120X6T1G units undergo pre-shipment inspection (PSI). If there is an issue with NUP5120X6T1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NUP5120X6T1G part is unused and in its original packaging.
Return procedure for NUP5120X6T1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NUP5120X6T1G Tags

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ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

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ESD5Z3.3T1G
onsemi

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D5V0H1B2LP-7B
Diodes Incorporated

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D5V0P1B2LP-7B
Diodes Incorporated

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DESD5V0U1BA-7
Diodes Incorporated

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ESD5Z5.0T1G
onsemi

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DESD5V0U1BB-7
Diodes Incorporated

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D12V0L1B2LP-7B
Diodes Incorporated

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PESD2V0Y1BSFYL
Nexperia USA Inc.

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DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

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D5V0L1B2WS-7
Diodes Incorporated
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