My Inquiry
My Account
onsemi P6SMB75AT3
- Part No.:
- P6SMB75AT3
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- DO-214AA, SMB
- Datasheet:
-
P6SMB75AT3.pdf
- Description:
- TVS DIODE 64.1VWM 103VC SMB
- Quantity:
- Payment:
- Shipping:
Inventory:8,800
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
P6SMB75AT3 from ON Semiconductor is a unidirectional 600 W transient voltage suppressor (TVS) diode designed for parallel overvoltage protection of DC power rails and signal lines. It features a 64.1 V working peak reverse voltage (VRWM), 75.05 V nominal Zener breakdown voltage (VBR) at 1 mA test current, and clamps to ≤103 V at 5.8 A peak pulse current (IPP), making it suitable for protecting industrial power supplies and automotive ECUs against ESD and lightning-induced surges.
For engineers reviewing the P6SMB75AT3 datasheet, pinout, applications, or equivalent options, key selection criteria include VRWM margin above operating voltage, clamping voltage vs. protected device withstand rating, surge current capability under 1 ms pulses, UL 497B certification for isolated loop protection, and SMB package thermal performance in high-density layouts.
Technical Context
The P6SMB75AT3 operates as a silicon avalanche diode with sharp Zener breakdown characteristics, optimized for fast transient suppression in unidirectional configurations. Its <1 ns response time and low dynamic impedance ensure rapid clamping during sub-microsecond transients such as IEC 61000-4-2 ESD events.
Thermal design relies on junction-to-lead resistance of 40 °C/W and 3.0 W DC power dissipation at 75°C ambient, requiring PCB copper area per Case 403A footprint. The device is rated for −65°C to +150°C operation and supports Pb-free reflow soldering up to 260°C for 10 seconds.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRWM | 64.1 V - Maximum continuous reverse voltage before leakage exceeds 5 µA; sets minimum system operating voltage margin. |
| VBR @ IT=1 mA | 75.05 V (nominal) - Zener breakdown threshold; defines onset of clamping action under low-current surge conditions. |
| VC @ IPP=5.8 A | ≤103 V - Clamped voltage during 1 ms 5.8 A surge; must be below protected IC's absolute maximum rating. |
| PPK | 600 W - Peak pulse power handling per 10/1000 µs waveform; determines survivability against lightning surges (IEC 61000-4-5). |
| IR @ VRWM | ≤5 µA - Reverse leakage at working voltage; ensures minimal standby power loss in battery-powered systems. |
| ESD Rating | Class 3 (>16 kV HBM) - Confirmed human-body-model ESD robustness for board-level handling and end-use environments. |
| UL Recognition | UL 497B QVGQ2 - Certified for isolated loop circuit protection, including strike voltage, endurance, and dielectric tests. |
Pinout & Package
Package: SMB (Case 403A), surface-mount, void-free thermosetting plastic with cathode polarity band. Dimensions: 4.32 mm × 3.56 mm × 2.13 mm (L × W × H); lead finish is matte tin, solderable per J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode | Current sink during clamping | Connected to ground or low-impedance return path; carries full surge current during transient events. |
| Cathode | Protected line connection | Connected to the line being protected (e.g., 48 V rail); voltage referenced to anode during clamping. |
Key Features
| Feature | Design Value |
|---|---|
| Surge robustness | 600 W peak power per 1 ms pulse enables reliable protection against IEC 61000-4-5 Level 3 (1 kV/2 Ω) surges. |
| Clamp voltage control | 103 V max clamping at 5.8 A ensures compatibility with 100 V-rated MOSFETs and industrial controllers. |
| Low leakage | ≤5 µA at 64.1 V minimizes quiescent current drain in always-on 24/48 V systems and battery backup circuits. |
| Fast response | <1 ns turn-on time limits voltage overshoot during nanosecond-scale ESD events (IEC 61000-4-2). |
| Regulatory compliance | UL 497B recognition confirms suitability for safety-critical telecom and medical isolated power interfaces. |
Applications
| Industrial Power Supply Protection | Automotive Body Control Module (BCM) |
|---|---|
|
Use Scenario: 48 V DC input stage of programmable logic controller (PLC) power supply exposed to load dump and ISO 7637-2 pulses. IC Role / Device Role / Timing Role: Unidirectional TVS placed across input terminals to clamp transients before they reach upstream DC-DC converter. Use Value: Clamps 103 V at 5.8 A while maintaining <5 µA leakage, preserving efficiency and enabling compliance with IEC 61000-4-5 Class 3. |
Use Scenario: CAN bus power rail (VCC_CAN) in BCM subjected to battery disconnect transients and ESD coupling. IC Role / Device Role / Timing Role: Primary overvoltage clamp on 12 V auxiliary rail feeding CAN transceivers and microcontroller peripherals. Use Value: Sub-1 ns response prevents latch-up in 3.3 V CAN PHY ICs; UL 497B certification validates use in safety-related vehicle subsystems. |
| Telecom Remote Radio Unit (RRU) | Medical Infusion Pump Power Input |
|
Use Scenario: −48 V DC feed line in outdoor RRU enclosure subject to lightning-induced surges and induced transients. IC Role / Device Role / Timing Role: First-line protection on primary power entry, coordinated with upstream GDT and downstream π-filter. Use Value: 600 W peak power rating sustains multiple 10/1000 µs surges without degradation; SMB footprint allows dense layout near connector. |
Use Scenario: AC/DC adapter output (24 V) powering motor driver and microcontroller in Class II medical device. IC Role / Device Role / Timing Role: Secondary surge clamp after isolation barrier, ensuring patient-connected circuits remain within MOPP limits. Use Value: UL 497B QVGQ2 recognition provides regulatory evidence for IEC 60601-1 clause 8.8.3.3 overvoltage protection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMBJ75A | Same SMB package, identical VRWM (64.1 V) and VC (103 V), but lower PPK (600 W same), slightly higher VBR tolerance (±5% vs ±3.5%). | No functional difference in clamping performance; differs only in JEDEC-compliant marking and minor process variation. | Select SMBJ75A when standard JEDEC naming is required for BOM alignment or distributor stocking preference. |
| 1.5SMC75A | Larger SMC package (7.1 mm × 6.2 mm), same electrical specs (VRWM = 64.1 V, VC = 103 V), higher thermal mass (RJA = 18 °C/W vs 226 °C/W). | Better sustained surge handling in high-ambient-temperature environments (>85°C), but requires larger PCB area. | Choose 1.5SMC75A where thermal derating dominates layout constraints, e.g., enclosed industrial enclosures with poor airflow. |
Compared with P6SMB75AT3, SMBJ75A offers identical protection performance in a functionally interchangeable SMB package, while 1.5SMC75A trades compactness for superior thermal stability-making P6SMB75AT3 optimal for space-constrained, moderately heated applications like telecom line cards and automotive modules.
Availability
P6SMB75AT3 is available at Aetrix Electronics and suitable for industrial power supplies, automotive body control modules, telecom remote radio units, and medical infusion pump power inputs requiring stable component supply, long-term lifecycle support, and UL-certified surge protection.
Supply support for P6SMB75AT3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
ON Semiconductor is a global semiconductor manufacturer specializing in energy-efficient power management, analog, sensor, and connectivity solutions for automotive, industrial, cloud, and medical markets.
The P6SMB75AT3 belongs to the P6SMBxxAT3 series of unidirectional TVS diodes engineered for high-reliability overvoltage protection in harsh environments-designed specifically for robustness against repetitive surges, ESD, and load-dump transients in mission-critical systems.
FAQ
What is the maximum clamping voltage of the P6SMB75AT3 under surge conditions?
The P6SMB75AT3 has a maximum clamping voltage (VC) of 103 V when subjected to its rated peak pulse current (IPP) of 5.8 A with a 10/1000 µs waveform. This value is measured per ON Semiconductor's test conditions and represents the upper limit of voltage seen by downstream components during a worst-case transient event. Designers must verify that this clamping level remains below the absolute maximum ratings of protected ICs or MOSFETs in their specific application.
Is the P6SMB75AT3 RoHS compliant and Pb-free?
Yes, the P6SMB75AT3 is RoHS compliant and offered in a Pb-free package, indicated by the "G" suffix in the ordering code (P6SMB75AT3G). It meets JEDEC J-STD-020 moisture sensitivity level (MSL) 1 requirements and supports standard reflow soldering profiles up to 260°C for 10 seconds. The device uses matte tin plating on leads and conforms to ON Semiconductor's Pb-free manufacturing specifications.
How does the P6SMB75AT3 differ from bidirectional TVS diodes like P6SMB75CAT3?
The P6SMB75AT3 is unidirectional and intended for DC line protection where polarity is fixed, offering lower leakage (<5 µA at VRWM) and tighter VBR tolerance. In contrast, P6SMB75CAT3 is bidirectional, suited for AC or floating signal lines, but exhibits higher leakage and reduced clamping efficiency in DC applications. The P6SMB75AT3 must not be substituted for P6SMB75CAT3 without verifying polarity integrity and leakage impact on system bias networks.
What is the thermal resistance and power derating behavior of the P6SMB75AT3?
The P6SMB75AT3 has a junction-to-lead thermal resistance (RJL) of 40 °C/W and a junction-to-ambient resistance (RJA) of 226 °C/W on a standard FR-4 board with ON Semiconductor's recommended footprint. Its DC power dissipation derates linearly above 75°C ambient (25 mW/°C), and pulse power must be reduced per Figure 3 in the datasheet when ambient exceeds 25°C or duty cycle increases. Proper copper pour under the SMB pad is essential to maintain thermal performance.
Does the P6SMB75AT3 meet UL 497B requirements for isolated loop protection?
Yes, the P6SMB75AT3 is UL 497B recognized under file QVGQ2 for isolated loop circuit protection. It passed all required tests including strike voltage breakdown, endurance conditioning, temperature cycling, dielectric withstand, and discharge verification. This certification validates its use in telecom, industrial automation, and medical equipment where galvanic isolation integrity must be maintained during surge events.
P6SMB75AT3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- DO-214AA, SMB
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 64.1V
- Voltage - Breakdown (Min):
- 71.3V
- Voltage - Clamping (Max) @ Ipp:
- 103V
- Current - Peak Pulse (10/1000µs):
- 5.8A
- Power - Peak Pulse:
- 600W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- 280pF @ 1MHz
- Operating Temperature:
- -65°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMB
P6SMB75AT3 FAQ
1.How can I place an order for P6SMB75AT3 through Aetrix?
Please submit a Request for Quotation (RFQ) for P6SMB75AT3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P6SMB75AT3 reliable?
The price and inventory of P6SMB75AT3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P6SMB75AT3 is usually 5 days.
3.What payment methods are accepted for P6SMB75AT3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for P6SMB75AT3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for P6SMB75AT3?
P6SMB75AT3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P6SMB75AT3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P6SMB75AT3?
For technical support, including P6SMB75AT3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P6SMB75AT3 requirements.
6.How does Aetrix verify that P6SMB75AT3 is sourced from the original manufacturer or authorized distributors?
All P6SMB75AT3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P6SMB75AT3 meets industry standards.
7.What is the process for return or replacement of P6SMB75AT3?
All P6SMB75AT3 units undergo pre-shipment inspection (PSI). If there is an issue with P6SMB75AT3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P6SMB75AT3 part is unused and in its original packaging.
Return procedure for P6SMB75AT3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
P6SMB75AT3 Tags
-
ESD9B5.0ST5G
onsemi
-
DESD3V3E1BL-7B
Diodes Incorporated
-
ESD5Z3.3T1G
onsemi
-
D5V0H1B2LP-7B
Diodes Incorporated
-
D5V0P1B2LP-7B
Diodes Incorporated
-
DESD5V0U1BA-7
Diodes Incorporated
-
ESD5Z5.0T1G
onsemi
-
DESD5V0U1BB-7
Diodes Incorporated
-
D12V0L1B2LP-7B
Diodes Incorporated
-
PESD2V0Y1BSFYL
Nexperia USA Inc.
-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage
-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
