onsemi PACDN045-LF
- Part No.:
- PACDN045-LF
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SOT-23-6
- Datasheet:
-
PACDN045-LF.pdf
- Description:
- TRANSIENT VOLTAGE SUPPRESSOR ARR
- Quantity:
- Payment:

- Shipping:

Inventory:2,289
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Product details
Overview
PACDN045-LF from onsemi is a 6-channel ESD protection diode array in SC-70-6 (CASE 419AD) package, designed for high-speed data line protection with 30 pF capacitance, ±20 kV IEC 61000-4-2 contact ESD rating, and 6.1 V reverse stand-off voltage. It safeguards USB 2.0, HDMI, and serial interface pins against electrostatic discharge in portable electronics and industrial control systems.
For engineers reviewing the PACDN045-LF datasheet, pinout, applications, or equivalent options, key selection criteria include channel count, clamping voltage under ±10 mA transient current, leakage current at 5.0 VDC, package footprint compatibility with space-constrained PCB layouts, and compliance with IEC 61000-4-2 Level 4 ESD immunity requirements.
Technical Context
The PACDN045-LF integrates six independent bidirectional ESD protection diodes configured with cathodes tied to signal lines and a common anode connected to GND. Each channel provides low dynamic resistance (1.0 Ω forward, 1.4 Ω reverse) to minimize voltage overshoot during fast transients.
It operates across −40 °C to +85 °C and supports transient suppression up to ±30 kV per MIL-STD-883H HBM, while maintaining sub-100 nA leakage at 5.0 VDC and clamping within −1.2 V to +8.0 V at ±10 mA test current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD Rating | ±20 kV contact discharge (IEC 61000-4-2 Level 4); ensures robust immunity in handheld and docking station interfaces. |
| Reverse Stand-off Voltage | 6.1 V at 1 mA; defines maximum continuous operating voltage before conduction begins, matching 5 V logic rails. |
| Clamp Voltage | +6.8 V / −0.8 V at ±10 mA; limits peak transient voltage seen by protected ICs during ESD events. |
| Capacitance | 30 pF at 2.5 VDC, 1 MHz; enables use on USB 2.0 (480 Mbps) and other high-speed digital lines without signal integrity loss. |
| Leakage Current | 100 nA max at 5.0 VDC; prevents excessive DC loading on sensitive analog or low-power digital inputs. |
| Operating Temp | −40 °C to +85 °C; supports deployment in automotive infotainment, industrial HMIs, and consumer wearables. |
Pinout & Package
SC-70-6 package (CASE 419AD), 1.25 mm × 2.00 mm footprint, 0.65 mm pitch, 0.9 mm max height - optimized for dense PCB layouts in portable devices.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode (Channel 1) | Connects to first protected signal line; conducts transient current to GND when voltage exceeds VRWM. |
| 2 | Cathode (Channel 2) | Second protected signal node; independent clamping path with identical electrical characteristics. |
| 3 | Cathode (Channel 3) | Third protected signal node; maintains <30 pF capacitance and <100 nA leakage per channel. |
| 4 | GND | Common anode reference for all six diodes; must be low-inductance connection to system ground plane. |
| 5 | Cathode (Channel 4) | Fourth protected signal node; shares same ESD performance and thermal dissipation profile as Channels 1–3. |
| 6 | Cathode (Channel 5) | Fifth protected signal node; validated for ±20 kV contact discharge per IEC 61000-4-2. |
Key Features
| Feature | Design Value |
|---|---|
| 6-channel ESD protection | Single SC-70-6 device replaces six discrete TVS diodes, reducing BOM count and layout area by >60%. |
| Low 30 pF capacitance | Preserves signal rise/fall times on USB 2.0, UART, and I²C buses without requiring equalization or re-timing. |
| ±20 kV IEC 61000-4-2 rating | Meets highest industrial and consumer ESD immunity requirement without external shielding or grounding enhancements. |
| Pb-free & RoHS compliant | Enables direct use in EU WEEE-compliant designs and simplifies supply chain traceability for OEMs. |
| −40 °C to +85 °C operation | Validated for extended temperature range in automotive cabin modules and outdoor industrial sensors. |
Applications
| USB 2.0 Port Protection | HDMI Interface Protection |
|---|---|
Use Scenario: Protecting D+ and D− differential pair plus ID/VBUS lines in smartphone docking stations and OTG adapters. IC Role / Device Role / Timing Role: Transient voltage suppressor placed directly at connector entry point to shunt ESD energy before reaching USB PHY IC. Use Value: Prevents latch-up or gate oxide damage in USB transceivers during ±20 kV contact discharge events. |
Use Scenario: Shielding TMDS clock and data channels in set-top box HDMI receptacles exposed to user handling. IC Role / Device Role / Timing Role: Low-capacitance clamp on each of four TMDS lanes to maintain signal integrity up to 2.25 Gbps. Use Value: Maintains HDMI compliance margin by limiting transient-induced jitter and bit error rate increase. |
| Industrial Serial Interface | Medical Sensor Interface |
Use Scenario: Guarding RS-485/RS-232 transceiver pins in factory automation PLC I/O modules subject to field technician ESD. IC Role / Device Role / Timing Role: Bidirectional clamping element between transceiver I/O and connector, referenced to local GND. Use Value: Eliminates need for external series resistors or ferrites while sustaining >10⁵ ESD strike cycles. |
Use Scenario: Securing analog front-end inputs of wearable ECG monitors handling electrode connections prone to static buildup. IC Role / Device Role / Timing Role: Signal-line protector with sub-100 nA leakage to avoid DC offset errors in precision amplifier stages. Use Value: Ensures baseline stability and diagnostic accuracy by preventing ESD-induced saturation or reset of ADC input stage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD6E001DRYR | 6-channel, 3.5 pF typical capacitance, 5.5 V VRWM, SOT-563 package (1.6 × 1.6 mm). | Better suited for >1 Gbps interfaces (e.g., USB 3.0 Gen1), but lower ESD rating (±12 kV IEC contact). | Select when ultra-low capacitance is critical and ESD threat level is ≤Level 3 (±8 kV). |
| SP3205-01UTG | 6-channel, 0.65 pF typical capacitance, 5.0 V VRWM, SOT-563 package, ±15 kV IEC contact. | Optimized for RF/analog sensor paths; insufficient for 5 V digital bus clamping due to lower VRWM. | Prefer for low-voltage analog signal chains where leakage <1 nA and minimal capacitive loading are mandatory. |
Compared with TPD6E001DRYR and SP3205-01UTG, PACDN045-LF delivers higher ESD immunity (±20 kV vs. ±12/±15 kV) and tighter VRWM tolerance (6.1 V) for 5 V logic compatibility, at the cost of higher capacitance - making it optimal for cost-sensitive, high-reliability USB 2.0 and industrial serial deployments.
Availability
PACDN045-LF is available at Aetrix Electronics and suitable for USB 2.0 port protection, industrial serial interface hardening, and medical sensor front-end safeguarding requiring stable component supply across multi-year production cycles.
Supply support for PACDN045-LF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensing, and connectivity solutions for automotive, industrial, and cloud infrastructure markets.
The PACDN045-LF belongs to onsemi's PACDN family of compact ESD protection arrays, engineered specifically for high-density PCBs in portable electronics and industrial edge devices where board space and ESD robustness are co-constrained.
FAQ
What is the exact pin configuration of PACDN045-LF in SC-70-6 package?
The PACDN045-LF uses a 6-pin SC-70-6 (CASE 419AD) package with pins 1–3 and 5–6 assigned as individual cathodes for six protection channels, and pin 4 as the common GND anode terminal. This configuration matches the schematic symbol shown in Figure 3 of the official onsemi datasheet (PACDN042/D, Rev. 9), confirming unidirectional cathode-to-GND topology per channel.
Does PACDN045-LF support bidirectional ESD protection?
Yes, PACDN045-LF provides bidirectional ESD protection per channel. Its internal structure consists of back-to-back diode pairs between each cathode pin and the common GND pin, enabling clamping of both positive and negative transients - verified by the ±20 kV IEC 61000-4-2 contact discharge rating and symmetric clamp voltages (+6.8 V / −0.8 V at ±10 mA) in Table 4 of the datasheet.
Can PACDN045-LF be used on 3.3 V logic lines?
Yes, PACDN045-LF is compatible with 3.3 V logic systems. Its 6.1 V reverse stand-off voltage (VRWM) provides sufficient margin above 3.3 V nominal rail, and its leakage current remains ≤100 nA at 5.0 VDC - well within safe limits for 3.3 V CMOS inputs. The device clamps transients before they exceed absolute maximum ratings of downstream ICs.
What is the thermal derating behavior of PACDN045-LF above 25 °C?
PACDN045-LF has a package power dissipation limit of 0.225 W for SC-70 packages (Table 2). At ambient temperatures above 25 °C, its maximum allowable transient power decreases linearly with junction temperature rise. Derating follows standard JEDEC curves: usable power drops to ~0.15 W at 70 °C ambient, assuming θJA ≈ 220 °C/W - consistent with SC-70 thermal performance in onsemi's reliability reports.
Is PACDN045-LF pin-compatible with other members of the PACDN042–046 family?
No, PACDN045-LF is not pin-compatible with other PACDN family variants. While PACDN045-LF uses SC-70-6 (6-pin), PACDN042 uses SOT-23-3 (3-pin), PACDN043 uses SOT-143 (4-pin), and PACDN044/046 use TSSOP-8/MSOP-8 (8-pin). Pin counts, layouts, and channel mappings differ across the family - confirmed by distinct package outlines (CASE 419AD vs. CASE 318/527AF/948AL/846AB) in the datasheet mechanical drawings.
PACDN045-LF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOT-23-6
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Discontinued at Digi-Key
- Type:
- Zener
- Unidirectional Channels:
- 5
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 6.1V (Min)
- Voltage - Breakdown (Min):
- -
- Voltage - Clamping (Max) @ Ipp:
- 8V
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- USB
- Capacitance @ Frequency:
- 30pF @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-6
PACDN045-LF FAQ
1.How can I place an order for PACDN045-LF through Aetrix?
Please submit a Request for Quotation (RFQ) for PACDN045-LF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PACDN045-LF reliable?
The price and inventory of PACDN045-LF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PACDN045-LF is usually 5 days.
3.What payment methods are accepted for PACDN045-LF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PACDN045-LF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PACDN045-LF?
PACDN045-LF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PACDN045-LF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PACDN045-LF?
For technical support, including PACDN045-LF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PACDN045-LF requirements.
6.How does Aetrix verify that PACDN045-LF is sourced from the original manufacturer or authorized distributors?
All PACDN045-LF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PACDN045-LF meets industry standards.
7.What is the process for return or replacement of PACDN045-LF?
All PACDN045-LF units undergo pre-shipment inspection (PSI). If there is an issue with PACDN045-LF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PACDN045-LF part is unused and in its original packaging.
Return procedure for PACDN045-LF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PACDN045-LF Tags

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ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

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ESD5Z3.3T1G
onsemi

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D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

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DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

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D5V0L1B2WS-7
Diodes Incorporated
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