NXP Semiconductors PESD12VL2BT/S911,2
- Part No.:
- PESD12VL2BT/S911,2
- Manufacturer:
- NXP Semiconductors
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PESD12VL2BT/S911,2.pdf
- Description:
- TVS DIODE 12VWM 37VC SOT23
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PESD12VL2BT/S911,2 from Nexperia is a low-capacitance, double bidirectional ESD protection diode in SOT23 package, designed to protect two signal lines against electrostatic discharge up to 23 kV (IEC 61000-4-2 level 4) and surge transients (IEC 61000-4-5, 5 A peak pulse). It features 12 V reverse standoff voltage, 19 pF diode capacitance at 0 V, <1 nA reverse leakage at 12 V, 37 V clamping voltage at 5 A, and 200 W peak pulse power.
For engineers reviewing the PESD12VL2BT/S911,2 datasheet, PESD12VL2BT/S911,2 pinout, PESD12VL2BT/S911,2 application, or PESD12VL2BT/S911,2 equivalent, this device is selected for high-speed data line protection where ultra-low capacitance, precise clamping behavior, and dual-line bidirectional ESD robustness are required - especially in portable electronics, SIM card interfaces, and audio/video signal paths.
Technical Context
The PESD12VL2BT/S911,2 implements a symmetric bidirectional TVS structure with a common cathode configuration across pins 1 and 2 tied to pin 3, enabling simultaneous protection of two independent signal lines referenced to ground. Its breakdown voltage is 14.2–16.7 V (5 mA), ensuring reliable turn-on before system-level damage occurs.
It complies fully with IEC 61000-4-2 (±23 kV contact discharge) and IEC 61000-4-5 (8/20 µs surge, 5 A), with differential resistance of 200 Ω at 1 mA - critical for minimizing voltage overshoot during fast transients while maintaining signal integrity on high-frequency lines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage | 12 V - maximum continuous operating voltage before conduction begins; sets safe margin above 12 V nominal signal rails. |
| Clamping Voltage | 37 V at 5 A - peak voltage seen by protected circuit during IEC 61000-4-5 surge; ensures downstream ICs remain within absolute max ratings. |
| Diode Capacitance | 19 pF at 0 V, 1 MHz - enables use on USB 2.0, HDMI, and audio lines without signal degradation or timing skew. |
| ESD Withstand | 23 kV contact discharge per IEC 61000-4-2 level 4 - exceeds industrial and consumer immunity requirements for handheld and peripheral ports. |
| Peak Pulse Power | 200 W (8/20 µs) - sustains transient energy without thermal failure during surge events on communication lines. |
| Reverse Leakage | <1 nA at 12 V - negligible loading on high-impedance analog or digital signal paths, preserving battery life in portable devices. |
| Breakdown Voltage | 15.8 V typical at 5 mA - defines precise conduction threshold for predictable, repeatable protection activation. |
Pinout & Package
SOT23 plastic surface-mounted package (TO-236AB), 3-pin, small outline (2.8 mm × 1.4 mm × 1.1 mm), optimized for space-constrained PCB layouts near connectors and I/O ports.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode 1 | Anode of first bidirectional protection path; connects to Line 1 for clamping both polarities relative to ground via Pin 3. |
| 2 | Cathode 2 | Anode of second bidirectional protection path; connects to Line 2 for independent clamping relative to shared ground (Pin 3). |
| 3 | Double Cathode / Ground | Common cathode terminal tied to system ground; serves as reference node for both protection channels and transient return path. |
Key Features
| Feature | Design Value |
|---|---|
| Low Capacitance | 19 pF enables minimal signal distortion on high-speed interfaces like USB 2.0 and audio codecs. |
| Bidirectional Protection | Protects AC-coupled or bipolar signal lines (e.g., SIM card CLK/DAT) without polarity constraints. |
| Ultra-Low Leakage | <1 nA at VRWM preserves battery runtime and avoids false triggering in low-power sensor nodes. |
| IEC 61000-4-2/4-5 Compliance | Validated to 23 kV ESD and 5 A surge ensures drop-in qualification for CE/FCC/UL-certified end equipment. |
| Common-Cathode Dual-Line Architecture | Reduces component count vs. discrete diodes; simplifies layout with single ground tie point for two protected signals. |
Applications
| Cellular Handset SIM Interface | USB 2.0 Data Lines |
|---|---|
Use Scenario: Protecting SIM card clock (CLK), data (DAT), and reset (RST) lines in smartphones and feature phones exposed to user-handling ESD. IC Role / Device Role / Timing Role: Bidirectional transient suppressor placed between SIM connector and baseband processor GPIOs. Use Value: Prevents latch-up or permanent damage to SIM controller I/Os while adding only 19 pF loading - no impact on setup/hold timing margins. | Use Scenario: Shielding D+ and D− differential pair in USB 2.0 host/device ports from ESD events during cable insertion or handling. IC Role / Device Role / Timing Role: Low-capacitance clamp on each data line referenced to chassis ground, preserving signal integrity up to 480 Mbps. Use Value: Maintains eye diagram compliance and jitter budget due to sub-20 pF capacitance and symmetrical clamping response. |
| Audio Line Input/Output | Portable Media Player Headphone Jack |
Use Scenario: Safeguarding line-in and line-out analog audio paths in tablets and docking stations against user-induced ESD. IC Role / Device Role / Timing Role: Dual-channel ESD clamp on stereo left/right channels, referenced to audio ground plane. Use Value: Eliminates audible pop/click artifacts during ESD events and prevents DC offset shifts caused by leakage current drift. | Use Scenario: Protecting headphone jack tip/ring contacts in MP3 players and Bluetooth speakers from repeated plug/unplug ESD stress. IC Role / Device Role / Timing Role: Bidirectional protector on left/right audio channels and ground return path, mounted directly at jack footprint. Use Value: Ensures >23 kV ESD immunity without degrading THD+N performance (<0.01%) or frequency response (20 Hz–20 kHz). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESD5Z12VD-2/TR | 12 V VRWM, 20 pF, 25 kV ESD rating, SOD-523 package (smaller, 1.3 mm × 0.85 mm) | Single-line protection; requires two devices for dual-line coverage vs. integrated dual-channel PESD12VL2BT/S911,2 | Select when board space is more constrained than BOM count, and dual-line integration is not required. |
| TPD2E007DRYR | 5.5 V VRWM, 12 pF, 8 kV IEC 61000-4-2, 3-pin SOT-23 but with different pinout (I/O1–GND–I/O2) | Lower standoff voltage limits use to 5 V systems; lower ESD rating reduces robustness in high-risk environments | Choose only for 3.3–5 V logic interfaces where ultra-low capacitance (12 pF) outweighs reduced ESD margin and voltage range. |
Compared with ESD5Z12VD-2/TR and TPD2E007DRYR, the PESD12VL2BT/S911,2 uniquely delivers dual-line 12 V standoff, 23 kV ESD immunity, and 19 pF in one SOT23 device - optimizing PCB area, BOM count, and system-level reliability for 12 V signal paths.
Availability
PESD12VL2BT/S911,2 is available at Aetrix Electronics and suitable for cellular handset design, portable media interface development, and audio subsystem production requiring stable component supply, full traceability, and long-term lifecycle support.
Supply support for PESD12VL2BT/S911,2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable discrete, logic, and MOSFET solutions with focus on efficiency, miniaturization, and robustness.
The PESDxL2BT series was developed specifically for compact, high-reliability ESD protection of dual bidirectional signal lines in portable and consumer electronics - prioritizing low capacitance, precise clamping, and industry-standard compliance.
FAQ
What is the maximum clamping voltage of the PESD12VL2BT/S911,2 under IEC 61000-4-5 surge conditions?
The PESD12VL2BT/S911,2 exhibits a maximum clamping voltage of 37 V at 5 A peak pulse current (8/20 µs waveform), as specified in Table 8 of the official Nexperia datasheet. This value represents the upper limit of voltage imposed on protected circuitry during standardized surge events, ensuring compatibility with 12 V-rated ICs and interfaces. The clamping behavior remains stable across temperature and lifetime, verified per IEC 61000-4-5 compliance testing.
Does the PESD12VL2BT/S911,2 support bidirectional signal lines such as those used in SIM card interfaces?
Yes, the PESD12VL2BT/S911,2 is explicitly designed for bidirectional signal line protection, including SIM card CLK, DAT, and RST lines. Its symmetric internal structure - with two anodes (Pins 1 and 2) tied to a common cathode (Pin 3) - allows clamping of both positive and negative transients on each line independently. This architecture matches the AC-coupled, dual-polarity nature of SIM interfaces without requiring external biasing or polarity selection.
What is the diode capacitance of the PESD12VL2BT/S911,2 and how does it affect high-speed signal integrity?
The PESD12VL2BT/S911,2 has a typical diode capacitance of 19 pF measured at 0 V reverse bias and 1 MHz, per Table 8. This low value minimizes loading on high-speed signals such as USB 2.0 differential pairs or audio codec inputs, preventing rise/fall time degradation, impedance mismatch, and intersymbol interference. At 19 pF, the device adds negligible phase shift below 100 MHz, making it suitable for applications up to 480 Mbps without equalization.
How does the PESD12VL2BT/S911,2 achieve 23 kV ESD protection while maintaining low leakage current?
The PESD12VL2BT/S911,2 achieves 23 kV ESD immunity (IEC 61000-4-2 contact discharge) through optimized junction design and process control, while maintaining <1 nA reverse leakage at 12 V by using high-quality silicon and precise doping profiles. These characteristics are validated across process lots and temperature ranges (−65 °C to +150 °C), ensuring consistent performance in battery-powered portable devices where leakage directly impacts standby current and battery life.
Can the PESD12VL2BT/S911,2 be used in place of the PESD5V0L2BT for 5 V logic protection?
No - the PESD12VL2BT/S911,2 is rated for 12 V reverse standoff and is not recommended for direct substitution in 5 V logic circuits. Its higher breakdown voltage (14.2–16.7 V) delays conduction during lower-voltage transients, risking damage to 5 V ICs before clamping activates. For 5 V applications, the PESD5V0L2BT (5 V VRWM, 75 pF, 28 V clamping at 13 A) is the appropriate variant in the same family and package, ensuring timely protection alignment with system voltage rails.
PESD12VL2BT/S911,2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 2
- Voltage - Reverse Standoff (Typ):
- 12V (Max)
- Voltage - Breakdown (Min):
- 14.2V
- Voltage - Clamping (Max) @ Ipp:
- 37V
- Current - Peak Pulse (10/1000µs):
- 5A (8/20µs)
- Power - Peak Pulse:
- 200W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 19pF @ 1MHz
- Operating Temperature:
- -65°C ~ 150°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23 (TO-236AB)
PESD12VL2BT/S911,2 FAQ
1.How can I place an order for PESD12VL2BT/S911,2 through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD12VL2BT/S911,2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD12VL2BT/S911,2 reliable?
The price and inventory of PESD12VL2BT/S911,2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD12VL2BT/S911,2 is usually 5 days.
3.What payment methods are accepted for PESD12VL2BT/S911,2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD12VL2BT/S911,2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD12VL2BT/S911,2?
PESD12VL2BT/S911,2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD12VL2BT/S911,2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD12VL2BT/S911,2?
For technical support, including PESD12VL2BT/S911,2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD12VL2BT/S911,2 requirements.
6.How does Aetrix verify that PESD12VL2BT/S911,2 is sourced from the original manufacturer or authorized distributors?
All PESD12VL2BT/S911,2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD12VL2BT/S911,2 meets industry standards.
7.What is the process for return or replacement of PESD12VL2BT/S911,2?
All PESD12VL2BT/S911,2 units undergo pre-shipment inspection (PSI). If there is an issue with PESD12VL2BT/S911,2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD12VL2BT/S911,2 part is unused and in its original packaging.
Return procedure for PESD12VL2BT/S911,2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD12VL2BT/S911,2 Tags

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ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

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ESD5Z3.3T1G
onsemi

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D5V0H1B2LP-7B
Diodes Incorporated

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D5V0P1B2LP-7B
Diodes Incorporated

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DESD5V0U1BA-7
Diodes Incorporated

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ESD5Z5.0T1G
onsemi

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DESD5V0U1BB-7
Diodes Incorporated

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D12V0L1B2LP-7B
Diodes Incorporated

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PESD2V0Y1BSFYL
Nexperia USA Inc.

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DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

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D5V0L1B2WS-7
Diodes Incorporated
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