Nexperia USA Inc. PESD1IVN24-AX
- Part No.:
- PESD1IVN24-AX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- SC-76, SOD-323
- Datasheet:
-
PESD1IVN24-AX.pdf
- Description:
- TVS DIODE 24VWM 42VC SOD323
- Quantity:
- Payment:

- Shipping:

Inventory:2,231
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Product details
Overview
PESD1IVN24-AX from Nexperia is a bidirectional automotive-grade ESD protection diode in SOD323 package, designed for single-line in-vehicle network (IVN) bus protection. It delivers 24 V reverse standoff voltage, 33 V clamping at 3.5 A peak pulse current, and 30 kV IEC 61000-4-2/ISO 10605 ESD immunity-enabling robust CAN, LIN, FlexRay, and SENT line protection in harsh automotive environments.
For engineers reviewing the PESD1IVN24-AX datasheet, PESD1IVN24-AX pinout, PESD1IVN24-AX application, or PESD1IVN24-AX equivalent, key selection criteria include clamping performance under ISO 7637-3 pulses (±100 V/−150 V), ultra-low leakage (<1 nA at 24 V), and AEC-Q101 qualification for under-hood deployment.
Technical Context
This dual-cathode TVS diode implements a symmetrical bidirectional clamping architecture optimized for fast transient suppression on unidirectional IVN data lines. Its low dynamic resistance (0.16 Ω typical) and 14 pF capacitance at 0 V ensure minimal signal distortion on high-speed buses like CAN FD and SENT while maintaining sub-33 V clamping under 8/20 µs surges.
The device operates across −55 °C to +150 °C ambient and supports both contact-discharge ESD (30 kV per IEC/ISO) and ISO 7637-3 Pulse a/b surge events. Its SOD323 footprint enables compact placement directly at connectors-critical for meeting automotive EMC requirements without PCB layout compromises.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage | 24 V - Maximum continuous operating voltage before conduction; sets bus line compatibility with 24 V automotive systems. |
| Clamping Voltage | 33 V (typ.) at 3.5 A - Peak voltage seen by protected IC during 8/20 µs surge; ensures downstream transceivers remain within safe operating limits. |
| ESD Rating | 30 kV (IEC 61000-4-2 & ISO 10605) - Withstands repeated contact-discharge events without degradation; validated for automotive production life cycles. |
| Diode Capacitance | 14 pF at 0 V - Low enough to avoid signal integrity issues on LIN (20 kbps) and SENT (up to 125 kbps) buses. |
| Leakage Current | <1 nA at 24 V - Prevents battery drain in always-on vehicle modules such as body control units and sensor nodes. |
| Surge Rating | ISO 7637-3 Pulse a: −150 V / Pulse b: +100 V - Matches real-world load-dump and inductive switching transients in 12/24 V architectures. |
| Junction Temperature | 150 °C max - Enables mounting near heat sources (e.g., power electronics) without derating in engine bay applications. |
Pinout & Package
SOD323 (SC-76) surface-mount plastic package: 2-pin, 1.3 mm pitch, 1.7 × 1.25 × 0.95 mm body. Cathode marking bar on side of package aligns with Pin 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode (Diode 1) | Connects to protected IVN line (e.g., LIN bus); forms one half of symmetrical clamping path to ground. |
| 2 | Cathode (Diode 2) | Connects to system ground; completes bidirectional ESD current path during positive/negative transients. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional Clamping | Enables single-device protection of unidirectional data lines without polarity constraints-reduces BOM count vs. discrete diode pairs. |
| AEC-Q101 Qualified | Validated for automotive Grade 3 (−40 °C to +125 °C case temperature) operation; supports 15-year vehicle service life requirements. |
| Low Dynamic Resistance | 0.16 Ω typical-minimizes voltage overshoot during fast ESD events and improves energy handling consistency across temperature. |
| Ultra-Low Capacitance | 14 pF at 0 V reverse bias-preserves rise/fall times on SENT and LIN signals without added termination or equalization. |
| Compact SOD323 Footprint | 1.7 × 1.25 mm area-allows placement within 2 mm of connector pins to meet ISO 10605 layout guidelines for optimal ESD suppression. |
Applications
| CAN Bus Protection | LIN Bus Protection |
|---|---|
Use Scenario: Protecting high-speed CAN FD transceivers in ADAS domain controllers against ESD during service port connection. IC Role / Device Role / Timing Role: Bidirectional transient voltage suppressor placed between CAN_H/CAN_L differential pair and transceiver input pins. Use Value: Limits clamped voltage to ≤33 V during ±8 kV contact discharge-prevents latch-up or damage to CAN PHY circuitry rated for 40 V absolute maximum. |
Use Scenario: Securing LIN slave nodes (e.g., door module sensors) from ESD induced via wiring harnesses during assembly or field maintenance. IC Role / Device Role / Timing Role: Single-line ESD clamp on LIN bus line referenced to chassis ground. Use Value: 14 pF capacitance avoids signal edge degradation at 19.2 kbps LIN baud rate; <1 nA leakage prevents parasitic drain on 12 V battery-backed nodes. |
| FlexRay Bus Protection | SENT Sensor Interface Protection |
Use Scenario: Safeguarding FlexRay communication channels in powertrain ECUs exposed to under-hood ESD and load dump transients. IC Role / Device Role / Timing Role: Line-to-ground ESD suppressor on FlexRay A/B channels, mounted adjacent to connector interface. Use Value: Withstands ISO 7637-3 Pulse b (+100 V) without breakdown-maintains bus availability during ignition switch cycling and alternator load dumps. |
Use Scenario: Shielding SENT output lines from pressure/temperature sensors in engine management systems against assembly-line ESD events. IC Role / Device Role / Timing Role: Unidirectional ESD clamp on SENT signal line referenced to sensor ground. Use Value: 33 V clamping ensures SENT waveform integrity remains within 0–5 V compliance window-even during 30 kV contact discharge per ISO 10605. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NUP4105MR6T1G | Unidirectional; 24 V VRWM; 35 V VCL at 3.5 A; higher capacitance (30 pF). | Requires separate ground-referenced placement per line; less suitable for bidirectional IVN protocols like CAN. | Prefer when protecting isolated analog or digital I/O where polarity is fixed and higher capacitance is acceptable. |
| Vishay VEML6030X01 | Not applicable - optical ambient light sensor; no ESD protection function. | N/A - incorrect functional category. | Excluded from consideration due to mismatched device type and specification scope. |
Compared with NUP4105MR6T1G, PESD1IVN24-AX offers true bidirectional clamping and lower capacitance critical for IVN data integrity, while VEML6030X01 is unrelated and unsuitable as an ESD protection alternative.
Availability
PESD1IVN24-AX is available at Aetrix Electronics and suitable for automotive ECU design, in-vehicle network subsystem integration, and Tier-1 module manufacturing requiring stable component supply and full AEC-Q101 traceability.
Supply support for PESD1IVN24-AX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET devices, with deep specialization in automotive-grade components.
PESD1IVN24-AX belongs to Nexperia's Automotive ESD Protection portfolio-designed specifically to meet stringent ISO 10605, IEC 61000-4-2, and ISO 7637-3 requirements for in-vehicle network resilience.
FAQ
Is PESD1IVN24-AX compatible with CAN FD physical layer requirements?
Yes. Its 14 pF capacitance at 0 V and 33 V clamping voltage ensure minimal signal distortion on CAN FD buses up to 5 Mbps. The device maintains impedance integrity when placed within 2 mm of the connector, satisfying ISO 11898-2 layout recommendations for high-speed CAN transceivers.
What is the recommended PCB layout for optimal ESD suppression?
Place PESD1IVN24-AX directly adjacent to the IVN connector with shortest possible traces to both protected line and ground plane. Use dedicated ground vias within 1 mm of Pin 2, avoid shared return paths, and minimize loop area between diode and protected net-per ISO 10605 layout best practices.
Does PESD1IVN24-AX require external series impedance for ESD protection?
No. It is designed for direct line-to-ground placement without series resistors. Adding external impedance would degrade clamping response time and increase voltage overshoot during sub-nanosecond ESD events-contrary to its optimized low-inductance SOD323 implementation.
How does PESD1IVN24-AX perform under extended temperature cycling?
Qualified to AEC-Q101 Grade 3 (−40 °C to +125 °C), it maintains stable clamping voltage and leakage current across 1000+ thermal cycles. Data sheet Figure 8 confirms <10% peak pulse power variation from −40 °C to +150 °C junction temperature.
PESD1IVN24-AX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- SC-76, SOD-323
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 24V (Max)
- Voltage - Breakdown (Min):
- 25.5V
- Voltage - Clamping (Max) @ Ipp:
- 42V
- Current - Peak Pulse (10/1000µs):
- 3.5A (8/20µs)
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- CAN
- Capacitance @ Frequency:
- 14pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOD-323
PESD1IVN24-AX FAQ
1.How can I place an order for PESD1IVN24-AX through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD1IVN24-AX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD1IVN24-AX reliable?
The price and inventory of PESD1IVN24-AX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD1IVN24-AX is usually 5 days.
3.What payment methods are accepted for PESD1IVN24-AX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD1IVN24-AX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD1IVN24-AX?
PESD1IVN24-AX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD1IVN24-AX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD1IVN24-AX?
For technical support, including PESD1IVN24-AX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD1IVN24-AX requirements.
6.How does Aetrix verify that PESD1IVN24-AX is sourced from the original manufacturer or authorized distributors?
All PESD1IVN24-AX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD1IVN24-AX meets industry standards.
7.What is the process for return or replacement of PESD1IVN24-AX?
All PESD1IVN24-AX units undergo pre-shipment inspection (PSI). If there is an issue with PESD1IVN24-AX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD1IVN24-AX part is unused and in its original packaging.
Return procedure for PESD1IVN24-AX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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