My Inquiry
My Account
Nexperia USA Inc. PESD1IVN24LS-QYL
- Part No.:
- PESD1IVN24LS-QYL
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- SOD-882
- Datasheet:
-
PESD1IVN24LS-QYL.pdf
- Description:
- AUTOMOTIVE IN-VEHICLE NETWORK PR
- Quantity:
- Payment:
- Shipping:
Inventory:2,163
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PESD1IVN24LS-QYL from Nexperia is a bidirectional automotive-grade ESD protection diode in DFN1006BD-2 (SOD882BD) package, designed for in-vehicle network bus lines. It provides 24 V reverse stand-off voltage, 33 V clamping at 3.5 A, 30 kV IEC 61000-4-2/ISO 10605 ESD immunity, <1 nA leakage, and AEC-Q101 qualification - deployed on CAN, LIN, FlexRay, and SENT interfaces.
For engineers reviewing the PESD1IVN24LS-QYL datasheet, PESD1IVN24LS-QYL pinout, PESD1IVN24LS-QYL application, or PESD1IVN24LS-QYL equivalent, this page delivers verified electrical parameters, validated dual-cathode pin configuration, automotive IVN-specific use cases, and qualified alternatives for bus-line transient protection design.
Technical Context
This device implements a dual-cathode, bidirectional TVS structure optimized for low-capacitance (<17 pF), low-leakage (<1 nA at 24 V), and fast-response ESD suppression on high-speed automotive serial buses. Its 0.65 mm pitch and side-wettable flanks support automated optical inspection and robust reflow soldering in space-constrained modules.
The clamping behavior is characterized by 33 V typical at 3.5 A (8/20 µs), dynamic resistance of 0.2 Ω, and breakdown voltage range of 25.5–35.5 V at 10 mA. It operates across –55 °C to +150 °C ambient and supports peak pulse power up to 100 W for sub-millisecond transients.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Stand-off Voltage | 24 V - Maximum continuous working voltage before conduction begins; ensures no interference with 24 V nominal IVN bus operation. |
| Clamping Voltage | 33 V (typ.) at 3.5 A - Limits transient voltage seen by downstream transceiver ICs during ESD events, protecting against latch-up or damage. |
| ESD Withstand | ±30 kV per IEC 61000-4-2 & ISO 10605 - Meets stringent automotive ESD immunity requirements for connector-level discharge testing. |
| Diode Capacitance | 14–17 pF at 0 V - Low enough to avoid signal integrity degradation on high-speed buses like CAN FD or SENT with >1 Mbps data rates. |
| Leakage Current | <1 nA at 24 V - Minimizes standby power loss and avoids false triggering in low-current sensor nodes or battery-backed modules. |
| Package | DFN1006BD-2 (SOD882BD), 1.0 × 0.6 × 0.47 mm - Ultra-small footprint with side-wettable flanks enables AOI-compatible assembly in compact ECUs. |
| Junction Temperature | Up to +150 °C - Supports under-hood placement near powertrain or ADAS modules without thermal derating. |
Pinout & Package
DFN1006BD-2 (SOD882BD) is a 2-terminal, leadless ultra-small plastic package with side-wettable flanks, 0.65 mm pitch, and dimensions of 1.0 mm × 0.6 mm × 0.47 mm. The marking bar indicates cathode orientation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode (Diode 1) | Connects to protected line (e.g., CAN_H); forms one half of bidirectional clamping path to ground. |
| 2 | Cathode (Diode 2) | Connects to ground reference; completes symmetrical ESD current path for both polarities of transient events. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional ESD Clamping | Enables single-device protection of differential or single-ended IVN lines without polarity constraints. |
| Side-Wettable Flanks | Supports automated optical inspection (AOI) of solder joints in high-reliability automotive PCB assembly. |
| AEC-Q101 Qualified | Validated for automotive use including temperature cycling, HTRB, and ESD stress per discrete semiconductor standard. |
| Low Dynamic Resistance | 0.2 Ω typical - Ensures rapid voltage collapse during ESD pulses, minimizing energy dissipation in protected ICs. |
| Ultra-Low Capacitance | 14–17 pF - Preserves signal rise/fall times on CAN, LIN, and SENT buses operating up to 2 Mbps. |
Applications
| CAN Bus Protection | LIN Bus Protection |
|---|---|
|
Use Scenario: ESD protection at OBD-II connector or gateway module CAN_H/CAN_L interface exposed to service personnel handling. IC Role / Device Role / Timing Role: Transient voltage suppressor placed directly at connector entry point to shunt ESD current before reaching CAN transceiver. Use Value: Prevents permanent failure of CAN PHY due to ±30 kV contact discharge while maintaining <17 pF loading for ISO 11898-2 compliance. |
Use Scenario: Protection of LIN slave node (e.g., door module actuator) against ESD during vehicle assembly or maintenance. IC Role / Device Role / Timing Role: Bidirectional clamp between LIN bus line and chassis ground, located within 2 mm of connector pin. Use Value: Eliminates need for external RC filters by providing sub-33 V clamping at 3.5 A, preserving LIN's 19.2 kbps timing integrity. |
| FlexRay Bus Protection | SENT Sensor Interface Protection |
|
Use Scenario: Front radar ECU FlexRay communication channel exposed to high-energy transients in ADAS domain controllers. IC Role / Device Role / Timing Role: Low-capacitance TVS on FlexRay A/B differential pair, mounted adjacent to connector with minimized trace inductance. Use Value: Maintains signal fidelity at 10 Mbps data rate while clamping 8/20 µs surges to ≤42 V peak, preventing transceiver latch-up. |
Use Scenario: Engine knock sensor or pressure sensor using SENT protocol, requiring robust ESD immunity at engine bay harness entry. IC Role / Device Role / Timing Role: Single-line unidirectional clamp (cathode-to-bus) on SENT data line, referenced to local sensor ground. Use Value: Enables reliable 125 kbps SENT frame transmission with <1 nA leakage, avoiding baseline shift in analog sensor conditioning circuits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NUP4105MR6T1G | Unidirectional, 24 V VRWM, 35 V VCL at 3.5 A, 25 pF capacitance | Requires two devices for bidirectional protection; higher capacitance limits use on >500 kbps buses | Select when cost sensitivity outweighs board space and high-speed performance needs. |
| Vishay VEML6040-GS08 | Not applicable - optical sensor, not ESD protection device | N/A | Excluded: misidentified part; not functionally comparable. |
Compared with PESD1IVN24LS-QYL, NUP4105MR6T1G requires dual placement for full bidirectional coverage and introduces ~8 pF more capacitance - reducing margin for CAN FD or SENT high-resolution modes - whereas PESD1IVN24LS-QYL delivers integrated bidirectionality, lower capacitance, and AEC-Q101 validation in a single 1.0 × 0.6 mm footprint.
Availability
PESD1IVN24LS-QYL is available at Aetrix Electronics and suitable for automotive electronic control units, ADAS domain controllers, and body electronics modules requiring stable component supply with AEC-Q101 assurance and long-term production continuity.
Supply support for PESD1IVN24LS-QYL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions, with leadership in automotive-qualified components and advanced packaging.
PESD1IVN24LS-QYL belongs to Nexperia's Automotive ESD Protection portfolio, engineered specifically for robust transient suppression on in-vehicle networks - balancing low capacitance, fast response, and AEC-Q101 compliance for CAN, LIN, FlexRay, and SENT systems.
FAQ
Is PESD1IVN24LS-QYL compatible with lead-free reflow processes?
Yes. The DFN1006BD-2 package is qualified for standard lead-free reflow profiles, including peak temperatures up to 260 °C. Its side-wettable flanks enable reliable solder joint formation and automated optical inspection, meeting IPC-J-STD-020 moisture sensitivity level 1 requirements.
What is the maximum recommended trace length between PESD1IVN24LS-QYL and the protected connector?
Trace length should be ≤2 mm from device cathodes to connector pins. Longer traces increase inductance, degrading clamping performance during fast ESD events (e.g., 1 ns rise time per IEC 61000-4-2). Ground return path must be equally short and low-inductance via dedicated vias to inner ground plane.
Does PESD1IVN24LS-QYL support bidirectional signal lines like CAN differential pairs?
Yes. Its dual-cathode configuration provides symmetrical clamping for both polarities, making it suitable for single-line protection on CAN_H or CAN_L individually. For full differential protection, two devices are used - one per line - sharing the same ground reference.
How does the 30 kV ISO 10605 rating differ from its IEC 61000-4-2 rating?
Both specify ±30 kV contact discharge, but ISO 10605 uses a 330 pF/330 Ω network simulating human-body discharge into automotive harnesses, while IEC 61000-4-2 uses 150 pF/330 Ω for general electronics. PESD1IVN24LS-QYL passes both, confirming suitability for harsher automotive ESD environments.
PESD1IVN24LS-QYL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- SOD-882
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 24V (Max)
- Voltage - Breakdown (Min):
- 25.5V
- Voltage - Clamping (Max) @ Ipp:
- 42V
- Current - Peak Pulse (10/1000µs):
- 3.5A (8/20µs)
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- CAN
- Capacitance @ Frequency:
- 14pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DFN1006BD-2
PESD1IVN24LS-QYL FAQ
1.How can I place an order for PESD1IVN24LS-QYL through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD1IVN24LS-QYL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD1IVN24LS-QYL reliable?
The price and inventory of PESD1IVN24LS-QYL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD1IVN24LS-QYL is usually 5 days.
3.What payment methods are accepted for PESD1IVN24LS-QYL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD1IVN24LS-QYL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD1IVN24LS-QYL?
PESD1IVN24LS-QYL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD1IVN24LS-QYL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD1IVN24LS-QYL?
For technical support, including PESD1IVN24LS-QYL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD1IVN24LS-QYL requirements.
6.How does Aetrix verify that PESD1IVN24LS-QYL is sourced from the original manufacturer or authorized distributors?
All PESD1IVN24LS-QYL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD1IVN24LS-QYL meets industry standards.
7.What is the process for return or replacement of PESD1IVN24LS-QYL?
All PESD1IVN24LS-QYL units undergo pre-shipment inspection (PSI). If there is an issue with PESD1IVN24LS-QYL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD1IVN24LS-QYL part is unused and in its original packaging.
Return procedure for PESD1IVN24LS-QYL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD1IVN24LS-QYL Tags
-
ESD9B5.0ST5G
onsemi
-
DESD3V3E1BL-7B
Diodes Incorporated
-
ESD5Z3.3T1G
onsemi
-
D5V0H1B2LP-7B
Diodes Incorporated
-
D5V0P1B2LP-7B
Diodes Incorporated
-
DESD5V0U1BA-7
Diodes Incorporated
-
ESD5Z5.0T1G
onsemi
-
DESD5V0U1BB-7
Diodes Incorporated
-
D12V0L1B2LP-7B
Diodes Incorporated
-
PESD2V0Y1BSFYL
Nexperia USA Inc.
-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage
-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
