Nexperia USA Inc. PESD2ETH-DF

Overview

PESD2ETH-D from Nexperia is an ultra-low-capacitance double rail-to-rail ESD protection diode in SOT457 (TSOP6) package, designed to protect two high-speed differential data lines-such as 100BASE-T1 automotive Ethernet pairs-from ESD transients up to ±8 kV (IEC 61000-4-2) and surge pulses up to 2.5 A (8/20 µs). It integrates three ESD protection elements: two rail-to-rail diodes per I/O channel plus a dedicated V_CC-to-ground Zener, enabling protection even with no supply voltage applied. Its 1.3 pF typical capacitance per I/O line ensures minimal signal integrity impact on >100 MHz differential interfaces.

For engineers reviewing the PESD2ETH-D datasheet, PESD2ETH-D pinout, PESD2ETH-D application, or PESD2ETH-D equivalent, this device is selected for automotive Ethernet (100BASE-T1), LVDS, and USB 2.0 signal-line protection where sub-2 pF capacitance, AEC-Q101 qualification, and rail-to-rail clamping down to ±11.8 V at 2.5 A are critical selection criteria.

Technical Context

The PESD2ETH-D implements a triple-diode architecture: two symmetrical bidirectional rail-to-rail clamps (pins 1–2 and 3–2, plus pins 4–2 and 6–2) protect differential pairs, while a third Zener diode (pin 5–2) provides V_CC-to-ground transient suppression. All clamping paths exhibit dynamic resistance of 1.1 Ω (positive) and 0.9 Ω (negative), enabling fast response to ESD events without signal distortion.

Its operation is supply-independent for I/O protection-clamping occurs between I/O pins and GND regardless of V_CC presence-while the V_CC pin enables enhanced system-level protection when powered. Reverse standoff voltage is rated at 5.5 V, and breakdown voltage of the Zener element is 6–9 V, aligning with 5 V automotive supply rails.

Key Specifications

Pinout & Package

Package: SOT457 (TSOP6), plastic surface-mounted package (SC-74), 1.1 mm × 2.7 mm footprint, 0.95 mm pitch, 6-pin leaded outline.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ESD protection applications.

Compared with NUP4105MR6T1G, PESD2ETH-D delivers 2.7× lower capacitance and automotive qualification, making it essential for 100BASE-T1; VEML6030X01 is unrelated and must be excluded from ESD protection BOMs.

Availability

PESD2ETH-D is available at Aetrix Electronics and suitable for automotive Ethernet PHY protection, LVDS video interface hardening, and USB 2.0 port safeguarding requiring stable component supply across production lifecycles.

Supply support for PESD2ETH-D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in ESD protection, MOSFETs, and analog solutions for automotive and industrial markets.

The PESD2ETH-D belongs to Nexperia's automotive-grade ESD protection portfolio, engineered specifically for high-speed serial interfaces in vehicles-prioritizing ultra-low capacitance, AEC-Q101 compliance, and rail-to-rail clamping performance.

FAQ

Can PESD2ETH-D protect both differential pairs of a 100BASE-T1 interface simultaneously?

Yes. Pins 1/3 form one rail-to-rail clamp for Channel A (e.g., TD+/TD−), while pins 4/6 form an independent clamp for Channel B (e.g., RD+/RD−). Pin 2 (GND) serves both channels, and pin 5 (V_CC) may be tied to PHY supply for coordinated clamping. This dual-channel design matches 100BASE-T1's full-duplex requirement without cross-talk or shared-path limitations.

What is the significance of the 1.3 pF capacitance specification?

The 1.3 pF value is measured from pins 4 or 6 to GND at 1 MHz and 0 V bias, representing the dominant capacitive load seen by each I/O line. At 100BASE-T1's 66.67 MHz fundamental frequency and 200+ MHz harmonics, this low capacitance avoids signal rise-time degradation, impedance mismatch, and bit-error-rate increase-critical for maintaining IEEE 802.3bw compliance.

Is pin 5 (V_CC) mandatory for operation?

No. The I/O clamps (pins 1/3 and 4/6) operate independently of V_CC, providing full ESD protection even with unpowered circuitry. Pin 5 enables additional V_CC-to-GND Zener clamping (6–9 V breakdown) for surge events on the supply rail, enhancing system robustness-but is optional for basic signal-line protection.

How does PESD2ETH-D differ from standard TVS diodes in automotive use?

Unlike general-purpose TVS diodes, PESD2ETH-D uses a rail-to-rail architecture optimized for differential signaling: its clamping occurs symmetrically between I/O pins and GND-not just I/O-to-GND-preserving common-mode voltage and minimizing skew. Combined with 1.3 pF capacitance and AEC-Q101 qualification, it meets stringent automotive serial interface requirements that generic TVS devices cannot satisfy.