Nexperia USA Inc. PESD2ETHX-QR
- Part No.:
- PESD2ETHX-QR
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- TO-253-4, TO-253AA
- Datasheet:
-
PESD2ETHX-QR.pdf
- Description:
- PESD2ETHX-Q/SOT143/SOT4
- Quantity:
- Payment:

- Shipping:

Inventory:4,247
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PESD2ETHX-QR from Nexperia is an ultra-low-capacitance double rail-to-rail ESD protection diode in SOT143B package, designed to protect two high-speed automotive data lines (e.g., 100BASE-T1 differential pairs) against IEC 61000-4-2 ±8 kV contact discharge. It features 1 pF capacitance between I/O pins, 5.5 V reverse standoff voltage, and AEC-Q101 qualification for automotive use.
For engineers reviewing the PESD2ETHX-QR datasheet, PESD2ETHX-QR pinout, PESD2ETHX-QR application, or PESD2ETHX-QR equivalent, key selection criteria include rail-to-rail clamping performance, sub-1.5 pF inter-pin capacitance, low leakage (<100 nA at 3 V), and validated placement in BroadR-Reach PHY protection layouts.
Technical Context
This device integrates three ESD protection elements: two rail-to-rail diodes (pins 2–4 and 3–4) for bidirectional signal line protection, plus a dedicated ground-referenced diode (pins 2/3 to 1) enabling protection even with no VCC applied. Its architecture supports simultaneous clamping of differential and common-mode transients.
The SOT143B package enables compact PCB layout adjacent to Ethernet connectors, with pin 1 as GND, pins 2 and 3 as protected I/Os, and pin 4 as VCC. Clamping voltages are specified at 35 V (+8 kV) and −5 V (−8 kV) measured at 30 ns per IEC 61000-4-2.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Capacitance (I/O to I/O) | 1 pF at 1 MHz, 0 V bias - preserves signal integrity on 100BASE-T1/LVDS links up to 100 MHz |
| Reverse Standoff Voltage | 5.5 V - compatible with 3.3 V and 5 V automotive supply rails without leakage-induced false triggering |
| Clamping Voltage (+8 kV) | 35 V at 30 ns - limits transient overvoltage to safe levels for TJA1100 and similar BroadR-Reach PHYs |
| Clamping Voltage (−8 kV) | −5 V at 30 ns - ensures symmetric negative transient suppression critical for differential signaling |
| IEC 61000-4-2 Rating | ±8 kV contact discharge - meets automotive EMC requirements for exterior-facing Ethernet interfaces |
| AEC-Q101 Qualification | Qualified - supports deployment in engine bay, ADAS, and infotainment systems with −40 °C to +125 °C operation |
Pinout & Package
SOT143B plastic surface-mount package: 4 leads, 1.9 mm pitch, 2.9 mm × 1.3 mm × 1.0 mm body. Designed for reflow soldering with defined footprint per Figure 9 (JEDEC MS-012 variant).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND | Low-inductance transient return path; must connect directly to solid ground plane |
| 2 | I/O 1 | Protected differential signal line (e.g., TDN); clamped rail-to-rail vs. VCC and GND |
| 3 | I/O 2 | Protected differential signal line (e.g., TDP); symmetric clamping behavior to Pin 2 |
| 4 | VCC | Supply reference for rail-to-rail diodes; enables clamping during powered operation |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail + ground-referenced protection | Three-diode topology ensures full protection coverage whether VCC is present or absent (e.g., during power-down) |
| 1 pF inter-pin capacitance | Minimizes signal distortion and insertion loss on 100BASE-T1 channels operating at 66.67 MHz base frequency |
| −5 V / +35 V clamping asymmetry | Matches differential receiver input tolerance windows and prevents negative overvoltage damage to PHY inputs |
| AEC-Q101 qualified | Validated for automotive underhood and cabin environments including thermal cycling, humidity, and mechanical shock |
Applications
| 100BASE-T1 Automotive Ethernet | Automotive LVDS Interfaces |
|---|---|
Use Scenario: Protection of differential pair between connector and TJA1100 PHY in zonal ECU or gateway module. IC Role / Device Role / Timing Role: ESD transient suppressor placed <1 mm from connector, providing rail-to-rail clamping on both TDN/TDP lines. Use Value: Prevents latch-up or permanent damage to PHY during hot-plug events while maintaining <0.5 dB insertion loss at 100 MHz. |
Use Scenario: Shielded cable interface for camera sensor output in ADAS domain controller. IC Role / Device Role / Timing Role: Bidirectional ESD clamp on LVDS clock/data pairs, referenced to local 3.3 V rail and chassis ground. Use Value: Enables compliance with ISO 10605 330 Ω/150 pF discharge test without degrading 1.2 Gbps eye diagram margin. |
| Automotive USB 2.0 | High-Speed CAN FD Data Lines |
Use Scenario: In-vehicle infotainment USB port exposed to user-accessible panels. IC Role / Device Role / Timing Role: Low-capacitance ESD guard on D+/D− lines, with VCC tied to 5 V USB bus. Use Value: Maintains USB 2.0 full-speed signaling integrity (480 Mbps) while suppressing ±8 kV contact discharges. |
Use Scenario: Protection of CAN FD transceiver (e.g., TJA1044) in battery management system communication bus. IC Role / Device Role / Timing Role: Secondary ESD layer after common-mode choke, clamping fast transients before they reach transceiver inputs. Use Value: Reduces risk of CAN bus lockup during ESD events without adding jitter or propagation delay to 5 Mbps signals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NUP4201MR6T1G | Higher inter-pin capacitance (3.5 pF), single-rail clamping only (no VCC-referenced diode) | Limited to powered-only protection; unsuitable for unpowered hot-swap scenarios | Select when cost sensitivity outweighs need for zero-power protection and ultra-low capacitance |
| Infineon ESD204-B1-W02 | Lower clamping voltage (+12 V/−8 V), but higher leakage (500 nA at 3 V) and no AEC-Q101 certification | Not qualified for automotive underhood use; better suited for consumer USB ports | Prefer for non-automotive designs where tighter clamping is prioritized over leakage and qualification |
Compared with NUP4201MR6T1G and ESD204-B1-W02, PESD2ETHX-QR uniquely delivers AEC-Q101 qualification, true rail-to-rail + ground protection, and 1 pF inter-pin capacitance-making it the only option validated for 100BASE-T1 PHY front-end protection in production automotive ECUs.
Availability
PESD2ETHX-QR is available at Aetrix Electronics and suitable for automotive Ethernet gateways, ADAS camera modules, and infotainment USB interfaces requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for PESD2ETHX-QR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in ESD protection, MOSFETs, and bipolar transistors.
The PESD2ETHX-QR belongs to Nexperia's automotive-grade ESD protection portfolio, engineered specifically for high-speed serial interfaces in vehicles-including 100BASE-T1, LVDS, and USB-where signal fidelity and AEC-Q101 compliance are mandatory.
FAQ
What is the maximum recommended PCB trace length between PESD2ETHX-QR and the protected connector?
The datasheet specifies placement "as close to the input terminal or connector as possible." For 100BASE-T1 compliance, trace length from pins 2/3 to the connector should not exceed 1.5 mm, with direct connection to ground plane via multiple vias near pin 1. Longer traces increase inductance and degrade clamping response during 1 ns ESD rise times.
Can PESD2ETHX-QR be used without connecting pin 4 (VCC)?
Yes. The device includes a dedicated ground-referenced diode (pins 2/3 to pin 1), enabling functional ESD protection even with pin 4 floating or unconnected. However, rail-to-rail clamping (pin 2/3 to pin 4) is inactive without VCC, reducing clamping effectiveness for transients exceeding the diode's intrinsic breakdown voltage (~6 V).
Does PESD2ETHX-QR support bidirectional signal transmission on pins 2 and 3?
Yes. Pins 2 and 3 are symmetrical I/O terminals with identical electrical characteristics: 1 pF capacitance between them, matched forward voltage (0.7 V typ), and balanced clamping behavior. This symmetry ensures no signal polarity dependency-critical for differential protocols like 100BASE-T1 and LVDS.
How does the 1 pF capacitance specification relate to real-world 100BASE-T1 performance?
The 1 pF value (measured pin 2 to pin 3 at 1 MHz, 0 V) translates to <0.15 dB insertion loss and <1° phase skew at 100 MHz-well within OPEN Alliance v2.0 requirements for channel compliance. Measured eye diagrams show >85% eye height retention at 100 m cable length with this device installed.
PESD2ETHX-QR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- TO-253-4, TO-253AA
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Steering (Rail to Rail)
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5.5V (Max)
- Voltage - Breakdown (Min):
- 6V
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- Ethernet, USB
- Capacitance @ Frequency:
- 16pF @ 1MHz
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-143B
PESD2ETHX-QR FAQ
1.How can I place an order for PESD2ETHX-QR through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD2ETHX-QR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD2ETHX-QR reliable?
The price and inventory of PESD2ETHX-QR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD2ETHX-QR is usually 5 days.
3.What payment methods are accepted for PESD2ETHX-QR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD2ETHX-QR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD2ETHX-QR?
PESD2ETHX-QR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD2ETHX-QR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD2ETHX-QR?
For technical support, including PESD2ETHX-QR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD2ETHX-QR requirements.
6.How does Aetrix verify that PESD2ETHX-QR is sourced from the original manufacturer or authorized distributors?
All PESD2ETHX-QR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD2ETHX-QR meets industry standards.
7.What is the process for return or replacement of PESD2ETHX-QR?
All PESD2ETHX-QR units undergo pre-shipment inspection (PSI). If there is an issue with PESD2ETHX-QR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD2ETHX-QR part is unused and in its original packaging.
Return procedure for PESD2ETHX-QR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD2ETHX-QR Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

