Nexperia USA Inc. PESD2IVN24-TR
- Part No.:
- PESD2IVN24-TR
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PESD2IVN24-TR.pdf
- Description:
- TVS DIODE 24VWM 42VC TO236AB
- Quantity:
- Payment:

- Shipping:

Inventory:20,596
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Product details
Overview
PESD2IVN24-TR from Nexperia is a dual-channel automotive-grade ESD protection diode in SOT23 package, designed for bidirectional transient suppression on two in-vehicle network lines. It delivers 24 V reverse standoff voltage, 33 V clamping at 3.5 A (8/20 µs), <1 nA leakage, 14–17 pF capacitance per channel, and AEC-Q101 qualification - deployed on CAN, LIN, FlexRay, and SENT bus interfaces in engine control units and body electronics.
For engineers reviewing the PESD2IVN24-TR datasheet, PESD2IVN24-TR pinout, PESD2IVN24-TR application, or PESD2IVN24-TR equivalent, this page provides verified electrical parameters, validated dual-cathode pin mapping, automotive IVN-specific clamping behavior, and direct alternatives with documented capacitance matching and pulse immunity differences.
Technical Context
This device implements a common-cathode dual-diode architecture where pins 1 and 2 serve as independent cathodes for two protected lines, and pin 3 is the shared cathode node tied to system ground. Its matched diode capacitance (∆Cd/Cd = 0.1 %) ensures minimal signal skew between differential or parallel bus lines.
It meets IEC 61000-4-2 (±30 kV contact), ISO 10605 (±30 kV, 330 pF/330 Ω), and ISO 7637-3 (Pulse a: −150 V; Pulse b: +100 V), with dynamic resistance of 0.2 Ω and peak pulse power up to 100 W (tp = 10 ms).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage | 24 V - Maximum continuous DC voltage each channel withstands without conduction; sets minimum bus operating margin for 24 V automotive systems. |
| Clamping Voltage | 33 V (typ.) at 3.5 A, 8/20 µs - Peak voltage seen by protected IC during surge; ensures downstream transceivers remain below absolute max ratings. |
| Diode Capacitance | 14–17 pF per channel at 1 MHz, 0 V - Low, tightly matched capacitance preserves signal integrity on high-speed buses like CAN FD and SENT. |
| ESD Rating | ±30 kV per IEC 61000-4-2 and ISO 10605 - Validated immunity to worst-case human-body-model discharges in assembly and field environments. |
| Leakage Current | <1 nA at 24 V - Negligible DC loading on bias-sensitive IVN receivers; avoids false wake-up or offset drift in low-power nodes. |
| AEC-Q101 Qualified | Automotive Grade 3 (−40 °C to +125 °C ambient) - Certified for under-hood and cabin modules requiring long-term reliability in thermal cycling and vibration. |
Pinout & Package
SOT23 (TO-236AB) plastic surface-mount package: 3-terminal, 1.9 mm pitch, 2.9 × 1.3 × 1.0 mm body; optimized for automated placement and reflow soldering on dense automotive PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | K1 (Cathode 1) | Connects to first protected IVN line (e.g., CANH); conducts transient current to common cathode during positive or negative ESD events. |
| 2 | K2 (Cathode 2) | Connects to second protected IVN line (e.g., CANL); enables symmetrical clamping with K1 while maintaining independent line routing. |
| 3 | K (Common Cathode) | Single ground reference point for both diodes; must be routed to low-inductance chassis or power ground to minimize clamping overshoot. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-channel common-cathode topology | Enables compact, single-device protection of differential or parallel bus pairs without inter-channel crosstalk or layout asymmetry. |
| 0.1 % capacitance matching (∆Cd/Cd) | Guarantees ≤0.1 % skew between channels - critical for timing-sensitive protocols like SENT and FlexRay where phase alignment affects decoding. |
| Ultra-low leakage (<1 nA) | Prevents DC loading on high-impedance IVN receiver inputs, preserving common-mode range and enabling sleep-mode compatibility. |
| ISO 7637-3 Pulse a/b compliance | Validated against −150 V (Pulse a) and +100 V (Pulse b) load-dump and switching transients - covers alternator-induced surges in 12 V/24 V systems. |
Applications
| CAN Bus Protection | LIN Bus Protection |
|---|---|
|
Use Scenario: ESD protection at OBD-II connector interface in engine control unit (ECU) or gateway module. IC Role / Device Role / Timing Role: Bidirectional transient clamp placed directly at CANH/CANL entry points before CAN transceiver input stage. Use Value: Limits clamped voltage to 33 V during ±8 kV contact discharge, preventing latch-up or gate oxide damage in TJA1042/TJA1051 transceivers. |
Use Scenario: Surge suppression on LIN slave node wiring harness in door module or seat controller. IC Role / Device Role / Timing Role: Low-capacitance shunt protector on LIN bus line, referenced to local ground plane near microcontroller LIN peripheral. Use Value: Maintains LIN signal rise/fall times <1 µs due to 14–17 pF per channel, avoiding bit error rate degradation at 19.2 kbps. |
| FlexRay Bus Protection | SENT Sensor Interface Protection |
|
Use Scenario: Transient hardening of FlexRay A/B channels in ADAS domain controller exposed to chassis-level ESD. IC Role / Device Role / Timing Role: Dual-line clamp with matched capacitance ensuring <0.1 % skew between differential FlexRay signals. Use Value: Enables reliable 10 Mbps operation by preserving signal symmetry and minimizing jitter induced by unequal clamping delays. |
Use Scenario: ESD safeguard on SENT output line from pressure or temperature sensor in powertrain applications. IC Role / Device Role / Timing Role: Low-leakage (<1 nA) protector placed adjacent to sensor ASIC output, minimizing DC offset impact on 12-bit pulse-width encoding. Use Value: Prevents SENT frame corruption during factory handling discharges while sustaining <1 LSB measurement accuracy over full temperature range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel automotive ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NUP2114 | Higher clamping voltage (40 V at 3.5 A); 22 pF capacitance; no ∆Cd/Cd spec provided. | Less suitable for high-speed SENT/FlexRay due to higher capacitance and unverified matching. | Select when cost sensitivity outweighs strict capacitance matching and lower clamping is not required. |
| Vishay VEML6030X01 | Single-channel only; requires two devices; 12 pF capacitance; 25 V VRWM; not AEC-Q101 qualified. | Not drop-in replaceable; increases BOM count and PCB area; unsuitable for production automotive designs. | Consider only for non-automotive prototyping where dual-channel integration is unnecessary. |
Compared with NUP2114 and VEML6030X01, PESD2IVN24-TR uniquely combines AEC-Q101 qualification, 0.1 % capacitance matching, and 33 V clamping in a single SOT23 footprint - delivering superior signal fidelity and design consolidation for CAN, LIN, FlexRay, and SENT systems.
Availability
PESD2IVN24-TR is available at Aetrix Electronics and suitable for automotive ECU design, body electronics integration, and ADAS sensor interface development requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for PESD2IVN24-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions for automotive, industrial, and mobile markets.
PESD2IVN24-TR belongs to Nexperia's Automotive ESD Protection portfolio, engineered specifically to meet stringent ISO 10605, IEC 61000-4-2, and ISO 7637-3 requirements for in-vehicle networks - prioritizing signal integrity, thermal robustness, and AEC-Q101 reliability.
FAQ
What is the maximum peak pulse current rating for PESD2IVN24-TR?
The rated peak pulse current (IPPM) is 3.5 A for an 8/20 µs waveform per IEC 61000-4-5, measured from pin 1 or 2 to pin 3. This rating is validated under single-pulse conditions and defines the device's ability to safely divert transient energy without parametric shift or failure.
How does the 0.1 % capacitance matching benefit differential bus protection?
The ∆Cd/Cd = 0.1 % specification ensures near-identical capacitance between pin 1–3 and pin 2–3, minimizing propagation delay mismatch between complementary bus lines. This preserves signal symmetry in protocols like CAN and FlexRay, reducing jitter and improving noise immunity during high-speed data transmission.
Can PESD2IVN24-TR be used on 12 V automotive systems?
Yes - its 24 V reverse standoff voltage provides sufficient margin above nominal 12 V system rails, including load-dump transients up to +100 V (ISO 7637-3 Pulse b). The device remains non-conductive during normal operation and activates only during overvoltage events exceeding VRWM.
Is the common cathode (pin 3) intended for connection to chassis or signal ground?
Pin 3 must connect to a low-inductance ground reference - preferably the same ground plane used by the protected transceiver IC. For optimal clamping performance, avoid sharing this return path with noisy power or digital grounds; dedicated ground vias to inner-layer planes are recommended per Nexperia layout guidelines.
PESD2IVN24-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 2
- Voltage - Reverse Standoff (Typ):
- 24V (Max)
- Voltage - Breakdown (Min):
- 25.5V
- Voltage - Clamping (Max) @ Ipp:
- 42V
- Current - Peak Pulse (10/1000µs):
- 3.5A (8/20µs)
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- CAN
- Capacitance @ Frequency:
- 14pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TO-236AB
PESD2IVN24-TR FAQ
1.How can I place an order for PESD2IVN24-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD2IVN24-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD2IVN24-TR reliable?
The price and inventory of PESD2IVN24-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD2IVN24-TR is usually 5 days.
3.What payment methods are accepted for PESD2IVN24-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD2IVN24-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD2IVN24-TR?
PESD2IVN24-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD2IVN24-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD2IVN24-TR?
For technical support, including PESD2IVN24-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD2IVN24-TR requirements.
6.How does Aetrix verify that PESD2IVN24-TR is sourced from the original manufacturer or authorized distributors?
All PESD2IVN24-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD2IVN24-TR meets industry standards.
7.What is the process for return or replacement of PESD2IVN24-TR?
All PESD2IVN24-TR units undergo pre-shipment inspection (PSI). If there is an issue with PESD2IVN24-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD2IVN24-TR part is unused and in its original packaging.
Return procedure for PESD2IVN24-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD2IVN24-TR Tags

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