Nexperia USA Inc. PESD36VS2UT,215
- Part No.:
- PESD36VS2UT,215
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PESD36VS2UT,215.pdf
- Description:
- TVS DIODE 36VWM 60VC TO236AB
- Quantity:
- Payment:

- Shipping:

Inventory:51,327
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Product details
Overview
PESD36VS2UT from Nexperia is a low-capacitance unidirectional double ESD protection diode in SOT23 package, designed to protect two signal lines against IEC 61000-4-2 level 4 (±30 kV contact) and IEC 61000-4-5 surge transients (2.5 A, 8/20 µs). It features 17 pF typical capacitance, 55 V clamping voltage at 1 A, and ≤1 µA reverse leakage at 30 V - ideal for high-speed USB 2.0 and Ethernet 10/100 Mbit/s interfaces.
For engineers reviewing the PESD36VS2UT datasheet, PESD36VS2UT pinout, PESD36VS2UT application, or PESD36VS2UT equivalent, this page delivers verified electrical parameters, validated SOT23 terminal mapping, real-world protection use cases, and confirmed alternative parts with documented functional trade-offs for signal-line ESD hardening.
Technical Context
This device implements two independent unidirectional Zener-clamp diodes sharing a common anode (pin 3), enabling simultaneous protection of two positive-polarity signal lines referenced to ground. Its architecture avoids bidirectional conduction, eliminating signal distortion on DC-biased lines.
Clamping action begins at 40–44 V breakdown (VBR, 5 mA), limits transient voltage to ≤60 V at 1 A (VCL), and maintains low dynamic impedance (<300 Ω differential resistance) during surge events - critical for preserving signal integrity in high-bandwidth analog and digital paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage | 36 V - maximum continuous operating voltage before leakage rises; defines safe DC bias margin for protected lines. |
| Diode Capacitance | 17 pF (typ.) at 1 MHz, 0 V - ensures minimal signal attenuation and phase shift on 10/100 Mbit/s Ethernet and USB 2.0 data lanes. |
| Clamping Voltage | 55 V (max) at 1 A, 8/20 µs - limits transient overvoltage seen by downstream ICs during ESD events. |
| Peak Pulse Power | 160 W - sustains single-event surge energy without failure per IEC 61000-4-5 compliance. |
| ESD Withstand | ±30 kV contact discharge (IEC 61000-4-2 Level 4) - exceeds industrial immunity requirements for handheld and peripheral ports. |
| Reverse Leakage | ≤1 µA at 30 V - prevents DC loading and battery drain in portable electronics. |
Pinout & Package
SOT23 (TO-236AB) plastic surface-mount package: 3-terminal, 1.9 mm pitch, 2.9 mm × 1.3 mm × 1.0 mm body. RoHS-compliant, halogen-free, suitable for reflow and wave soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | K1 (cathode of diode 1) | Connects to first signal line requiring unidirectional clamping to ground; conducts only when line voltage exceeds VBR. |
| 2 | K2 (cathode of diode 2) | Connects to second independent signal line; enables dual-line protection without cross-coupling. |
| 3 | A (common anode) | Must be connected directly to system ground plane; forms shared return path for both clamping paths with minimal inductance. |
Key Features
| Feature | Design Value |
|---|---|
| Unidirectional dual-line protection | Two independent cathodes (pins 1 & 2) share one grounded anode (pin 3), enabling discrete clamping of separate positive-going signals without interference. |
| Low 17 pF capacitance | Maintains >200 MHz bandwidth - preserves edge rate and eye diagram integrity on USB 2.0 (480 Mbps) and Fast Ethernet (100 Mbps) links. |
| 160 W peak pulse power rating | Handles IEC 61000-4-5 surge currents up to 2.5 A (8/20 µs) without parametric shift or catastrophic failure. |
| Ultra-low 0.02 µA typical leakage | Minimizes standby current draw in battery-powered devices such as SIM card adapters and Bluetooth headsets. |
Applications
| USB 2.0 Data Lines | Fast Ethernet PHY Interface |
|---|---|
Use Scenario: Protection of D+ and D− lines on USB 2.0 host/device connectors exposed to user-handled ESD events. IC Role / Device Role / Timing Role: Unidirectional clamping diode array placed immediately adjacent to connector, shunting transients to ground before reaching USB transceiver. Use Value: 17 pF capacitance avoids signal rise-time degradation; 55 V clamping prevents damage to 3.3 V tolerant PHY I/O cells. |
Use Scenario: ESD safeguarding of TX+/TX− and RX+/RX− differential pairs in 10/100BASE-TX Ethernet PHY modules. IC Role / Device Role / Timing Role: Dual-channel unidirectional clamp per pair, with common anode tied to clean chassis ground to avoid ground bounce coupling. Use Value: Low leakage (≤1 µA) prevents DC offset accumulation on transformer-coupled lines; 30 kV ESD rating meets EN 61000-6-2 industrial immunity. |
| SIM Card Interface | Audio Line Input Protection |
Use Scenario: Guarding SIM VCC, I/O, and CLK pins against insertion/removal ESD in mobile handsets and IoT modules. IC Role / Device Role / Timing Role: Single PESD36VS2UT protects two critical low-voltage (1.8 V/3 V) SIM signals using dedicated cathodes and shared ground reference. Use Value: 36 V standoff allows safe operation across all SIM voltage classes; 0.02 µA typical IRM avoids compromising low-power sleep states. |
Use Scenario: Shielding line-in inputs (e.g., 3.5 mm jack) on portable speakers and audio DACs from user-touch ESD. IC Role / Device Role / Timing Role: Cathode-to-signal, anode-to-ground configuration clamps positive transients on analog input paths while preserving DC bias. Use Value: Unidirectional behavior prevents clipping of negative audio swing; 55 V clamping protects op-amp inputs rated for ±15 V rail-to-rail operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar unidirectional dual-line ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NUP4202MR6T1G | Higher capacitance (30 pF typ.), lower clamping (48 V at 1 A), same SOT23-3 package and unidirectional dual-cathode topology. | Better for lower-voltage systems (e.g., 1.8 V I/O) but less suitable for 100 Mbps+ data rates due to bandwidth reduction. | Select when tighter clamping is prioritized over signal integrity; verify eye diagram compliance at target data rate. |
| Vishay VEML6030X01 | Not applicable - VEML6030X01 is an ambient light sensor, not an ESD protector. No valid alternative found. | N/A | Do not substitute; invalid part number for ESD protection function. |
Compared with NUP4202MR6T1G, PESD36VS2UT offers 44 % lower capacitance for superior high-speed signal fidelity, while trading 7 V higher clamping - acceptable where protected ICs tolerate ≥55 V transient overshoot and bandwidth is critical.
Availability
PESD36VS2UT is available at Aetrix Electronics and suitable for USB 2.0 interface protection, Fast Ethernet PHY safeguarding, and SIM card circuit hardening requiring stable component supply across production lifecycles.
Supply support for PESD36VS2UT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions, with core expertise in ESD protection and automotive-grade components.
PESD36VS2UT belongs to Nexperia's PESD series of ultra-low-capacitance ESD protection diodes, engineered specifically for high-speed data line hardening in consumer, computing, and communications equipment.
FAQ
What is the maximum continuous reverse voltage rating for PESD36VS2UT?
The PESD36VS2UT has a reverse standoff voltage (VRWM) of 36 V - meaning it can safely block up to 36 V DC or peak AC voltage across its cathode-anode terminals without significant leakage. This rating is confirmed in Table 1 and Table 6 of the official Nexperia datasheet dated 17 April 2023.
Can PESD36VS2UT protect bidirectional signal lines like RS-485 or CAN?
No - PESD36VS2UT is strictly unidirectional, with two cathodes and one common anode. It clamps only positive transients relative to ground. Bidirectional lines require symmetrical clamping (e.g., PESD5V0S2UAT for dual-line bidirectional protection) or separate back-to-back diodes to handle both polarities.
How should the common anode (pin 3) be routed on the PCB?
Pin 3 must connect directly to a low-inductance ground plane via the shortest possible trace - ideally with multiple vias - to minimize clamping loop inductance. Per Figure 7 and Section 10 of the datasheet, improper grounding degrades clamping performance and may cause voltage overshoot exceeding 55 V during ESD events.
Is PESD36VS2UT qualified for automotive applications?
No - the 17 April 2023 datasheet explicitly states in Section 13 that this version was changed to non-automotive qualification. Automotive-grade equivalents (e.g., PESD36VS2U-Q) are available separately and undergo AEC-Q200 stress testing; standard PESD36VS2UT is intended for industrial and consumer use only.
PESD36VS2UT,215 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 36V (Max)
- Voltage - Breakdown (Min):
- 40V
- Voltage - Clamping (Max) @ Ipp:
- 60V
- Current - Peak Pulse (10/1000µs):
- 2.5A (8/20µs)
- Power - Peak Pulse:
- 160W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- 17pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TO-236AB
PESD36VS2UT,215 FAQ
1.How can I place an order for PESD36VS2UT,215 through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD36VS2UT,215 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD36VS2UT,215 reliable?
The price and inventory of PESD36VS2UT,215 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD36VS2UT,215 is usually 5 days.
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Once your PESD36VS2UT,215 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD36VS2UT,215?
For technical support, including PESD36VS2UT,215 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD36VS2UT,215 requirements.
6.How does Aetrix verify that PESD36VS2UT,215 is sourced from the original manufacturer or authorized distributors?
All PESD36VS2UT,215 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD36VS2UT,215 meets industry standards.
7.What is the process for return or replacement of PESD36VS2UT,215?
All PESD36VS2UT,215 units undergo pre-shipment inspection (PSI). If there is an issue with PESD36VS2UT,215, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD36VS2UT,215 part is unused and in its original packaging.
Return procedure for PESD36VS2UT,215:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD36VS2UT,215 Tags

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