Nexperia USA Inc. PESD3V3F2UTR
- Part No.:
- PESD3V3F2UTR
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PESD3V3F2UTR.pdf
- Description:
- TVS DIODE 3.3VWM TO236AB
- Quantity:
- Payment:

- Shipping:

Inventory:9,046
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PESD3V3F2UT from Nexperia is a dual-line unidirectional ESD protection diode in SOT23 package, designed for high-speed data lines with 3.3 V reverse standoff voltage, 0.56 pF typical capacitance, and 3.3 V clamping voltage at 8 A TLP. It protects USB2.0, HDMI, and DisplayPort interfaces against 8 kV IEC 61000-4-2 and ISO 10605 transients.
For engineers reviewing the PESD3V3F2UT datasheet, PESD3V3F2UT pinout, PESD3V3F2UT application, or PESD3V3F2UT equivalent, key selection criteria include ultra-low capacitance for signal integrity, common-anode dual-diode topology for compact two-line protection, and 175 °C junction temperature rating for automotive-adjacent industrial use.
Technical Context
This device implements a snap-back clamping structure with negative dynamic resistance, enabling low-voltage clamping (3.3 V at 8 A TLP) while maintaining sub-1 Ω dynamic resistance. Its unidirectional configuration requires external DC biasing of protected lines to ensure proper operation.
Capacitance matching between channels is specified at ≤1 % ΔCd/Cd, supporting balanced differential signaling in LVDS and eSATA. The common anode (pin 3) simplifies PCB layout by reducing ground return path inductance versus discrete single-diode solutions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage | 3.3 V - Ensures no conduction during normal 3.3 V data line operation (e.g., USB D+/D−) |
| Clamping Voltage | 3.3 V at 8 A TLP - Limits transient voltage to safe level for downstream PHY ICs |
| Diode Capacitance | 0.56 pF - Minimizes signal distortion on >480 Mbps USB2.0 and 1.65 Gbps HDMI 1.4 lines |
| ESD Rating | 8 kV contact per IEC 61000-4-2 - Meets international immunity requirements for end-user ports |
| Junction Temperature | 175 °C - Supports operation in under-hood or enclosed industrial enclosures without derating |
| Peak Pulse Current | 4 A (8/20 µs) - Handles surge energy from IEC 61000-4-5 Level 3 (1 kV) coupling events |
Pinout & Package
Package: SOT23 (TO-236AB), 3-terminal surface-mount plastic package, 2.9 mm × 1.3 mm × 1.0 mm body, 1.9 mm lead pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | K1 (cathode of diode 1) | Connects to first protected data line (e.g., USB D+); cathode polarity enables unidirectional clamping to common anode |
| 2 | K2 (cathode of diode 2) | Connects to second protected data line (e.g., USB D−); matched capacitance ensures differential signal symmetry |
| 3 | CA (common anode) | Must be tied to system ground or local reference plane; forms shared return path for both clamping paths |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low capacitance | 0.56 pF typical - Preserves signal rise time and eye diagram integrity on 480 Mbps USB2.0 links |
| Snap-back clamping behavior | Negative dynamic resistance below 3.3 V - Reduces clamping voltage by >30 % vs. standard TVS during ESD events |
| Matched channel capacitance | ≤1 % ΔCd/Cd - Maintains <0.1 dB insertion loss imbalance across differential pairs in HDMI/DisplayPort |
| High-temperature operation | 175 °C max junction temperature - Enables placement near heat-generating SoCs or power regulators |
Applications
| USB2.0 Interface Protection | HDMI 1.4 Data Lane Protection |
|---|---|
Use Scenario: Protecting D+ and D− lines of a USB2.0 host controller against user-port ESD events. IC Role / Device Role / Timing Role: Unidirectional clamping diode pair referenced to common ground, placed within 5 mm of connector. Use Value: 0.56 pF capacitance avoids degrading 480 Mbps eye opening; 3.3 V clamping prevents PHY latch-up. |
Use Scenario: Shielding TMDS clock and data channels in HDMI 1.4 source devices (e.g., set-top box SoC outputs). IC Role / Device Role / Timing Role: Dual-channel ESD suppressor with matched capacitance, mounted adjacent to HDMI receptacle. Use Value: ≤1 % capacitance mismatch preserves differential skew; 175 °C rating supports operation near video processor die. |
| DisplayPort 1.2 Auxiliary Channel | eSATA Gen II Transceiver Protection |
Use Scenario: Safeguarding DP AUX CH+/− lines in laptop GPU outputs exposed to docking station hot-plug events. IC Role / Device Role / Timing Role: Low-capacitance dual diode providing bidirectional transient suppression via common-anode grounding. Use Value: Sub-1 pF total capacitance prevents AUX channel bit error rate degradation at 1 Mbps. |
Use Scenario: Protecting eSATA TX/RX differential pairs in external storage enclosures subjected to handling ESD. IC Role / Device Role / Timing Role: High-speed data line protector with 4 A 8/20 µs surge rating for conducted transient immunity. Use Value: 3.3 V clamping aligns with eSATA receiver input tolerance; SOT23 footprint minimizes board area vs. discrete solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-line ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NUP4201MR6T1G | Higher 0.8 pF capacitance; bidirectional configuration; 5.5 V standoff | Requires no DC bias but increases insertion loss on >200 MHz signals; less suitable for USB2.0 | Select when protecting AC-coupled or floating lines where unidirectional bias is impractical |
| Vishay VEML6030X01 | Single-channel only; 0.45 pF capacitance; 3.3 V standoff; different SOD-323 package | Needs two devices for dual-line protection; smaller footprint but higher assembly cost and routing complexity | Prefer for space-constrained designs where independent channel tuning is required |
Compared with NUP4201MR6T1G, PESD3V3F2UT offers lower capacitance and tighter matching for high-speed differential buses; compared with VEML6030X01, it delivers integrated dual-channel protection in one SOT23 footprint, reducing PCB real estate and assembly steps.
Availability
PESD3V3F2UT is available at Aetrix Electronics and suitable for USB2.0 interface design, HDMI 1.4 video output modules, and DisplayPort 1.2 auxiliary channel protection requiring stable component supply across production lifecycles.
Supply support for PESD3V3F2UT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and ESD protection devices, spun off from Philips in 2017.
PESD3V3F2UT belongs to Nexperia's TrEOS ESD protection portfolio, engineered specifically for high-speed serial interfaces where capacitance, clamping voltage, and channel matching directly impact signal fidelity and system robustness.
FAQ
What is the correct PCB layout practice for PESD3V3F2UT on USB2.0 lines?
Place the device within 5 mm of the USB connector with symmetric, equal-length traces to pins 1 and 2; connect pin 3 directly to a solid ground plane using multiple vias; avoid stubs or right-angle bends to preserve impedance control and minimize parasitic inductance that could degrade clamping response.
Can PESD3V3F2UT be used on 5 V-tolerant HDMI hot-plug detect (HPD) lines?
No - its 3.3 V reverse standoff voltage makes it unsuitable for 5 V HPD lines, which risk forward conduction and leakage current. Use a 5.5 V standoff device like PESD5V0U2BT instead; PESD3V3F2UT is rated only for 3.3 V nominal data lines such as TMDS or D+/D−.
Does PESD3V3F2UT require external biasing, and why?
Yes - as a unidirectional diode array, it requires the protected lines to be DC-biased above ground (e.g., USB D+ at ~2.8 V) to maintain reverse bias during normal operation. Without proper bias, leakage current increases and clamping threshold becomes unpredictable during transients.
How does the snap-back behavior affect system-level ESD testing?
Snap-back reduces clamping voltage to 3.3 V during 8 kV ESD events, limiting stress on downstream PHY ICs. However, it demands careful PCB grounding: insufficient ground plane inductance can cause voltage overshoot during the snap-back transition, so low-inductance connection to pin 3 is mandatory.
PESD3V3F2UTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- -
- Unidirectional Channels:
- -
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 3.3V
- Voltage - Breakdown (Min):
- -
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TO-236AB
PESD3V3F2UTR FAQ
1.How can I place an order for PESD3V3F2UTR through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD3V3F2UTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD3V3F2UTR reliable?
The price and inventory of PESD3V3F2UTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD3V3F2UTR is usually 5 days.
3.What payment methods are accepted for PESD3V3F2UTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD3V3F2UTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD3V3F2UTR?
PESD3V3F2UTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD3V3F2UTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD3V3F2UTR?
For technical support, including PESD3V3F2UTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD3V3F2UTR requirements.
6.How does Aetrix verify that PESD3V3F2UTR is sourced from the original manufacturer or authorized distributors?
All PESD3V3F2UTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD3V3F2UTR meets industry standards.
7.What is the process for return or replacement of PESD3V3F2UTR?
All PESD3V3F2UTR units undergo pre-shipment inspection (PSI). If there is an issue with PESD3V3F2UTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD3V3F2UTR part is unused and in its original packaging.
Return procedure for PESD3V3F2UTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD3V3F2UTR Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

