Nexperia USA Inc. PESD3V3L2BT-QR
- Part No.:
- PESD3V3L2BT-QR
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PESD3V3L2BT-QR.pdf
- Description:
- PESD3V3L2BT-Q/SOT23/TO-236AB
- Quantity:
- Payment:

- Shipping:

Inventory:6,876
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Product details
Overview
PESD3V3L2BT-Q from Nexperia is a low-capacitance, double bidirectional ESD protection diode in SOT23 package, designed to safeguard two signal lines against ±30 kV IEC 61000-4-2 ESD and 15 A IEC 61000-4-5 surge transients. It features 3.3 V reverse standoff voltage, 101 pF capacitance at 1 MHz, and 26 V clamping voltage at 15 A, enabling high-speed interface protection in space-constrained automotive and portable electronics.
For engineers reviewing the PESD3V3L2BT-Q datasheet, PESD3V3L2BT-Q pinout, PESD3V3L2BT-Q application, or PESD3V3L2BT-Q equivalent, key selection criteria include bidirectional clamping capability, ultra-low leakage (90 nA), AEC-Q101 qualification, and dual-line protection in a 3-pin SOT23 footprint-critical for USB, SIM card, and audio line designs requiring minimal signal distortion.
Technical Context
This device implements a symmetric dual-cathode topology with shared cathode (Pin 3) and independent cathodes (Pins 1 & 2), enabling true bidirectional clamping on both protected lines without polarity constraints. Its differential resistance of 400 Ω at 1 mA supports fast transient response while maintaining low insertion loss.
Rated for 350 W peak pulse power under 8/20 µs surge waveform and qualified per AEC-Q101, it operates across –65 °C to +150 °C ambient, with junction temperature limited to 150 °C. The 101 pF capacitance at 0 V bias ensures compatibility with high-speed data lines up to ~100 Mbps.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage | 3.3 V - Maximum continuous operating voltage before conduction begins; sets upper limit for protected signal swing. |
| Clamping Voltage | 26 V at 15 A - Peak voltage seen by downstream circuit during worst-case IEC 61000-4-5 surge; defines protection margin. |
| Diode Capacitance | 101 pF at 1 MHz, 0 V - Low enough to avoid signal integrity degradation on USB 2.0 or audio differential pairs. |
| ESD Rating | ±30 kV contact discharge (IEC 61000-4-2 Level 4) - Full immunity to human-body ESD events in handheld and automotive environments. |
| Leakage Current | 90 nA at 3.3 V - Ensures negligible DC loading on battery-powered sensor or SIM card interfaces. |
| Peak Pulse Power | 350 W - Sustains high-energy transients without thermal runaway, validated per IEC 61000-4-5. |
| Breakdown Voltage | 6.4 V typical at 5 mA - Confirms robust overvoltage margin above 3.3 V rail while enabling early clamping onset. |
Pinout & Package
SOT23 plastic surface-mounted package (2.9 mm × 1.3 mm × 1.0 mm body, 1.9 mm lead pitch), rated for reflow and wave soldering per JEDEC J-STD-020 and J-STD-006.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | K1 | First cathode terminal; forms one bidirectional ESD path between Pin 1 and Pin 3. |
| 2 | K2 | Second cathode terminal; forms second independent bidirectional ESD path between Pin 2 and Pin 3. |
| 3 | CC | Common cathode node; serves as shared reference/return path for both protected lines; must connect to system ground. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-line bidirectional protection | Single SOT23 device protects two independent signal paths (e.g., D+ and D−) with symmetrical ±30 kV ESD immunity per line. |
| Ultra-low capacitance | 101 pF enables use on high-speed interfaces (USB 2.0, HDMI DDC, audio codecs) without signal rise-time degradation. |
| AEC-Q101 qualification | Validated for automotive applications including infotainment, telematics, and body control modules with extended temperature operation. |
| Low clamping voltage | 26 V at 15 A limits stress on downstream ICs (e.g., USB transceivers, SIM controllers) during surge events. |
| Negligible leakage | 90 nA at 3.3 V prevents battery drain in always-on portable devices such as smartphones and wearables. |
Applications
| USB 2.0 Interface Protection | SIM Card Slot Protection |
|---|---|
Use Scenario: Protecting D+ and D− lines of a smartphone USB port from repeated ESD events during cable insertion and handling. IC Role / Device Role / Timing Role: Bidirectional transient voltage suppressor placed directly at the connector, clamping ESD pulses before they reach the USB PHY IC. Use Value: 101 pF capacitance avoids signal integrity issues at 480 Mbps; 3.3 V VRWM matches USB I/O voltage range without affecting logic levels. |
Use Scenario: Shielding SIM card contacts (I/O, CLK, RST) from ESD during hot-swap insertion in mobile handsets and IoT modules. IC Role / Device Role / Timing Role: Dual-channel ESD clamp sharing common ground, minimizing PCB area versus discrete diodes. Use Value: 90 nA leakage preserves battery life in standby mode; ±30 kV rating exceeds IEC 61000-4-2 requirements for consumer handhelds. |
| Automotive Infotainment Audio Lines | Portable Media Player Headphone Outputs |
Use Scenario: Safeguarding analog audio differential pairs (e.g., LIN bus or speaker outputs) in car radio head units exposed to door-close ESD. IC Role / Device Role / Timing Role: Low-capacitance bidirectional suppressor mounted adjacent to connector, referenced to chassis ground via Pin 3. Use Value: AEC-Q101 qualification ensures reliability across –40 °C to +105 °C; 26 V clamping protects op-amps and DACs from latch-up. |
Use Scenario: Protecting left/right headphone output lines in MP3 players from user-hand ESD during jack insertion/removal. IC Role / Device Role / Timing Role: Dual-line ESD protector with common cathode tied to audio ground plane, minimizing return-path inductance. Use Value: 350 W peak power rating handles multiple ESD strikes without degradation; SOT23 footprint fits tight space behind 3.5 mm jack. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-line bidirectional ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NUP4202MR6T1G | Higher capacitance (130 pF), lower ESD rating (±15 kV), same SOT23-3 package and dual-cathode pinout. | Not AEC-Q101 qualified; suitable for consumer-grade non-automotive applications only. | Select when cost sensitivity outweighs automotive compliance and higher-speed signal integrity needs. |
| Vishay ESDE0402MUTAG | Lower clamping voltage (18 V at 12 A), smaller 0402 DFN package (no leads), but single-line configuration requires two devices for dual-line protection. | Requires additional PCB area and routing complexity; lacks integrated dual-line solution. | Choose for ultra-compact layouts where board space is more constrained than BOM count, and clamping voltage margin is critical. |
Compared with NUP4202MR6T1G and ESDE0402MUTAG, PESD3V3L2BT-Q uniquely delivers AEC-Q101 qualification, 30 kV ESD immunity, and true dual-line integration in SOT23-reducing component count, simplifying layout, and ensuring automotive-grade reliability without sacrificing signal fidelity.
Availability
PESD3V3L2BT-Q is available at Aetrix Electronics and suitable for USB 2.0 interface protection, SIM card slot hardening, and automotive infotainment audio line safeguarding requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for PESD3V3L2BT-Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors-including ESD protection, logic, discretes, and MOSFETs-with manufacturing rooted in process technology leadership and automotive-grade quality systems.
PESD3V3L2BT-Q belongs to Nexperia's Automotive-qualified ESD Protection Diode product line, engineered specifically for robust, low-capacitance transient suppression in safety-critical and high-reliability signal interfaces across automotive, mobile, and industrial end equipment.
FAQ
What is the maximum operating temperature for PESD3V3L2BT-Q?
The device supports an ambient operating temperature range of –65 °C to +150 °C, with a maximum junction temperature of 150 °C. This rating is validated per AEC-Q101 stress testing and enables deployment in under-hood automotive modules and thermally demanding portable electronics.
Can PESD3V3L2BT-Q protect unidirectional signal lines?
Yes-it functions bidirectionally on each protected line (Pin 1–Pin 3 and Pin 2–Pin 3), making it suitable for both AC-coupled and DC-biased signals that swing above and below ground. Its symmetric V-I curve ensures identical clamping behavior for positive and negative transients.
How does the common cathode (Pin 3) connection affect PCB layout?
Pin 3 must be connected directly to a low-inductance system ground plane with minimal trace length (<2 mm recommended). Sharing this node between both protection paths reduces loop area and improves high-frequency surge dissipation-critical for meeting IEC 61000-4-2 and -4-5 performance targets.
Is PESD3V3L2BT-Q compatible with lead-free reflow processes?
Yes-the SOT23 package is qualified for standard lead-free reflow profiles per JEDEC J-STD-020, with peak temperatures up to 260 °C. The recommended solder land pattern (0.6 mm pad width, 0.7 mm length) is defined in Figure 11 of the official datasheet.
PESD3V3L2BT-QR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- PESDxL2BT
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 2
- Voltage - Reverse Standoff (Typ):
- 3.3V (Max)
- Voltage - Breakdown (Min):
- 5.8V
- Voltage - Clamping (Max) @ Ipp:
- 26V
- Current - Peak Pulse (10/1000µs):
- 15A (8/20µs)
- Power - Peak Pulse:
- 350W
- Power Line Protection:
- No
- Applications:
- Telecom
- Capacitance @ Frequency:
- 101pF @ 1MHz
- Operating Temperature:
- -65°C ~ 150°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TO-236AB
PESD3V3L2BT-QR FAQ
1.How can I place an order for PESD3V3L2BT-QR through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD3V3L2BT-QR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD3V3L2BT-QR reliable?
The price and inventory of PESD3V3L2BT-QR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD3V3L2BT-QR is usually 5 days.
3.What payment methods are accepted for PESD3V3L2BT-QR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD3V3L2BT-QR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD3V3L2BT-QR?
PESD3V3L2BT-QR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD3V3L2BT-QR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD3V3L2BT-QR?
For technical support, including PESD3V3L2BT-QR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD3V3L2BT-QR requirements.
6.How does Aetrix verify that PESD3V3L2BT-QR is sourced from the original manufacturer or authorized distributors?
All PESD3V3L2BT-QR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD3V3L2BT-QR meets industry standards.
7.What is the process for return or replacement of PESD3V3L2BT-QR?
All PESD3V3L2BT-QR units undergo pre-shipment inspection (PSI). If there is an issue with PESD3V3L2BT-QR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD3V3L2BT-QR part is unused and in its original packaging.
Return procedure for PESD3V3L2BT-QR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD3V3L2BT-QR Tags

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