Nexperia USA Inc. PESD3V3V4UK,132
- Part No.:
- PESD3V3V4UK,132
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- 6-XFDFN
- Datasheet:
-
PESD3V3V4UK,132.pdf
- Description:
- TVS DIODE 3.3VWM 9.5VC 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:9,484
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Product details
Overview
PESD3V3V4UK,132 from NXP Semiconductors is a unidirectional quadruple ESD protection diode array in SOT891 package, designed to protect four low-voltage signal lines (VRWM = 3.3 V) against IEC 61000-4-2 level 4 ESD (±15 kV air/±8 kV contact) and IEC 61000-4-5 surge (IPP = 2.7 A). It delivers 9.5 V clamping voltage at 2.6 A, 13–17 pF capacitance at 1 MHz, and 0.13 μA leakage at 3.3 V, enabling high-speed USB 2.0, HDMI, and SIM card interface protection.
For engineers reviewing the PESD3V3V4UK,132 datasheet, PESD3V3V4UK,132 pinout, PESD3V3V4UK,132 application, or PESD3V3V4UK,132 equivalent, key selection criteria include standoff voltage matching (3.3 V), ultra-low capacitance for signal integrity, AEC-Q101 qualification for automotive use, and common-anode quad-diode topology for compact PCB layout.
Technical Context
This device implements a single common-anode configuration with four independent cathodes (pins 1, 3, 4, 6), enabling simultaneous protection of four unidirectional signal paths referenced to ground. Its unidirectional architecture ensures conduction only during positive transients relative to the anode (pin 2), eliminating reverse-bias leakage concerns on bidirectional lines.
Clamping performance is defined by a 9.5 V VCL at IPP = 2.6 A (8/20 μs), supported by a typical differential resistance of 5–16 Ω and breakdown voltage of 5.3–5.9 V. The 13–17 pF diode capacitance at 0 V bias enables <1% signal distortion in 480 Mbps USB 2.0 data lanes while maintaining ESD robustness.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage | 3.3 V - Ensures no conduction during normal 3.3 V logic operation; compatible with I/O rails of microcontrollers and USB PHYs. |
| Clamping Voltage | 9.5 V at 2.6 A - Limits transient voltage to safe levels for 3.3 V IC inputs, preventing latch-up or oxide damage. |
| Diode Capacitance | 13–17 pF at 1 MHz - Enables minimal signal rise-time degradation in high-speed interfaces like USB 2.0 and SDIO. |
| ESD Rating | ±15 kV air / ±8 kV contact per IEC 61000-4-2 level 4 - Meets industrial and automotive ESD immunity requirements. |
| Peak Pulse Power | 25 W per diode (8/20 μs) - Handles surge energy from lightning-induced transients in portable electronics ports. |
| Leakage Current | 0.13 μA max at VRWM = 3.3 V - Prevents measurable DC loading on battery-powered sensor or audio signal lines. |
| AEC-Q101 Qualified | Qualified for automotive applications - Validated for temperature cycling, HTRB, and ESD stress per discrete semiconductor standard. |
Pinout & Package
SOT891 package: ultra-thin 1.05 × 1.05 × 0.5 mm leadless plastic SMD with six terminals; optimized for high-density routing and automated reflow assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode (Diode 1) | Protected signal line 1 input; connects to I/O trace before connector or IC pin. |
| 2 | Common Anode | Shared anode tied to system ground plane; shortest possible trace length required for effective clamping. |
| 3 | Cathode (Diode 2) | Protected signal line 2 input; electrically isolated from other cathodes for independent line protection. |
| 4 | Cathode (Diode 3) | Protected signal line 3 input; supports multi-lane interfaces such as camera MIPI D-PHY clock/data pairs. |
| 5 | Not Connected | No internal connection; must be left floating or grounded per PCB layout best practices (no solder mask bridge). |
| 6 | Cathode (Diode 4) | Protected signal line 4 input; enables full protection of quad-line interfaces like SIM card CLK/DAT/IO/VCC. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low capacitance | 13–17 pF enables <1% signal attenuation in 480 Mbps USB 2.0 data lanes without equalization. |
| Common-anode quad topology | Single ground connection for four lines reduces PCB area by >40% vs. discrete diode solutions. |
| Low clamping voltage | 9.5 V clamping at 2.6 A ensures protected ICs remain within absolute maximum ratings during ESD events. |
| AEC-Q101 qualification | Validated for automotive under-hood and infotainment environments including thermal cycling and humidity testing. |
| Leadless SOT891 package | 0.5 mm profile supports ultra-thin mobile designs and eliminates lead-related solder joint reliability risks. |
Applications
| USB 2.0 Interface Protection | SIM Card Slot Protection |
|---|---|
|
Use Scenario: Protecting D+ and D− data lines, ID pin, and VBUS sense line in smartphone USB connectors against repeated ESD events. IC Role / Device Role / Timing Role: Unidirectional clamping diode array placed directly at USB micro-B receptacle, with common anode grounded to chassis. Use Value: Maintains 480 Mbps signaling integrity while suppressing ±15 kV ESD pulses to <10 V peak at IC pins. |
Use Scenario: Shielding SIM card interface signals (CLK, DAT, IO, VCC) from user-handling ESD during hot-swap insertion. IC Role / Device Role / Timing Role: Quad-cathode ESD suppressor mounted adjacent to SIM socket, each cathode routed to dedicated SIM signal trace. Use Value: Prevents SIM controller reset or corruption by limiting transient voltage to 9.5 V during ±8 kV contact discharge. |
| HDMI DDC Channel Protection | Automotive Infotainment Display Link |
|
Use Scenario: Safeguarding HDMI DDC lines (SCL/SDA) and HPD signal against ESD coupling from external cables and connectors. IC Role / Device Role / Timing Role: Low-capacitance ESD array placed at HDMI Type-A receptacle, with cathodes connected to DDC/HPD traces. Use Value: Preserves I²C timing margins (100 kHz/400 kHz) with <17 pF loading while meeting IEC 61000-4-2 level 4. |
Use Scenario: Protecting LVDS or FPD-Link II clock/data pairs between head unit and display in automotive dashboards. IC Role / Device Role / Timing Role: AEC-Q101-qualified ESD suppressor installed at display cable connector, common anode tied to vehicle chassis ground. Use Value: Ensures functional safety compliance by preventing transient-induced display blanking or pixel corruption during ESD exposure. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar unidirectional ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESDA6V1SC6 | Higher VRWM (6.1 V); higher capacitance (22 pF); same SOT891 package. | Targeted at 5 V systems; less suitable for 3.3 V high-speed interfaces due to increased signal loading. | Select only when protecting 5 V tolerant lines where 3.3 V standoff is insufficient. |
| TPD4E004DRYR | Lower VRWM (3.3 V); lower capacitance (0.6 pF typical); different 5-pin X2SON package. | Optimized for ultra-high-speed (>5 Gbps) interfaces but lacks AEC-Q101 qualification. | Prefer for consumer-grade USB 3.0/PCIe where automotive qualification is not required. |
Compared with ESDA6V1SC6 and TPD4E004DRYR, PESD3V3V4UK,132 uniquely balances 3.3 V compatibility, AEC-Q101 qualification, and 13–17 pF capacitance-making it optimal for automotive and industrial USB/SIM applications demanding both robustness and signal fidelity.
Availability
PESD3V3V4UK,132 is available at Aetrix Electronics and suitable for USB 2.0 interface protection, SIM card slot hardening, and automotive infotainment display links requiring stable component supply across production lifecycles.
Supply support for PESD3V3V4UK,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
This device belongs to the PESDxV4UK series of ultra-low-capacitance ESD protection arrays, engineered specifically for high-speed digital interface protection in space-constrained and mission-critical applications.
FAQ
What is the maximum operating temperature for PESD3V3V4UK,132?
The junction temperature limit is 150 °C, with ambient operating range from −55 °C to +150 °C. This rating is validated per AEC-Q101 stress tests, supporting use in under-hood automotive environments and industrial enclosures without derating.
Can PESD3V3V4UK,132 protect bidirectional signal lines?
No-it is unidirectional only, with conduction occurring when cathode voltage exceeds anode (ground) by ≥5.3 V. For bidirectional lines like USB D+/D−, external design must ensure signal polarity remains positive relative to ground, or a bidirectional array (e.g., PESD5V0X1BC) must be selected.
How does pin 5 (n.c.) affect PCB layout?
Pin 5 is internally unconnected and must remain electrically isolated-no solder mask bridge or copper pour should contact it. Leaving it floating avoids parasitic coupling; grounding it is permissible but provides no functional benefit and may increase thermal resistance slightly.
Is reflow soldering the only recommended assembly method?
Yes-NXP specifies reflow soldering only, with peak temperature ≤260 °C per JEDEC J-STD-020. Wave or hand soldering is not qualified and risks delamination or internal bond wire damage due to the ultra-thin SOT891 package construction.
PESD3V3V4UK,132 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- 6-XFDFN
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- 4
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 3.3V (Max)
- Voltage - Breakdown (Min):
- 5.3V
- Voltage - Clamping (Max) @ Ipp:
- 9.5V
- Current - Peak Pulse (10/1000µs):
- 2.7A (8/20µs)
- Power - Peak Pulse:
- 25W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- 13pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT891 (1x1)
PESD3V3V4UK,132 FAQ
1.How can I place an order for PESD3V3V4UK,132 through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD3V3V4UK,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD3V3V4UK,132 reliable?
The price and inventory of PESD3V3V4UK,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD3V3V4UK,132 is usually 5 days.
3.What payment methods are accepted for PESD3V3V4UK,132?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD3V3V4UK,132 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD3V3V4UK,132?
PESD3V3V4UK,132 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD3V3V4UK,132 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD3V3V4UK,132?
For technical support, including PESD3V3V4UK,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD3V3V4UK,132 requirements.
6.How does Aetrix verify that PESD3V3V4UK,132 is sourced from the original manufacturer or authorized distributors?
All PESD3V3V4UK,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD3V3V4UK,132 meets industry standards.
7.What is the process for return or replacement of PESD3V3V4UK,132?
All PESD3V3V4UK,132 units undergo pre-shipment inspection (PSI). If there is an issue with PESD3V3V4UK,132, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD3V3V4UK,132 part is unused and in its original packaging.
Return procedure for PESD3V3V4UK,132:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD3V3V4UK,132 Tags

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DESD3V3E1BL-7B
Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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ESD5Z5.0T1G
onsemi

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DESD5V0U1BB-7
Diodes Incorporated

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D12V0L1B2LP-7B
Diodes Incorporated

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Nexperia USA Inc.

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DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

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Diodes Incorporated
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