Nexperia USA Inc. PESD5V0F1BL/SGYL
- Part No.:
- PESD5V0F1BL/SGYL
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- SOD-882
- Datasheet:
-
PESD5V0F1BL/SGYL.pdf
- Description:
- TVS DIODE 5.5VWM 15VC DFN1006-2
- Quantity:
- Payment:

- Shipping:

Inventory:9,920
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Product details
Overview
PESD5V0F1BL from Nexperia is a femtofarad bidirectional ESD protection diode in a DFN1006-2 (SOD882) package, designed to protect single high-speed signal lines against ±10 kV IEC 61000-4-2 contact/air discharge. It delivers 0.4 pF typical capacitance, 30 V clamping voltage at ±8 kV, and <1 nA leakage at 5 V, enabling use in 1000 Mbit/s Ethernet and cellular antenna interfaces.
For engineers reviewing the PESD5V0F1BL datasheet, PESD5V0F1BL pinout, PESD5V0F1BL application, or PESD5V0F1BL equivalent, key selection criteria include ultra-low capacitance for signal integrity, bidirectional clamping symmetry, SOD882 footprint compatibility, and IEC 61000-4-2 Level 4 compliance for portable electronics and RF front-end protection.
Technical Context
This device implements a dual-cathode bidirectional TVS structure with symmetrical breakdown at ±6–10 V and clamping below 15 V under 2.5 A 8/20 µs surge. Its 30 Ω differential resistance and 0.4 pF capacitance at 1 MHz ensure minimal insertion loss on GHz-range signals.
The DFN1006-2 package places both cathodes on adjacent terminals (Pin 1 = K1, Pin 2 = K2), enabling direct series connection across a signal line and ground-no anode routing required. Thermal limits restrict junction temperature to 125 °C under transient conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Capacitance | 0.4 pF typical at 1 MHz, 0 V bias - preserves signal rise time & impedance matching on >500 MHz lines |
| Clamping Voltage | 15 V max at 2.5 A IPPM - limits downstream IC stress during 8/20 µs surges |
| ESD Rating | ±10 kV per IEC 61000-4-2 contact/air - meets industrial and consumer immunity requirements |
| Reverse Standoff | 5.5 V max VRWM - supports 5 V logic and USB 2.0 signal rails without leakage-induced errors |
| Leakage Current | <1 nA at 5 V - avoids DC loading on high-impedance sensor or RF bias networks |
| Breakdown Voltage | 6–10 V symmetric VBR - ensures balanced clamping for AC-coupled or bidirectional data paths |
| Package | DFN1006-2 (SOD882), 1.0 × 0.6 × 0.48 mm - enables placement within 2 mm of I/O connectors |
Pinout & Package
DFN1006-2 (SOD882) is a leadless, ultra-small surface-mount package with 2 terminals, 0.65 mm pitch, and exposed copper pad for thermal conduction. Dimensions: 1.0 mm × 0.6 mm × 0.48 mm body height.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode (Diode 1) | Connects to protected signal line; forms one half of symmetrical clamp path to ground |
| 2 | Cathode (Diode 2) | Connects to system ground; completes bidirectional ESD current path during positive/negative transients |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional clamping symmetry | Matched ±6–10 V breakdown and ≤15 V clamping ensures equal protection for AC-coupled or full-duplex lines |
| Femtofarad-level capacitance | 0.4 pF typical minimizes signal distortion on USB 2.0, HDMI, MIPI, and GPS antenna feeds |
| Low clamping voltage | 30 V at ±8 kV (30 ns) and 15 V at 2.5 A 8/20 µs prevents latch-up or gate oxide damage in 3.3 V/5 V interface ICs |
| Ultra-small footprint | DFN1006-2 allows placement directly at board edge connectors-reducing PCB trace inductance by >40% vs. SOT23 |
Applications
| 1000 Mbit/s Ethernet Interface | Cellular Antenna Feed Line |
|---|---|
Use Scenario: Protecting RJ45 magnetics secondary side or PHY differential pairs in enterprise switches. IC Role / Device Role / Timing Role: Bidirectional transient suppressor placed between MDI pair and PHY IC input pins. Use Value: 0.4 pF capacitance avoids skew and return loss degradation at 125 MHz symbol rate; ±10 kV rating covers EN 61000-4-2 compliance testing. | Use Scenario: Shielding GPS/GNSS or LTE antenna feed from ESD events during SIM card insertion or connector mating. IC Role / Device Role / Timing Role: Low-capacitance shunt protector between antenna trace and RF ground plane. Use Value: Sub-1 nA leakage prevents DC bias shift in LNA input matching networks; 15 V clamping protects sensitive GaAs FEM front ends. |
| SIM Card Slot Protection | USB 2.0 Data Lines |
Use Scenario: Guarding 1.8 V/3.0 V SIM I/O pins (CLK, I/O, RST) against user-handling ESD in smartphones and wearables. IC Role / Device Role / Timing Role: Point-of-entry ESD clamp bridging SIM signal line to ground before level-shifter or controller. Use Value: 5.5 V VRWM accommodates 3.3 V tolerant SIM controllers; 0.4 pF avoids timing jitter on 10 MHz CLK lines. | Use Scenario: Safeguarding D+ and D− lines in portable accessories (keyboards, hubs) where space limits discrete TVS options. IC Role / Device Role / Timing Role: Series-connected bidirectional clamp on each data line referenced to ground. Use Value: Symmetric clamping maintains differential signal integrity; 30 Ω dynamic resistance limits overshoot during 480 Mbps data bursts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bidirectional ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor ESDE0402-050E | 0.35 pF typical capacitance; 12 V clamping at 1 A; same DFN1006-2 package | Lower clamping suits 3.3 V-only systems but lacks 10 kV ESD rating | Select when tighter clamping is prioritized over maximum ESD immunity |
| Vishay VEML5090 | 0.5 pF typical; ±12 kV ESD rating; 17 V clamping at 2.5 A; DFN1006-2 | Higher ESD margin but increased capacitance degrades >800 MHz signal fidelity | Prefer for ruggedized industrial ports where RF bandwidth is secondary to surge robustness |
Compared with ESDE0402-050E and VEML5090, PESD5V0F1BL uniquely balances 0.4 pF capacitance, ±10 kV rating, and 15 V clamping-making it optimal for space-constrained, high-frequency applications like smartphone antenna and gigabit Ethernet PHY protection.
Availability
PESD5V0F1BL is available at Aetrix Electronics and suitable for 1000 Mbit/s Ethernet interfaces, cellular antenna feed lines, and SIM card slot protection requiring stable component supply across high-mix production runs.
Supply support for PESD5V0F1BL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors-including ESD protection, logic, MOSFETs, and bipolar transistors.
PESD5V0F1BL belongs to Nexperia's FemtoFarad ESD protection product line, engineered specifically for preserving signal integrity in high-speed digital and RF interfaces while meeting stringent IEC 61000-4-2 immunity requirements.
FAQ
What is the maximum operating temperature for PESD5V0F1BL?
The PESD5V0F1BL has a maximum junction temperature of 125 °C and operates across an ambient range of −40 °C to +125 °C. Its thermal resistance (Rth(j-a)) is optimized for low-power dissipation in DFN1006-2, supporting continuous operation in handheld and automotive cabin environments without derating up to 85 °C ambient.
Can PESD5V0F1BL be used for unidirectional signal lines?
No-PESD5V0F1BL is strictly bidirectional due to its dual-cathode symmetric structure. For unidirectional protection (e.g., power rail or single-ended I/O), Nexperia recommends PESD5V0U1BB or similar anode-grounded devices. Using PESD5V0F1BL on unidirectional lines risks improper clamping and elevated leakage above VRWM.
Does PESD5V0F1BL require external biasing or control signals?
No. PESD5V0F1BL is a passive, voltage-triggered device with no bias, enable, or control pins. It remains in high-impedance standby (<1 nA leakage at 5 V) until transient voltage exceeds ±6 V, then conducts within nanoseconds to clamp energy to ground. No layout or design overhead beyond proper PCB placement is required.
How does PESD5V0F1BL compare to ceramic ESD suppressors in RF applications?
Ceramic suppressors exhibit higher capacitance (>1 pF), nonlinear voltage dependence, and micro-discharge noise-degrading GPS/GNSS SNR and LTE ACLR. PESD5V0F1BL's 0.4 pF silicon diode structure provides flat, frequency-stable capacitance up to 6 GHz and no RF noise generation, making it preferred for antenna feed and RF front-end protection where signal purity is critical.
PESD5V0F1BL/SGYL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- SOD-882
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 5.5V (Max)
- Voltage - Breakdown (Min):
- 6V
- Voltage - Clamping (Max) @ Ipp:
- 15V
- Current - Peak Pulse (10/1000µs):
- 2.5A (8/20µs)
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 0.4pF @ 1MHz
- Operating Temperature:
- 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DFN1006-2
PESD5V0F1BL/SGYL FAQ
1.How can I place an order for PESD5V0F1BL/SGYL through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD5V0F1BL/SGYL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD5V0F1BL/SGYL reliable?
The price and inventory of PESD5V0F1BL/SGYL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD5V0F1BL/SGYL is usually 5 days.
3.What payment methods are accepted for PESD5V0F1BL/SGYL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD5V0F1BL/SGYL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD5V0F1BL/SGYL?
PESD5V0F1BL/SGYL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD5V0F1BL/SGYL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD5V0F1BL/SGYL?
For technical support, including PESD5V0F1BL/SGYL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD5V0F1BL/SGYL requirements.
6.How does Aetrix verify that PESD5V0F1BL/SGYL is sourced from the original manufacturer or authorized distributors?
All PESD5V0F1BL/SGYL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD5V0F1BL/SGYL meets industry standards.
7.What is the process for return or replacement of PESD5V0F1BL/SGYL?
All PESD5V0F1BL/SGYL units undergo pre-shipment inspection (PSI). If there is an issue with PESD5V0F1BL/SGYL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD5V0F1BL/SGYL part is unused and in its original packaging.
Return procedure for PESD5V0F1BL/SGYL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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