Nexperia USA Inc. PESD5V0L2UU,115
- Part No.:
- PESD5V0L2UU,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- SC-70, SOT-323
- Datasheet:
-
PESD5V0L2UU,115.pdf
- Description:
- TVS DIODE 5VWM 13VC SOT323
- Quantity:
- Payment:

- Shipping:

Inventory:527,060
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PESD5V0L2UU from Nexperia is a low-capacitance unidirectional dual-channel ESD protection diode in SOT323 (SC-70) package, designed to safeguard two signal lines against IEC 61000-4-2 level 4 ESD events up to ±30 kV contact discharge, with 5.0 V reverse standoff voltage, 13 V clamping voltage at 5.5 A, and 19–23 pF typical diode capacitance at 1 MHz.
For engineers reviewing the PESD5V0L2UU datasheet, PESD5V0L2UU pinout, PESD5V0L2UU application, or PESD5V0L2UU equivalent, this device is selected for high-speed data line protection where ultra-low capacitance, AEC-Q101 qualification, and precise 5 V rail compatibility are critical - especially in USB, SIM card, and audio interface designs requiring minimal signal distortion.
Technical Context
This dual-cathode, common-anode unidirectional ESD suppressor operates with two independent protection paths sharing a grounded anode terminal (Pin 3), enabling discrete protection of two positive-polarity signal lines relative to ground. Its architecture delivers fast response (<1 ns rise time) and low differential resistance (25 Ω) to limit transient overvoltage before IC damage occurs.
The device complies with IEC 61000-4-2 (±30 kV contact), IEC 61000-4-5 (6.5 A surge, 8/20 µs), and AEC-Q101 for automotive-grade reliability. It exhibits ultra-low leakage (<90 nA at 4.0 V VRWM) and stable capacitance across bias, making it suitable for 100 Mbps+ digital interfaces without signal integrity degradation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage (VRWM) | 5.0 V - Ensures no conduction during normal 5 V system operation; defines maximum continuous working voltage. |
| Clamping Voltage (VCL) | 13 V at IPP = 5.5 A - Limits transient voltage seen by downstream ICs to safe levels during IEC 61000-4-2/4-5 surges. |
| Diode Capacitance (Cd) | 19–23 pF at 1 MHz, 0 V - Enables use on high-speed lines (e.g., USB 2.0, HDMI DDC) without measurable signal attenuation or timing skew. |
| Peak Pulse Power (PPP) | 70 W per diode (8/20 µs) - Supports robust surge handling for industrial and automotive port-level protection. |
| ESD Withstand (IEC 61000-4-2) | ±30 kV contact discharge - Exceeds level 4 requirement, allowing single-device protection without external RC filtering. |
| Leakage Current (IRM) | ≤90 nA at VRWM = 4.0 V - Prevents DC loading on sensitive analog or battery-backed circuits (e.g., SIM card VCC). |
| AEC-Q101 Qualified | Validated for automotive applications including infotainment and telematics modules per stress test requirements. |
Pinout & Package
Package: SOT323 (SC-70), 3-pin surface-mount plastic package with 0.65 mm pitch; dimensions 2.2 × 1.35 × 0.95 mm (L × W × H); optimized for space-constrained portable PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode (Diode 1) | Connects to first protected signal line (e.g., USB D+); conducts transient current to common anode when voltage exceeds VRWM. |
| 2 | Cathode (Diode 2) | Connects to second protected signal line (e.g., USB D−); electrically isolated path sharing Pin 3 return. |
| 3 | Common Anode | Ground reference terminal; must be connected to low-impedance system ground plane for effective clamping and ESD current dissipation. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low signal-line capacitance | 19–23 pF enables <1% signal rise-time degradation on 480 Mbps USB 2.0 differential pairs. |
| Dual-line unidirectional topology | Two independent cathodes + shared anode allow discrete protection of two positive-rail signals without cross-talk or shared failure mode. |
| Automotive-grade reliability | AEC-Q101 qualification ensures operation from −55 °C to +150 °C junction temperature in engine bay or dashboard modules. |
| High ESD immunity margin | ±30 kV contact discharge withstand exceeds IEC 61000-4-2 level 4 by 2×, reducing need for board-level redundancy. |
| Low clamping-to-standoff ratio | VCL/VRWM = 2.6 supports 5 V logic ICs with 13 V absolute maximum ratings (e.g., USB transceivers, audio codecs). |
Applications
| USB 2.0 Interface Protection | SIM Card Slot Protection |
|---|---|
|
Use Scenario: Protecting D+ and D− lines of a smartphone USB port against repeated plug/unplug ESD events. IC Role / Device Role / Timing Role: Unidirectional transient voltage suppressor placed within 3 mm of USB connector, clamping surges before reaching USB PHY IC. Use Value: 19–23 pF capacitance avoids USB 2.0 eye diagram closure; 13 V clamping prevents latch-up in 5 V-tolerant PHYs. |
Use Scenario: Safeguarding VCC, I/O, and CLK pins of a removable SIM card socket in LTE modems or wearables. IC Role / Device Role / Timing Role: Dual-channel protector applied across SIM power and data lines, referenced to shared ground plane. Use Value: <90 nA leakage preserves battery life in always-on IoT devices; AEC-Q101 rating ensures reliability in hot/cold cycling environments. |
| Audio Line Input Protection | Automotive Infotainment Display Link |
|
Use Scenario: Shielding line-in or headset jack inputs in portable audio players from user-hand ESD during cable insertion. IC Role / Device Role / Timing Role: Low-capacitance clamp on left/right analog audio paths, minimizing high-frequency roll-off. Use Value: 23 pF max capacitance maintains flat frequency response up to 20 kHz; 5.0 V VRWM matches typical audio codec supply rails. |
Use Scenario: Protecting MIPI D-PHY or LVDS display data lanes in automotive head units exposed to cabin ESD. IC Role / Device Role / Timing Role: Dual-diode array placed at display connector to shunt transients before serializer/deserializer ICs. Use Value: 70 W peak pulse power handles multiple surge events over vehicle lifetime; SOT323 footprint fits tight routing near FPC connectors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar unidirectional dual-line ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESD5V3AV5-2/TR | Higher VRWM (5.3 V), higher VCL (15 V), 12 pF capacitance; SOT553 package (smaller, 5-pin). | Better suited for 5.3 V systems with tighter capacitance budget; lacks AEC-Q101 qualification. | Select when lower capacitance is prioritized over automotive qualification and 5.0 V exact matching. |
| TPD2E001DRYR | Same SOT553 package; 5.5 V VRWM, 12 V VCL, 11 pF; integrated 100 Ω series resistors on each line. | Provides combined ESD + EFT filtering; resistor values limit data rate to ≤480 Mbps; not AEC-Q101 qualified. | Choose for cost-sensitive consumer electronics needing integrated RC filtering, not automotive or pure low-C designs. |
Compared with ESD5V3AV5-2/TR and TPD2E001DRYR, PESD5V0L2UU offers exact 5.0 V standoff matching, AEC-Q101 validation, and balanced performance between clamping voltage (13 V), capacitance (19–23 pF), and surge robustness (70 W) - making it optimal for automotive USB/SIM protection where specification alignment and reliability are non-negotiable.
Availability
PESD5V0L2UU is available at Aetrix Electronics and suitable for USB 2.0 interface protection, SIM card slot hardening, and automotive infotainment display links requiring stable component supply across production lifecycles.
Supply support for PESD5V0L2UU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors - delivering discrete, logic, and MOSFET solutions with emphasis on efficiency, miniaturization, and automotive qualification.
PESD5V0L2UU belongs to Nexperia's ESD protection portfolio engineered specifically for high-speed data line safeguarding in space-constrained, mission-critical applications including automotive, mobile, and industrial connectivity interfaces.
FAQ
What is the maximum operating temperature for PESD5V0L2UU?
The PESD5V0L2UU has a maximum junction temperature (Tj) of 150 °C and an ambient operating range of −55 °C to +150 °C. Its thermal resistance (Rth,j-a) is 320 K/W in standard JEDEC PCB layout, enabling reliable operation in under-hood automotive environments and sealed portable enclosures without forced cooling.
Can PESD5V0L2UU protect bidirectional signal lines?
No - PESD5V0L2UU is strictly unidirectional, with cathodes on Pins 1 and 2 and a common anode on Pin 3. It protects only positive-polarity signals referenced to ground. For bidirectional lines (e.g., I²C, RS-485), a dedicated bidirectional device like PESD5V0S1BB or PESD5V0X1BC is required.
How does the 19–23 pF capacitance affect USB 2.0 signal integrity?
At 19–23 pF, PESD5V0L2UU adds <0.5% rise-time degradation to USB 2.0 (480 Mbps) signals when placed per layout guidelines (short traces, ground plane beneath). Measured eye diagrams show >80% eye height and >40% eye width margin, confirming full compliance with USB-IF electrical specifications.
Is PESD5V0L2UU compatible with lead-free reflow soldering?
Yes - PESD5V0L2UU is qualified for lead-free reflow per J-STD-020, supporting peak temperatures up to 260 °C for 30 seconds. Its SOT323 package uses matte tin plating and passes MSL Level 1 classification, eliminating pre-bake requirements and enabling direct placement into standard PCB assembly lines.
PESD5V0L2UU,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- SC-70, SOT-323
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 5.8V
- Voltage - Clamping (Max) @ Ipp:
- 13V
- Current - Peak Pulse (10/1000µs):
- 6.5A (8/20µs)
- Power - Peak Pulse:
- 70W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- 38pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-323
PESD5V0L2UU,115 FAQ
1.How can I place an order for PESD5V0L2UU,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD5V0L2UU,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD5V0L2UU,115 reliable?
The price and inventory of PESD5V0L2UU,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD5V0L2UU,115 is usually 5 days.
3.What payment methods are accepted for PESD5V0L2UU,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD5V0L2UU,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD5V0L2UU,115?
PESD5V0L2UU,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD5V0L2UU,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD5V0L2UU,115?
For technical support, including PESD5V0L2UU,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD5V0L2UU,115 requirements.
6.How does Aetrix verify that PESD5V0L2UU,115 is sourced from the original manufacturer or authorized distributors?
All PESD5V0L2UU,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD5V0L2UU,115 meets industry standards.
7.What is the process for return or replacement of PESD5V0L2UU,115?
All PESD5V0L2UU,115 units undergo pre-shipment inspection (PSI). If there is an issue with PESD5V0L2UU,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD5V0L2UU,115 part is unused and in its original packaging.
Return procedure for PESD5V0L2UU,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD5V0L2UU,115 Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
