Nexperia USA Inc. PESD5V0V1BL-QZ
- Part No.:
- PESD5V0V1BL-QZ
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- SOD-882
- Datasheet:
-
PESD5V0V1BL-QZ.pdf
- Description:
- PESD5V0V1BL-Q/SOD882/DFN1006-2
- Quantity:
- Payment:

- Shipping:

Inventory:7,960
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PESD5V0V1BL-Q from Nexperia is a bidirectional ESD protection diode in DFN1006-2 (SOD882) package, designed to safeguard one high-speed signal line against IEC 61000-4-2 ESD (±30 kV contact) and IEC 61000-4-5 surge (4.8 A, 8/20 µs). Key parameters include 5 V reverse standoff voltage, 11 pF typical capacitance, 12.5 V clamping voltage at 4.8 A, and 1 nA leakage at 5 V - enabling use in 10/100 Mbit/s Ethernet and SIM card interfaces.
For engineers reviewing the PESD5V0V1BL-Q datasheet, PESD5V0V1BL-Q pinout, PESD5V0V1BL-Q application, or PESD5V0V1BL-Q equivalent, this page delivers verified electrical specs, automotive-qualified packaging details, real-world clamping behavior under transient stress, and layout-critical placement guidance for optimal ESD suppression on high-frequency lines.
Technical Context
This dual-cathode bidirectional TVS diode uses two anti-series silicon junctions to provide symmetrical clamping for ± polarity transients without DC bias dependency. Its ultra-low 11 pF capacitance ensures minimal signal integrity impact on data lines up to 100 Mbps.
The device operates within a -55 °C to +150 °C ambient range, supports AEC-Q101 qualification, and achieves 45 W peak pulse power handling with dynamic resistance of 0.2 Ω - critical for fast energy dissipation during sub-nanosecond ESD events per IEC 61000-4-2.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage | 5 V - defines maximum continuous operating voltage before leakage rises; sets safe margin below 5 V logic rails. |
| Diode Capacitance | 11 pF (typ.) at 1 MHz, 0 V - enables low-distortion signal transmission on 10/100 Mbit/s Ethernet and USB 2.0 lines. |
| Clamping Voltage | 12.5 V at 4.8 A, 8/20 µs - limits transient overvoltage to protect downstream ICs with 12 V absolute max ratings. |
| ESD Withstand | ±30 kV contact per IEC 61000-4-2 - exceeds Level 4 immunity requirements for handheld and automotive infotainment ports. |
| Peak Pulse Current | 4.8 A per IEC 61000-4-5 - handles lightning-induced surges on communication interfaces without thermal runaway. |
| Leakage Current | 1 nA at 5 V - prevents measurable loading on battery-powered sensor or SIM card detection circuits. |
| Breakdown Voltage | 6.8 V (typ.) at 5 mA - ensures reliable turn-on before protected ICs exceed safe input thresholds. |
Pinout & Package
DFN1006-2 (SOD882) ultra-small leadless plastic package: 1.0 mm × 0.6 mm × 0.48 mm body, 0.65 mm pitch, 2-terminal configuration with exposed cathode marking bar.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (K1) | Cathode of first diode | Connects to protected line; forms one half of anti-series pair for bidirectional conduction. |
| 2 (K2) | Cathode of second diode | Connects to ground; completes symmetrical clamping path for both positive and negative transients. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional clamping | Enables single-device protection of AC-coupled or dual-polarity lines like USB D+/D− or RS-485 without polarity constraints. |
| 11 pF capacitance | Preserves signal rise/fall times on 100 Mbps interfaces - avoids intersymbol interference in Ethernet PHY front-ends. |
| AEC-Q101 qualified | Validated for automotive cabin modules, telematics units, and infotainment displays requiring extended temperature and reliability compliance. |
| 12.5 V clamping at 4.8 A | Keeps transient voltage below 13 V during worst-case surge, protecting 12 V-tolerant microcontrollers and transceivers. |
| 1 nA leakage at 5 V | Eliminates standby current errors in precision SIM card voltage detection or low-power sensor bias networks. |
Applications
| 10/100 Mbit/s Ethernet | SIM Card Interface |
|---|---|
|
Use Scenario: Protection of MDI-X differential pairs in industrial Ethernet switches and automotive gateway ECUs. IC Role / Device Role / Timing Role: Bidirectional transient suppressor placed directly at RJ45 connector, clamping ESD before magnetics and PHY IC. Use Value: 11 pF capacitance avoids skew between D+ and D− lines; 12.5 V clamping prevents PHY latch-up during ±8 kV contact discharge. |
Use Scenario: ESD safeguard for 3 V SIM card hot-swap slots in cellular handsets and telematics control units. IC Role / Device Role / Timing Role: Line protector between SIM VCC/I/O pins and baseband processor, mounted adjacent to card connector. Use Value: 1 nA leakage ensures accurate SIM presence detection; ±30 kV rating covers repeated insertion/removal events. |
| Automotive Infotainment Display | Audio Line Input/Output |
|
Use Scenario: Transient protection for LVDS or FPD-Link video data lanes connecting head unit to TFT display. IC Role / Device Role / Timing Role: High-speed ESD clamp on each differential video pair, placed within 2 mm of display connector. Use Value: AEC-Q101 qualification guarantees operation at 105 °C ambient; 0.2 Ω dynamic resistance minimizes clamping delay jitter. |
Use Scenario: Protection of analog audio inputs (e.g., microphone bias, line-in) in portable speakers and automotive audio amplifiers. IC Role / Device Role / Timing Role: Low-capacitance shunt device across unbalanced audio traces, grounded via shortest possible path. Use Value: 5 V standoff matches 3.3–5 V audio codec rails; 11 pF avoids high-frequency roll-off above 20 kHz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bidirectional ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NUP4105MR6T1G | Higher capacitance (30 pF), lower clamping (9.5 V), same 5 V standoff and AEC-Q101 rating. | Better for lower-speed analog lines where clamping voltage is critical; unsuitable for >50 Mbps digital interfaces. | Select when clamping voltage priority outweighs speed; avoid for Ethernet or USB due to excessive capacitance. |
| Vishay ESDBL5V0D1W | Lower capacitance (7 pF), higher standoff (5.5 V), no AEC-Q101 qualification, 15 kV ESD rating. | Suitable for consumer portable electronics but not automotive-grade designs requiring extended temperature validation. | Choose for cost-sensitive non-automotive applications needing lowest possible capacitance; verify thermal derating for 150 °C operation. |
Compared with NUP4105MR6T1G and ESDBL5V0D1W, PESD5V0V1BL-Q uniquely balances 11 pF capacitance, 12.5 V clamping, and AEC-Q101 qualification - making it the only option validated for automotive 100 Mbps Ethernet and SIM card interfaces requiring simultaneous low-C, low-VCL, and high-reliability certification.
Availability
PESD5V0V1BL-Q is available at Aetrix Electronics and suitable for 10/100 Mbit/s Ethernet, automotive infotainment displays, and SIM card interfaces requiring stable component supply across production lifecycles.
Supply support for PESD5V0V1BL-Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in ESD protection, MOSFETs, and bipolar transistors.
This device belongs to Nexperia's Automotive-Grade ESD Protection portfolio, engineered specifically for robust transient suppression in automotive infotainment, telematics, and ADAS subsystems operating under harsh thermal and EMC conditions.
FAQ
What is the maximum recommended PCB trace length between PESD5V0V1BL-Q and the protected connector?
Per Nexperia application guidance, the trace from the device to the connector must be ≤2 mm to minimize inductance and ensure effective clamping. Longer paths increase voltage overshoot during ESD events due to L·di/dt effects - especially critical for 30 kV contact discharges with sub-nanosecond rise times.
Does PESD5V0V1BL-Q require external series impedance for optimal ESD performance?
No external series resistor is required. The device's 0.2 Ω dynamic resistance and 11 pF capacitance enable direct shunt placement. Adding series impedance would degrade clamping speed and increase voltage overshoot - contrary to IEC 61000-4-2 test setup requirements which specify zero series resistance.
Can PESD5V0V1BL-Q protect both differential and single-ended signals?
Yes - its bidirectional architecture protects any line referenced to ground, including single-ended I/O (e.g., SIM I/O) and differential pairs (e.g., Ethernet MDI) when applied per pair. For differential signals, one device per line is used, with K1 on the signal and K2 grounded.
How does junction temperature affect clamping voltage performance?
Clamping voltage increases by ~0.1 V/°C above 25 °C ambient, per Nexperia characterization. At 125 °C junction temperature, VCL rises to ~13.5 V - still within safe margins for 13.2 V-rated PHY ICs, but requires thermal design verification in sealed enclosures.
PESD5V0V1BL-QZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- SOD-882
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 5.8V
- Voltage - Clamping (Max) @ Ipp:
- 12.5V
- Current - Peak Pulse (10/1000µs):
- 4.8A (8/20µs)
- Power - Peak Pulse:
- 45W
- Power Line Protection:
- No
- Applications:
- Ethernet, Telecom
- Capacitance @ Frequency:
- 11pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DFN1006-2
PESD5V0V1BL-QZ FAQ
1.How can I place an order for PESD5V0V1BL-QZ through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD5V0V1BL-QZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD5V0V1BL-QZ reliable?
The price and inventory of PESD5V0V1BL-QZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD5V0V1BL-QZ is usually 5 days.
3.What payment methods are accepted for PESD5V0V1BL-QZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD5V0V1BL-QZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD5V0V1BL-QZ?
PESD5V0V1BL-QZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD5V0V1BL-QZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD5V0V1BL-QZ?
For technical support, including PESD5V0V1BL-QZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD5V0V1BL-QZ requirements.
6.How does Aetrix verify that PESD5V0V1BL-QZ is sourced from the original manufacturer or authorized distributors?
All PESD5V0V1BL-QZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD5V0V1BL-QZ meets industry standards.
7.What is the process for return or replacement of PESD5V0V1BL-QZ?
All PESD5V0V1BL-QZ units undergo pre-shipment inspection (PSI). If there is an issue with PESD5V0V1BL-QZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD5V0V1BL-QZ part is unused and in its original packaging.
Return procedure for PESD5V0V1BL-QZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD5V0V1BL-QZ Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

