NXP Semiconductors PESD5V0V4UG,115
- Part No.:
- PESD5V0V4UG,115
- Manufacturer:
- NXP Semiconductors
- Category:
- TVS Diodes
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
PESD5V0V4UG,115.pdf
- Description:
- TVS DIODE 5VWM 13VC SOT353
- Quantity:
- Payment:

- Shipping:

Inventory:9,687
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Product details
Overview
PESD5V0V4UG,115 from Nexperia is a unidirectional quadruple ESD protection diode array in SOT353 (SC-88A) package, designed to safeguard four signal lines against electrostatic discharge up to 12 kV (IEC 61000-4-2 Level 4) and surge transients (1.5 A, 8/20 µs). It features 5.0 V reverse standoff voltage, 12–15 pF capacitance at 0 V bias, and 11 V clamping voltage at 1 A, making it suitable for high-speed USB, HDMI, and SIM card interface protection.
For engineers reviewing the PESD5V0V4UG,115 datasheet, PESD5V0V4UG,115 pinout, PESD5V0V4UG,115 application, or PESD5V0V4UG,115 equivalent, key selection criteria include low capacitance for signal integrity, unidirectional topology for ground-referenced lines, IEC 61000-4-2/4-5 compliance, and SC-88A footprint compatibility with space-constrained portable electronics layouts.
Technical Context
This device implements four independent unidirectional ESD protection diodes sharing a common anode terminal (Pin 2), enabling compact protection of four separate signal paths referenced to system ground. Its architecture supports fast transient suppression with sub-1 ns rise time response and low differential resistance (100 Ω typical).
Designed for ground-referenced signal lines, the PESD5V0V4UG,115 operates with reverse standoff voltage of 5.0 V and clamps transients to ≤11 V at 1 A peak pulse current, ensuring safe operation for 5 V logic interfaces. It meets IEC 61000-4-2 Level 4 (±12 kV contact) and IEC 61000-4-5 (1.5 A surge) standards without requiring external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage | 5.0 V - Maximum continuous operating voltage before conduction; ensures no leakage during normal 5 V signal operation. |
| Diode Capacitance | 12–15 pF @ 1 MHz, 0 V - Enables use on high-speed data lines (e.g., USB 2.0, audio codecs) without signal distortion. |
| Clamping Voltage | 11 V @ 1 A - Limits transient voltage seen by downstream ICs to safe levels during ESD events. |
| ESD Withstand | ±12 kV IEC 61000-4-2 contact - Certified protection level for handheld device interfaces subject to user-handling ESD. |
| Peak Pulse Power | 16 W @ 8/20 µs - Sustains high-energy surges (e.g., cable discharge events) without degradation. |
| Leakage Current | ≤25 nA @ 5.0 V - Minimizes power loss and avoids interference in battery-powered sensor or RF front-end circuits. |
| Breakdown Voltage | 6.4–7.2 V @ 1 mA - Provides margin above 5.0 V VRWM to prevent false triggering while maintaining robustness. |
Pinout & Package
SOT353 (SC-88A) package: plastic surface-mounted, 5-lead, body size 2.2 × 1.35 × 0.95 mm, lead pitch 0.65 mm. Leadless ultra-small footprint optimized for dense PCB layouts in portable electronics.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode (diode 1) | Signal line 1 input; connects to protected trace; conducts ESD current to common anode when overvoltage occurs. |
| 2 | Common anode | Shared ground reference node; must be connected directly to low-impedance system ground plane. |
| 3 | Cathode (diode 2) | Signal line 2 input; electrically isolated from other cathodes; enables independent protection per line. |
| 4 | Cathode (diode 3) | Signal line 3 input; maintains <15 pF loading for high-frequency analog or digital signals. |
| 5 | Cathode (diode 4) | Signal line 4 input; identical electrical characteristics to Pins 1, 3, and 4 for consistent multi-line protection. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low leakage | 25 nA max at 5.0 V - Preserves battery life and avoids DC offset in precision analog front-ends. |
| Low clamping voltage | 11 V at 1 A - Protects 5 V logic ICs (e.g., microcontrollers, transceivers) without exceeding absolute maximum ratings. |
| Very low capacitance | 12–15 pF at 0 V - Supports >100 MHz signal bandwidths; suitable for USB 2.0, audio DACs, and touch controller interfaces. |
| IEC 61000-4-2/4-5 compliant | 12 kV contact ESD + 1.5 A surge - Meets international immunity requirements for CE/FCC-marked consumer devices. |
| Unidirectional quad configuration | Single common anode (Pin 2) - Simplifies PCB routing and grounding vs. bidirectional arrays; ideal for ground-referenced signal lines. |
Applications
| USB 2.0 Interface Protection | HDMI Signal Line Protection |
|---|---|
|
Use Scenario: Protecting D+ and D− data lines, VBUS sense, and ID pin in smartphone USB OTG circuits against user-handled ESD. IC Role / Device Role / Timing Role: Unidirectional ESD clamp placed between connector and USB transceiver; responds within nanoseconds to divert transients to ground. Use Value: Prevents latch-up or damage to USB PHY ICs while maintaining <15 pF loading to preserve signal integrity at 480 Mbps. |
Use Scenario: Shielding TMDS clock and data channels in portable media players from ESD during HDMI cable insertion/removal. IC Role / Device Role / Timing Role: Quad diode array assigned to three TMDS data lanes and one clock lane; common anode tied to clean ground plane. Use Value: Enables full HDMI 1.4 compliance with ≤12 pF per channel, avoiding eye diagram degradation or bit error rate increase. |
| SIM Card Interface Protection | Audio Codec Line Protection |
|
Use Scenario: Safeguarding VCC, I/O, RST, and CLK pins of embedded SIM (eSIM) modules in wearables against contact ESD during module replacement. IC Role / Device Role / Timing Role: Four-channel protection IC mounted adjacent to SIM socket; each cathode connected to dedicated SIM pin. Use Value: Ensures reliable SIM detection and communication after repeated hot-plug cycles, with <25 nA leakage preserving low-power sleep modes. |
Use Scenario: Guarding line-out, mic-in, headset detect, and button sense lines in Bluetooth earbuds against ESD from user touch or cable handling. IC Role / Device Role / Timing Role: Low-capacitance ESD suppressor placed at jack connector; prevents pop/click noise and amplifier latch-up. Use Value: Maintains audio fidelity with <15 pF loading across 20 Hz–20 kHz band; clamps transients to <11 V to protect sensitive op-amp inputs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESDA6V1SC6 | 6.1 V standoff, 10 pF @ 0 V, SOT23-6 package (6-pin), bidirectional per channel | Requires separate ground connection per diode; higher pin count increases layout complexity | Select when bidirectional protection is required for AC-coupled or floating lines. |
| TPD4E001DPYR | 5.5 V standoff, 8 pF @ 0 V, X2SON-6 package, lower clamping (8.5 V @ 1 A) | Smaller 1.0 × 1.0 mm footprint but requires 6-pad layout vs. 5-pad SOT353 | Prefer for ultra-dense layouts where <8 pF capacitance is critical and board space permits 6-pin routing. |
Compared with ESDA6V1SC6 and TPD4E001DPYR, the PESD5V0V4UG,115 offers optimal balance of 5.0 V standoff matching standard logic rails, 5-pin SC-88A simplicity, and verified 12 kV IEC 61000-4-2 performance-making it especially suited for cost-sensitive, space-constrained 5 V interface protection where unidirectional grounding is acceptable.
Availability
PESD5V0V4UG,115 is available at Aetrix Electronics and suitable for USB 2.0 interfaces, SIM card sockets, HDMI signal paths, and audio codec lines requiring stable component supply in high-volume portable electronics production.
Supply support for PESD5V0V4UG,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable discrete, logic, and MOSFET solutions with focus on efficiency, reliability, and miniaturization for consumer, computing, and communications markets.
The PESD5V0V4UG,115 belongs to Nexperia's PESDxV4U series of ultra-low-capacitance ESD protection arrays, engineered specifically for high-speed data line protection in space-constrained portable electronics where signal integrity and IEC compliance are mandatory.
FAQ
What is the maximum operating temperature for the PESD5V0V4UG,115?
The PESD5V0V4UG,115 has a junction temperature limit of 150 °C and an ambient operating range of −65 °C to +150 °C, supporting deployment in automotive cabin modules, industrial handhelds, and outdoor consumer devices. Thermal derating applies above 85 °C ambient per the datasheet's relative PPP vs. Tj curve.
Does the PESD5V0V4UG,115 support bidirectional signal lines?
No-the PESD5V0V4UG,115 is a unidirectional ESD protection array with a common anode (Pin 2) and four cathodes (Pins 1, 3, 4, 5), intended only for ground-referenced signal lines. For bidirectional protection (e.g., I²C, UART), a different device such as the PESD5V0X1BCA or ESDA6V1SC6 is required.
What is the marking code for the PESD5V0V4UG,115?
The PESD5V0V4UG,115 is marked "V2*" on the top surface of the SOT353 package, where "*" denotes manufacturing location (e.g., "p" = Hong Kong, "t" = Malaysia). This marking aligns with Table 5 in the Nexperia datasheet Rev. 03.
Can the PESD5V0V4UG,115 be used for 3.3 V logic lines?
No-the PESD5V0V4UG,115 is specified for 5.0 V reverse standoff voltage and is not rated for reliable operation on 3.3 V systems. For 3.3 V interfaces, use the pin-compatible PESD3V3V4UG,115 (3.3 V VRWM, same SOT353 package and pinout).
Is reflow soldering the only recommended assembly method for the PESD5V0V4UG,115?
Yes-Nexperia explicitly states that reflow soldering is the only recommended method for the PESD5V0V4UG,115. Wave soldering is not supported due to thermal stress risks; Figure 14 provides the validated reflow footprint for SOT353, and JEDEC J-STD-020 moisture sensitivity level is not specified in the datasheet.
PESD5V0V4UG,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- 4
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 6.4V
- Voltage - Clamping (Max) @ Ipp:
- 13V
- Current - Peak Pulse (10/1000µs):
- 1.5A (8/20µs)
- Power - Peak Pulse:
- 16W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 12pF @ 1MHz
- Operating Temperature:
- -65°C ~ 150°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-353
PESD5V0V4UG,115 FAQ
1.How can I place an order for PESD5V0V4UG,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD5V0V4UG,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD5V0V4UG,115 reliable?
The price and inventory of PESD5V0V4UG,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD5V0V4UG,115 is usually 5 days.
3.What payment methods are accepted for PESD5V0V4UG,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD5V0V4UG,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD5V0V4UG,115?
PESD5V0V4UG,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD5V0V4UG,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD5V0V4UG,115?
For technical support, including PESD5V0V4UG,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD5V0V4UG,115 requirements.
6.How does Aetrix verify that PESD5V0V4UG,115 is sourced from the original manufacturer or authorized distributors?
All PESD5V0V4UG,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD5V0V4UG,115 meets industry standards.
7.What is the process for return or replacement of PESD5V0V4UG,115?
All PESD5V0V4UG,115 units undergo pre-shipment inspection (PSI). If there is an issue with PESD5V0V4UG,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD5V0V4UG,115 part is unused and in its original packaging.
Return procedure for PESD5V0V4UG,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD5V0V4UG,115 Tags

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ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

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ESD5Z3.3T1G
onsemi

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D5V0H1B2LP-7B
Diodes Incorporated

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D5V0P1B2LP-7B
Diodes Incorporated

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DESD5V0U1BA-7
Diodes Incorporated

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ESD5Z5.0T1G
onsemi

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DESD5V0U1BB-7
Diodes Incorporated

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D12V0L1B2LP-7B
Diodes Incorporated

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PESD2V0Y1BSFYL
Nexperia USA Inc.

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DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

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D5V0L1B2WS-7
Diodes Incorporated
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