Nexperia USA Inc. PESD5V0X1UAB,115
- Part No.:
- PESD5V0X1UAB,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- SC-79, SOD-523
- Datasheet:
-
PESD5V0X1UAB,115.pdf
- Description:
- TVS DIODE 5VWM 9VC SOD523
- Quantity:
- Payment:

- Shipping:

Inventory:127,614
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Product details
Overview
PESD5V0X1UAB from Nexperia is a unidirectional ESD protection diode in SOD523 (SC-79) package, designed to protect single high-speed signal lines against IEC 61000-4-2 level 4 ESD (±15 kV contact), with ultra-low capacitance (1.55 pF typ), clamping voltage of 9 V at 2 A surge, and reverse standoff voltage of 5.5 V - deployed in USB 2.0, HDMI, and SIM card interfaces.
For engineers reviewing the PESD5V0X1UAB datasheet, PESD5V0X1UAB pinout, PESD5V0X1UAB application, or PESD5V0X1UAB equivalent, key selection criteria include sub-2 pF capacitance for minimal signal integrity impact, AEC-Q101 qualification for automotive-grade reliability, low-leakage (1 nA) operation, and validated 8/20 µs surge handling up to 2 A.
Technical Context
This unidirectional TVS diode operates as a clamping device across one signal line and ground, activating only when reverse voltage exceeds 5.8 V (typical breakdown). Its low dynamic resistance (0.15 Ω) ensures rapid energy diversion during transients while maintaining tight voltage control.
The device leverages silicon PN-junction architecture optimized for fast response (<1 ns rise time per IEC 61000-4-2), with cathode-anode polarity fixed per SC-79 marking (bar = pin 1 = cathode). It is not bidirectional and requires correct orientation relative to signal polarity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage | 5.5 V max - defines maximum continuous operating voltage before leakage rises significantly; sets upper limit for protected line DC bias. |
| Diode Capacitance | 1.55 pF typ @ 1 MHz, 0 V - enables use on >480 Mbps USB 2.0 and HDMI 1.4 differential pairs without measurable signal distortion. |
| Clamping Voltage | 9 V @ 2 A, 8/20 µs - limits transient overvoltage seen by downstream ICs during IEC 61000-4-5 surge events. |
| ESD Withstand | ±15 kV contact per IEC 61000-4-2 level 4 - meets industrial and automotive interface immunity requirements without external circuitry. |
| Leakage Current | 1 nA typ @ 5 V - negligible loading on high-impedance sensor or audio bias networks; avoids DC offset or battery drain. |
| Breakdown Voltage | 5.8–7.5 V @ 10 mA - ensures reliable turn-on margin above 5.5 V VRWM while avoiding false triggering on noise spikes. |
| Dynamic Resistance | 0.15 Ω typ - sustains low clamping voltage under high di/dt transients, critical for protecting sensitive 1.8 V/3.3 V I/O cells. |
Pinout & Package
SOD523 (SC-79) plastic surface-mount package: 2-pin, 1.2 mm × 0.8 mm × 0.6 mm body, flat lead, cathode marked by bar on end.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (marked) | Cathode | Connected to system ground; carries transient current during ESD event; must route directly to low-inductance ground plane. |
| 2 | Anode | Connected to protected signal line; reverse-biased during normal operation; forward-conducts only during negative transients if used with inverted polarity. |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q101 qualified | Validated for automotive environments including temperature cycling (-55 °C to +150 °C) and mechanical shock, enabling use in infotainment and telematics modules. |
| Ultra-low capacitance | 1.55 pF typ preserves signal integrity on high-speed serial links (e.g., USB 2.0 eye diagram margin >30% retained). |
| Low clamping voltage | 9 V clamping at 2 A limits stress on 3.3 V or 5 V I/O pins, reducing risk of gate oxide damage in connected SoCs/FPGAs. |
| Sub-nA leakage | 1 nA reverse current avoids loading of high-Z analog sensors or battery-backed real-time clock circuits. |
| IEC 61000-4-5 compliant | Rated for 2 A 8/20 µs surge current - supports Ethernet PHY port protection and industrial fieldbus interface robustness. |
Applications
| USB 2.0 Data Lines | HDMI DDC/CEC Channels |
|---|---|
Use Scenario: Protection of D+ and D− lines in portable USB host/peripheral devices exposed to frequent human-hand ESD events. IC Role / Device Role / Timing Role: Unidirectional clamping diode placed between signal line and chassis/ground, activated only during positive ESD transients. Use Value: 1.55 pF capacitance prevents USB 2.0 eye closure; ±15 kV ESD rating eliminates need for secondary protection layers. |
Use Scenario: ESD safeguarding of HDMI DDC (I²C) and CEC control lines in TVs, set-top boxes, and AV receivers. IC Role / Device Role / Timing Role: Signal-line protector with <2 pF loading to avoid I²C timing violations (400 kHz max clock) and bus contention. Use Value: Sub-1 nA leakage maintains I²C pull-up voltage stability; 9 V clamping protects 3.3 V HDMI controller I/Os. |
| SIM Card Interface | Automotive Infotainment Serial Links |
Use Scenario: Protection of SIM VCC, I/O, and CLK lines in smartphones and IoT modules where space and capacitance are constrained. IC Role / Device Role / Timing Role: Single-line ESD suppressor mounted adjacent to SIM connector, oriented anode-to-signal, cathode-to-ground. Use Value: SOD523 footprint (1.2 × 0.8 mm) fits within tight SIM tray layouts; AEC-Q101 allows reuse in automotive eSIM modules. |
Use Scenario: Transient suppression on UART, LIN, or I²C debug lines in automotive head units and digital clusters. IC Role / Device Role / Timing Role: Unidirectional clamp on bidirectional data lines where signal polarity is known (e.g., LIN TX driven high during dominant state). Use Value: 150 °C junction rating supports under-dash mounting; 1.55 pF avoids jitter on 19.2 kbps LIN waveforms. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar unidirectional ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NUP4105MR6T1G | Higher capacitance (3.5 pF), higher clamping (12 V), dual-channel configuration | Requires PCB redesign for dual-line protection; less suitable for >480 Mbps interfaces | Select only when multi-line integration outweighs speed penalty and board area increase. |
| Vishay ESDE05C1-2 | Lower clamping (7.5 V), same 1.5 pF capacitance, but non-AEC-Q101 rated | Lacks automotive qualification; limited to consumer-grade portable electronics | Prefer for cost-sensitive non-automotive designs where AEC-Q101 is not mandated. |
Compared with NUP4105MR6T1G and ESDE05C1-2, PESD5V0X1UAB uniquely balances ultra-low capacitance, automotive qualification, and single-line compactness - making it optimal for space-constrained, high-speed, and automotive-qualified signal line protection.
Availability
PESD5V0X1UAB is available at Aetrix Electronics and suitable for USB 2.0 interface protection, HDMI control channel safeguarding, and automotive infotainment serial link hardening requiring stable component supply across production lifecycles.
Supply support for PESD5V0X1UAB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in ESD protection, MOSFETs, and bipolar transistors.
PESD5V0X1UAB belongs to Nexperia's ultra-low-capacitance ESD protection portfolio, engineered specifically for high-speed data line immunity in mobile, computing, and automotive electronics.
FAQ
Is PESD5V0X1UAB suitable for bidirectional signal lines like USB D+/D−?
No - PESD5V0X1UAB is unidirectional and protects only positive-going transients when anode is connected to the signal line. For true bidirectional protection (e.g., full USB 2.0 differential pair), two devices or a dedicated bidirectional array such as PESD5V0S1BA must be used.
What is the recommended PCB layout for optimal ESD performance?
Place PESD5V0X1UAB within 3 mm of the connector, route the protected signal directly to pin 2 (anode), connect pin 1 (cathode) to a solid ground plane via shortest possible trace, and avoid vias or stubs in the transient path - this minimizes inductance and ensures clamping occurs below 9 V.
Does the 15 kV ESD rating apply to both contact and air discharge?
The 15 kV rating applies strictly to IEC 61000-4-2 contact discharge. Air discharge rating is not specified in the datasheet; design margins should assume lower immunity for air discharge, and system-level testing is required for compliance claims.
Can PESD5V0X1UAB be used on 1.8 V logic lines?
Yes - its 5.5 V reverse standoff voltage and 5.8 V minimum breakdown ensure safe operation with 1.8 V signals, and its 9 V clamping voltage provides adequate headroom above the 1.8 V rail's absolute maximum rating (typically 2.0–2.5 V), preventing latch-up or oxide damage.
PESD5V0X1UAB,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- SC-79, SOD-523
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 5.8V
- Voltage - Clamping (Max) @ Ipp:
- 9V (Typ)
- Current - Peak Pulse (10/1000µs):
- 2A (8/20µs)
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- 1.55pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOD-523
PESD5V0X1UAB,115 FAQ
1.How can I place an order for PESD5V0X1UAB,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD5V0X1UAB,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD5V0X1UAB,115 reliable?
The price and inventory of PESD5V0X1UAB,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD5V0X1UAB,115 is usually 5 days.
3.What payment methods are accepted for PESD5V0X1UAB,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD5V0X1UAB,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD5V0X1UAB,115?
PESD5V0X1UAB,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD5V0X1UAB,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD5V0X1UAB,115?
For technical support, including PESD5V0X1UAB,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD5V0X1UAB,115 requirements.
6.How does Aetrix verify that PESD5V0X1UAB,115 is sourced from the original manufacturer or authorized distributors?
All PESD5V0X1UAB,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD5V0X1UAB,115 meets industry standards.
7.What is the process for return or replacement of PESD5V0X1UAB,115?
All PESD5V0X1UAB,115 units undergo pre-shipment inspection (PSI). If there is an issue with PESD5V0X1UAB,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD5V0X1UAB,115 part is unused and in its original packaging.
Return procedure for PESD5V0X1UAB,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD5V0X1UAB,115 Tags

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