NXP Semiconductors PN5190B1HN/C127Y
- Part No.:
- PN5190B1HN/C127Y
- Manufacturer:
- NXP Semiconductors
- Category:
- RFID, RF Access, Monitoring ICs
- Package:
- 40-VFLGA Exposed Pad
- Datasheet:
-
PN5190B1HN/C127Y.pdf
- Description:
- PN5190B1HN/C127Y
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PN5190B1HN/C127Y from NXP Semiconductors is a high-power NFC frontend IC supporting ISO/IEC 14443-A/B, FeliCa, ISO/IEC 15693, ISO/IEC 18000-3 Mode 3, NFC-IP1/2, and MIFARE card family R/W - with hardware-accelerated crypto, integrated DC-DC (up to 6.0 V), and ultra-low-power card detection (22 μA avg). It enables secure contactless payment terminals and access control readers operating under Linux/Android.
For engineers reviewing the PN5190B1HN/C127Y datasheet, PN5190B1HN/C127Y pinout, PN5190B1HN/C127Y application, or PN5190B1HN/C127Y equivalent, this page delivers verified RF protocol support (including EMVCo-compliant Type A/B/F), SPI host interface (15 Mbit/s), dynamic power control (DPC), adaptive waveshape control (AWC), and firmware version 2.7 preloaded for production-ready deployment.
Technical Context
The PN5190B1HN/C127Y implements a fully integrated 13.56 MHz NFC frontend with independent TX/RX buffers (1024 bytes each), SPI-controlled TLV framing, and real-time autonomous features - including DPC for thermal management and AWC for field shape optimization without host intervention. Its PLL supports 24/32/48 MHz external clocks, eliminating need for 27.12 MHz crystal in compatible systems.
It integrates a synchronized step-up DC-DC converter (2.8–6.0 V output) co-timed with receiver clock to suppress switching noise, plus a dedicated TX_LDO for clean transmitter supply. Firmware v2.7 adds LPCD-with-Autocoll event, CTS fast configuration, NSS delay handling, and robustness improvements for MIFARE Classic authentication and LPCD/standby modes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RF Protocols | Fully supports ISO/IEC 14443-A/B (848 kbit/s), FeliCa (424 kbit/s), ISO/IEC 15693, ISO/IEC 18000-3 Mode 3, NFC-IP1/2, and all MIFARE cards with on-chip crypto licensing. |
| Host Interface | SPI at up to 15 Mbit/s with MOSI/MISO/NSS/SCK, IRQ line, and separate 1024-byte TX/RX buffers - enabling low-latency TLV-based command exchange. |
| Transmit Power | Up to 2.3 W output power with integrated TX_LDO and optional DC-DC boost (configurable 2.8–6.0 V), enabling extended read range in compact antenna designs. |
| Power Consumption | 22 μA average current in ultra-low-power card detection (ULPCD) mode; 45–110 μA standby; 40–105 μA power-down - critical for battery-powered access devices. |
| Firmware Version | Preloaded firmware v2.7 includes LPCD-with-Autocoll event, CTS fast init (50 µs), NSS delay feature (100 µs default), and fixes for MIFARE Classic auth and EMVCo L1 analog stability. |
| Operating Temp | -40 °C to +105 °C ambient (TX = 120 mA @ VDDPA = 3.6 V), validated for industrial and automotive-grade reader deployments. |
| Supply Voltages | VDD(VBAT): 2.4–5.5 V (analog/digital); VDDIO: 2.4–3.6 V (host/GPIO); VDDPA: up to 6.0 V (transmitter via DC-DC or direct supply). |
Pinout & Package
VFLGA40 package: very thin fine-pitch land grid array, 40 terminals, 0.4 mm pitch, 5 mm × 5 mm × 0.8 mm body, MSL=3, delivered in reel (Y suffix). Thermal pad center connected to GND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ATX_A / ATX_B / ATX_C / ATX_D | SPI target interface | Full-duplex SPI signals (MOSI/MISO/NSS/SCK) with 15 Mbit/s capability - requires pull-ups per host logic level. |
| IRQ | Interrupt output | Open-drain active-low signal notifying host of RF events (card detect, transaction complete, error) - enables low-CPU polling overhead. |
| VDDPA / VUP_TX / BOOST_LX / VDDBOOST | Transmitter power chain | Supports both direct VDDPA supply (≤6.0 V) and DC-DC boost path (VDDBOOST → BOOST_LX → VUP_TX) - selectable per application power budget. |
| TX1 / TX2 / RXP / RXN / VMID | RF front-end interface | Differential antenna driver outputs (TX1/TX2), differential receiver inputs (RXP/RXN), and antenna symmetry point (VMID) - require matched 50 Ω PCB traces and external matching network. |
| GPIO0–GPIO3 | Configurable I/O | General-purpose pins; GPIO3 reserved exclusively for ULPCD abort when enabled - not usable for other functions in that mode. |
| VEN | Hardware reset | Asynchronous low-active reset independent of VDDIO - must be pulled high via external resistor; floating state prohibited. |
Key Features
| Feature | Design Value |
|---|---|
| Dynamic Power Control (DPC) | Real-time regulation of VDDPA via integrated DC-DC to maintain stable RF output while minimizing chip temperature and battery drain during load changes. |
| Adaptive Waveshape Control (AWC) | Automatic adjustment of TX waveform harmonics and edge timing to meet EMVCo L1 analog requirements across varying antenna loads and temperatures - no host tuning required. |
| Ultra-Low-Power Card Detection (ULPCD) | 22 μA average current consumption with 330 ms polling interval - enables multi-year battery life in portable access readers and smart locks. |
| Hardware Crypto Acceleration | On-die cryptographic engine licensed for NXP MIFARE Classic/Plus/Ultralight/DESFire, ISO/IEC 14443-A/B, and Innovatron ISO/IEC 14443-B - eliminates host-side crypto latency and firmware licensing overhead. |
| LPCD-with-Autocoll Event (FW v2.7) | New SWITCH_MODE_LPCD command option (bControl = 0x13) triggers Autocoll upon external RF detection - enabling seamless wake-from-standby into card emulation or reader mode without host polling. |
Applications
| Payment Terminals | Physical Access Readers |
|---|---|
Use Scenario: EMVCo-certified contactless payment terminal in retail kiosks or unattended vending machines. IC Role / Device Role / Timing Role: NFC frontend handling full ISO/IEC 14443-A/B/F and MIFARE R/W protocols, with hardware crypto and DPC for consistent field strength across battery charge states. Use Value: Preloaded FW v2.7 ensures reliable SOF/EOF timing per EMVCo L1 analog test, while ULPCD extends battery life beyond 3 years in solar-charged deployments. | Use Scenario: Secure door access reader for office buildings using MIFARE DESFire EV2 credentials and NFC peer-to-peer provisioning. IC Role / Device Role / Timing Role: High-sensitivity frontend supporting ISO/IEC 14443-A card emulation (PICC mode) and P2P initiator/target at 424 kbit/s - with AWC maintaining field integrity near metal enclosures. Use Value: Integrated DC-DC enables stable 2.3 W output from single 3.3 V supply, eliminating external boost converters and reducing BOM count by 4 components. |
| e-Government ID Readers | Industrial Asset Tagging |
Use Scenario: Portable ePassport and national ID verification device used by border control agents in field operations. IC Role / Device Role / Timing Role: Dual-mode frontend executing ISO/IEC 14443-B (ePassport) and ISO/IEC 18000-3 Mode 3 (contactless RFID tags) with simultaneous crypto offload. Use Value: Firmware v2.7 resolves Type-B106 SOF/EOF timing issues observed during EMVCo L1 testing, ensuring first-pass certification compliance. | Use Scenario: Ruggedized handheld scanner for maintenance teams reading ISO/IEC 15693 ICODE tags on industrial machinery. IC Role / Device Role / Timing Role: Reader/writer supporting proprietary 106/212 kbit/s data rates for NXP NTAG 5 and standard ISO/IEC 15693 - with 105 °C ambient rating for factory-floor operation. Use Value: 22 μA ULPCD current allows >5-year battery life in intermittent-scan use cases, while GPIO0–GPIO3 enable custom status LED and buzzer control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NFC frontend applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PN5180A1HN/C127Y | Lower max transmit power (1.5 W vs. 2.3 W); no integrated DC-DC; supports only FW v2.0–v2.6; lacks ULPCD mode. | Targeted at cost-sensitive, lower-range readers where battery life and thermal headroom are less critical. | Select PN5180A1HN/C127Y only if system-level RF range ≤5 cm and continuous operation at full power is not required. |
| PN7160B1HN/C127Y | Single-supply optimized (no VDDPA/VUP_TX separation); no DC-DC; max 1.2 W output; supports only ISO/IEC 14443-A/B and FeliCa - no ISO/IEC 15693 or 18000-3. | Designed for compact consumer electronics (e.g., smartphones, wearables) with strict size/power constraints and limited protocol scope. | Choose PN7160B1HN/C127Y only for space-constrained designs requiring minimal external components and no industrial tag reading. |
Compared with PN5180A1HN/C127Y and PN7160B1HN/C127Y, the PN5190B1HN/C127Y uniquely combines 2.3 W output, ULPCD (22 μA), firmware v2.7's LPCD-with-Autocoll, and full protocol coverage - making it the sole option for certified payment terminals and industrial readers demanding extended range, long battery life, and multi-standard interoperability.
Availability
PN5190B1HN/C127Y is available at Aetrix Electronics and suitable for payment terminals, physical access systems, and e-government ID readers requiring stable component supply, long-term lifecycle support, and production-ready firmware v2.7.
Supply support for PN5190B1HN/C127Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with over 20 years of NFC innovation and EMVCo certification leadership.
The PN5190B1HN/C127Y belongs to NXP's high-power NFC frontend product line, engineered specifically for industrial-grade contactless readers requiring extended RF range, ultra-low-power wake-on-field, and full NFC Forum/EMVCo protocol compliance - including legacy MIFARE and emerging ISO/IEC 18000-3 assets.
FAQ
What firmware version is preloaded on PN5190B1HN/C127Y?
PN5190B1HN/C127Y ships with firmware version 2.7 preinstalled. This version includes critical enhancements for EMVCo L1 analog stability (Type-B106 SOF/EOF timing), LPCD-with-Autocoll event triggering, CTS fast configuration (50 µs), and NSS delay handling (100 µs default). Firmware v2.7 is validated for production use and supports encrypted firmware download for field updates.
Does PN5190B1HN/C127Y support ISO/IEC 15693 and ISO/IEC 18000-3 Mode 3?
Yes, PN5190B1HN/C127Y natively supports ISO/IEC 15693 (ICODE) and ISO/IEC 18000-3 Mode 3 in reader/writer mode. It also implements proprietary 106/212 kbit/s data rates for NXP NTAG 5 communication based on ISO/IEC 15693. These capabilities are confirmed in the official datasheet Rev. 4.4 and are enabled in firmware v2.7 without host-side protocol stack implementation.
What is the ultra-low-power card detection (ULPCD) current of PN5190B1HN/C127Y?
The PN5190B1HN/C127Y achieves 22 μA average current in ultra-low-power card detection (ULPCD) mode at 330 ms polling interval, with 3.0 V supply and 50 Ω antenna matching. This value is measured per datasheet Table 1 and enables multi-year battery operation in portable access readers - significantly lower than standard LPCD (45–110 μA standby) and essential for energy-constrained deployments.
Can PN5190B1HN/C127Y operate without an external 27.12 MHz crystal?
Yes, PN5190B1HN/C127Y can operate without a 27.12 MHz crystal. Its internal PLL accepts external clock inputs of 24 MHz, 32 MHz, or 48 MHz (configured via EEPROM register CLK_INPUT_FREQ at 0012h), enabling clock source reuse in systems already generating one of these frequencies - reducing BOM cost and board space versus crystal-based designs.
Is the DC-DC converter in PN5190B1HN/C127Y mandatory or optional?
The DC-DC converter in PN5190B1HN/C127Y is optional. It may be disabled to supply the transmitter directly from VDDPA (up to 6.0 V), or enabled to generate boosted VUP_TX from lower input voltages (e.g., 3.3 V). However, DC-DC usage is recommended for stable RF performance under battery voltage sag, and it is required for ULPCD mode - though not for standard LPCD or active reader operation.
PN5190B1HN/C127Y Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 40-VFLGA Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- RFID Reader/Transponder
- Frequency:
- 13.56MHz
- Standards:
- FeliCa, ISO 14443-A, ISO 14443-B, ISO 15693, ISO 18000-3, ISO 18092, ISO 21481, Mifare, NFC
- Interface:
- I2C, SPI, USB
- Voltage - Supply:
- 2.4V ~ 5.5V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-VFLGA (5x5)
PN5190B1HN/C127Y FAQ
1.How can I place an order for PN5190B1HN/C127Y through Aetrix?
Please submit a Request for Quotation (RFQ) for PN5190B1HN/C127Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PN5190B1HN/C127Y reliable?
The price and inventory of PN5190B1HN/C127Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PN5190B1HN/C127Y is usually 5 days.
3.What payment methods are accepted for PN5190B1HN/C127Y?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PN5190B1HN/C127Y transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PN5190B1HN/C127Y?
PN5190B1HN/C127Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PN5190B1HN/C127Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PN5190B1HN/C127Y?
For technical support, including PN5190B1HN/C127Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PN5190B1HN/C127Y requirements.
6.How does Aetrix verify that PN5190B1HN/C127Y is sourced from the original manufacturer or authorized distributors?
All PN5190B1HN/C127Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PN5190B1HN/C127Y meets industry standards.
7.What is the process for return or replacement of PN5190B1HN/C127Y?
All PN5190B1HN/C127Y units undergo pre-shipment inspection (PSI). If there is an issue with PN5190B1HN/C127Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PN5190B1HN/C127Y part is unused and in its original packaging.
Return procedure for PN5190B1HN/C127Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PN5190B1HN/C127Y Tags

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SL2S2602FTBX
NXP Semiconductors

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ST25DV04K-IER6S3
STMicroelectronics

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ST25DV04K-IER6C3
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LXMSJZNCMD-217
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NXP Semiconductors

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NXP Semiconductors

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M24LR04E-RMC6T/2
STMicroelectronics

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ST25DV04KC-JF6D3
STMicroelectronics

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ST25DV64KC-IE6S3
STMicroelectronics
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ST25DV64K-IER6T3
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