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NXP Semiconductors PN5190B2HN/C130K
- Part No.:
- PN5190B2HN/C130K
- Manufacturer:
- NXP Semiconductors
- Category:
- RFID, RF Access, Monitoring ICs
- Package:
- 40-VFLGA Exposed Pad
- Datasheet:
-
PN5190B2HN/C130K.pdf
- Description:
- PN5190B2HN/C130K
- Quantity:
- Payment:
- Shipping:
Inventory:3,851
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Product details
Overview
PN5190B2HN/C130K from NXP Semiconductors is a high-power NFC frontend IC supporting ISO/IEC 14443-A/B, FeliCa, ISO/IEC 15693, ISO/IEC 18000-3 Mode 3, NFC-IP1/2, and MIFARE card family communication at up to 848 kbit/s in reader/writer mode. It integrates DC-DC conversion (2.8–6.0 V output), SPI host interface (15 Mbit/s), dynamic power control (DPC2.0), and ultra-low-power card detection (ULPCD) consuming only 22 μA typical. It is deployed in secure payment terminals and access control readers requiring robust RF performance under battery-constrained operation.
For engineers reviewing the PN5190B2HN/C130K datasheet, PN5190B2HN/C130K pinout, PN5190B2HN/C130K application, or PN5190B2HN/C130K equivalent, key selection considerations include its VFLGA40 package (5 mm × 5 mm × 0.8 mm), firmware version 3.0 with encrypted download support, integrated TX_LDO and DC-DC for single-supply 3.3 V operation, and hardware-based ULPCD enabling sub-25 μA standby current in contactless polling systems.
Technical Context
The PN5190B2HN/C130K implements a fully integrated 13.56 MHz NFC frontend with autonomous DPC2.0 using true transmitter current measurement and <1 ms regulation response, eliminating host intervention during antenna load transients. Its adaptive waveshape control (AWC) dynamically adjusts RF waveform parameters to maintain compliance under detuning conditions without manual matching recalibration.
It supports dual low-power detection modes: software-based LPCD (I/Q channel analysis, extended range) and hardware-based ULPCD (amplitude-only, 22 μA typical). The integrated DC-DC is synchronized to the receiver clock to suppress switching noise, and the TX_LDO provides 100 mV granularity voltage control for precise DPC implementation - both critical for EMVCo-compliant payment terminal design.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RF Protocols | Fully compliant with ISO/IEC 14443-A/B, FeliCa (212/424 kbit/s), ISO/IEC 15693, ISO/IEC 18000-3 Mode 3, NFC-IP1/2, and all MIFARE families including DESFire EV2 and Plus |
| Max RF Output Power | 2.3 W with external DC-DC disabled; enables >10 cm read range on MIFARE Classic cards using optimized antenna matching |
| ULPCD Current | 22 μA typical at 330 ms polling interval - allows multi-year battery life in portable access readers |
| SPI Interface Speed | Up to 15 Mbit/s with independent 1024-byte TX/RX buffers - reduces host CPU overhead during high-throughput P2P or card emulation sessions |
| Supply Voltage Range | VDD(VBAT): 2.4–5.5 V; VDDIO: 2.4–3.6 V; supports single 3.3 V rail operation with DC-DC enabled for full RF power delivery |
| Operating Temperature | −40 °C to +105 °C ambient - qualified for industrial-grade embedded terminals in uncontrolled environments |
| Firmware Version | Pre-programmed FW 3.0 with crypto-assisted secure download - prevents unauthorized firmware modification in field-deployed devices |
Pinout & Package
VFLGA40 package: very thin fine-pitch land grid array, 40 terminals, 0.4 mm pitch, 5 mm × 5 mm × 0.8 mm body, MSL=3, delivered in multiple trays (K suffix).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ATX_A–ATX_D | SPI target interface | Full-duplex SPI signals (MOSI/MISO/NSS/SCK) with 15 Mbit/s capability - enables low-latency command-response cycles for real-time DPC and AWC adjustments |
| IRQ | Interrupt request output | Active-low event signal notifying host of card detection, protocol completion, or error - eliminates polling overhead in Linux/Android multitasking OS environments |
| VDDPA / VUP_TX | Transmitter power supply | VDDPA accepts up to 6.0 V; VUP_TX feeds TX_LDO - allows direct high-voltage drive or DC-DC boost for maximum RF output without external regulators |
| TX1 / TX2 | Differential antenna driver outputs | Capable of driving 50 Ω differential antenna loads; VMID provides symmetry point connection - simplifies balun-less antenna design |
| GPIO0–GPIO3 | Configurable I/O | GPIO3 reserved exclusively for ULPCD abort function when ULPCD is active; others support general-purpose signaling or status indication |
Key Features
| Feature | Design Value |
|---|---|
| Dynamic Power Control 2.0 | Autonomous, <1 ms response time with true current sensing - maintains stable field strength across varying card distances and metallic interference without host CPU involvement |
| Adaptive Waveshape Control | Real-time RF waveform correction based on antenna impedance feedback - eliminates need for iterative matching in production and ensures ISO/IEC 14443-A spectral mask compliance |
| Ultra-Low-Power Card Detection | 22 μA typical current draw with hardware-accelerated amplitude detection - extends battery life in portable readers beyond 3 years at 1-second polling intervals |
| Integrated DC-DC Converter | Step-up converter (2.8–6.0 V output) synchronized to receiver clock - delivers full RF power from 3.3 V supply while avoiding noise coupling into sensitive analog RX path |
| Secure Firmware Download | Encrypted HDLL command interface with crypto-assisted verification - prevents malicious firmware injection in payment-grade terminals certified to PCI PTS v6.x |
Applications
| Payment Terminals | Physical Access Readers |
|---|---|
Use Scenario: Contactless EMVCo-certified payment terminals processing chip-and-PIN or tap-to-pay transactions in retail, transit, or kiosk environments. IC Role / Device Role / Timing Role: NFC frontend handling all physical layer modulation/demodulation, protocol framing, and secure field generation - offloads RF complexity from host MCU. Use Value: DPC2.0 and AWC ensure reliable transaction completion within 300 ms even with misaligned or metallic-backed cards, meeting PCI PTS timing requirements. | Use Scenario: Battery-powered door access readers installed in office buildings, hotels, or residential complexes requiring multi-year maintenance-free operation. IC Role / Device Role / Timing Role: Standalone NFC reader subsystem performing ULPCD wake-up, card authentication, and credential validation without continuous host supervision. Use Value: 22 μA ULPCD current enables >3-year battery life at 1-second polling, reducing service costs and enabling retrofit installations where wiring is impractical. |
| e-Government ID Readers | Industrial Asset Tagging Systems |
Use Scenario: Portable eID readers used by border control, social services, or healthcare providers to authenticate national ID cards (e.g., German ePass, French Carte Vitale). IC Role / Device Role / Timing Role: High-sensitivity NFC frontend supporting ISO/IEC 14443-B and MIFARE DESFire EV2 for secure document verification and biometric data exchange. Use Value: Receiver signal level control with automatic attenuator and baseband amplifier achieves >8 cm read range on laminated eID cards, even under RF-noisy airport or hospital environments. | Use Scenario: Ruggedized handheld scanners used in manufacturing or logistics to read NFC tags on metal tools, containers, or machinery for traceability and maintenance tracking. IC Role / Device Role / Timing Role: Robust NFC interface tolerant to metallic proximity, leveraging AWC and DPC2.0 to sustain field integrity near conductive surfaces. Use Value: Maintains functional read range down to 2 cm on metal-mounted NTAG 5 tags - eliminates need for ferrite shielding and reduces BOM cost per unit. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NFC frontend applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PN7160B0HN/C130K | Lower RF output (1.2 W), no integrated DC-DC, FW 2.02, supports only ISO/IEC 14443-A/B/FeliCa/15693 - lacks ISO/IEC 18000-3 Mode 3 and NFC-IP2 | Targeted at cost-sensitive consumer electronics (e.g., smart posters, wearables); not certified for EMVCo or payment terminals | Select when ULPCD current <25 μA and full protocol stack are unnecessary; avoids over-specification in non-critical applications |
| ST25DV04KC | Dynamic NFC tag IC (not frontend), I²C interface, 4 Kbit EEPROM, no transmitter - functions as passive responder only | Used for NFC-enabled sensors, labels, or configuration storage - cannot initiate communication or power external antennas | Choose only for tag-side implementations; not a functional substitute for PN5190B2HN/C130K's reader/writer capabilities |
Compared with PN7160B0HN/C130K, PN5190B2HN/C130K delivers 92% higher RF power, integrated DC-DC for single-rail operation, and broader protocol coverage essential for payment certification; versus ST25DV04KC, it serves an entirely different system role - active frontend vs. passive tag - making them non-interchangeable in reader architecture.
Availability
PN5190B2HN/C130K is available at Aetrix Electronics and suitable for payment terminals, physical access readers, and e-government ID readers requiring stable component supply, long-term lifecycle assurance, and compliance with EMVCo, ISO/IEC 14443, and NFC Forum specifications.
Supply support for PN5190B2HN/C130K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with headquarters in Eindhoven, Netherlands.
PN5190B2HN/C130K belongs to NXP's high-performance NFC frontend product line, engineered specifically for EMVCo-certified payment terminals and industrial-grade access systems demanding robust RF performance, ultra-low-power operation, and secure firmware update capabilities.
FAQ
What is the firmware version pre-programmed on PN5190B2HN/C130K?
PN5190B2HN/C130K ships with firmware version 3.0 pre-installed, which includes encrypted firmware download support via HDLL commands for enhanced security. This version is functionally identical to FW 2.06 except for the crypto-assisted update mechanism and cannot be downgraded to earlier versions. Firmware updates must be performed using NXP's official tools and signed images to maintain certification integrity for the PN5190B2HN/C130K.
Does PN5190B2HN/C130K support ISO/IEC 18000-3 Mode 3 communication?
Yes, PN5190B2HN/C130K supports ISO/IEC 18000-3 Mode 3 in reader/writer mode, as confirmed in Section 2.1.7 of the official datasheet. This capability enables interoperability with industrial RFID tags such as NXP's ICODE SLI-X series and is validated for use in asset tracking and logistics applications where extended read range and anti-collision performance are required alongside the PN5190B2HN/C130K's integrated DPC and AWC features.
Can PN5190B2HN/C130K operate from a single 3.3 V supply?
Yes, PN5190B2HN/C130K supports single 3.3 V supply operation using its integrated DC-DC converter to boost VDDPA up to 6.0 V, enabling full 2.3 W RF output without external regulators. This configuration is explicitly supported in the datasheet and simplifies power design in space-constrained terminals - the DC-DC is synchronized to the receiver clock to prevent noise coupling, ensuring clean RF performance in the PN5190B2HN/C130K.
What is the difference between LPCD and ULPCD modes on PN5190B2HN/C130K?
PN5190B2HN/C130K offers two low-power detection modes: LPCD uses software-based I/Q channel analysis for maximum detection range (>7 cm), while ULPCD employs hardware-accelerated amplitude-only detection to achieve 22 μA typical current - ideal for battery-operated readers. ULPCD reserves GPIO3 exclusively for abort functionality, and the DC-DC cannot be used in ULPCD mode, whereas LPCD supports DC-DC usage. Both are mutually exclusive and selected at initialization for the PN5190B2HN/C130K.
Is PN5190B2HN/C130K pin-compatible with other PN5190 variants?
PN5190B2HN/C130K uses the VFLGA40 package (SOT2062-1), which is mechanically and electrically identical to other PN5190B2HN/Cxxx variants in the same package type (e.g., PN5190B2HN/C130Y). Pinout matches exactly across all VFLGA40 versions, including ATX_A–D, IRQ, VDDPA, TX1/TX2, and GPIOs. Firmware differences (e.g., FW 3.0 vs. 3.2) do not affect pin functionality or electrical behavior of the PN5190B2HN/C130K.
PN5190B2HN/C130K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 40-VFLGA Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Type:
- RFID Reader/Transponder
- Frequency:
- 13.56MHz
- Standards:
- FeliCa, ISO 14443-A, ISO 14443-B, ISO 15693, ISO 18000-3, ISO 18092, ISO 21481, Mifare, NFC
- Interface:
- I2C, SPI, USB
- Voltage - Supply:
- 2.4V ~ 5.5V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-VFLGA (5x5)
PN5190B2HN/C130K FAQ
1.How can I place an order for PN5190B2HN/C130K through Aetrix?
Please submit a Request for Quotation (RFQ) for PN5190B2HN/C130K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PN5190B2HN/C130K reliable?
The price and inventory of PN5190B2HN/C130K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PN5190B2HN/C130K is usually 5 days.
3.What payment methods are accepted for PN5190B2HN/C130K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PN5190B2HN/C130K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PN5190B2HN/C130K?
PN5190B2HN/C130K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PN5190B2HN/C130K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PN5190B2HN/C130K?
For technical support, including PN5190B2HN/C130K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PN5190B2HN/C130K requirements.
6.How does Aetrix verify that PN5190B2HN/C130K is sourced from the original manufacturer or authorized distributors?
All PN5190B2HN/C130K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PN5190B2HN/C130K meets industry standards.
7.What is the process for return or replacement of PN5190B2HN/C130K?
All PN5190B2HN/C130K units undergo pre-shipment inspection (PSI). If there is an issue with PN5190B2HN/C130K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PN5190B2HN/C130K part is unused and in its original packaging.
Return procedure for PN5190B2HN/C130K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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