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NXP Semiconductors PN5190B2HN/C131K
- Part No.:
- PN5190B2HN/C131K
- Manufacturer:
- NXP Semiconductors
- Category:
- RFID, RF Access, Monitoring ICs
- Package:
- 40-VFLGA Exposed Pad
- Datasheet:
-
PN5190B2HN/C131K.pdf
- Description:
- PN5190B2HN/C131K
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
PN5190B2HN/C131K from NXP Semiconductors is a high-power NFC frontend IC supporting ISO/IEC 14443-A/B, FeliCa, ISO/IEC 15693, ISO/IEC 18000-3 Mode 3, ISO/IEC 18092 (NFC-IP1), ISO/IEC 21481 (NFC-IP2), and peer-to-peer modes up to 424 kbit/s. It integrates dynamic power control (DPC2.0), adaptive waveshape control (AWC), and ultra-low-power card detection (ULPCD) for autonomous operation in Linux/Android-based payment terminals and access control readers.
For engineers reviewing the PN5190B2HN/C131K datasheet, PN5190B2HN/C131K pinout, PN5190B2HN/C131K application, or PN5190B2HN/C131K equivalent, key selection considerations include its VFLGA40 package with 40 terminals, SPI interface up to 15 Mbit/s, integrated DC-DC boost (2.8–6.0 V), 22 µA ULPCD current, and firmware version 3.2 preloaded for encrypted field updates.
Technical Context
The PN5190B2HN/C131K implements a fully integrated 13.56 MHz RF frontend with hardware-accelerated ISO/IEC 14443-A/B, FeliCa, and NFC-IP protocol stacks - all executed autonomously without host CPU intervention. Its DPC2.0 engine performs true transmitter current measurement and sub-1 ms voltage regulation of the TX_LDO (100 mV granularity), while AWC dynamically adjusts antenna driver output waveshapes to maintain compliance under detuning.
It features dual low-power detection modes: software-based LPCD (I/Q channel analysis) for maximum range and hardware-based ULPCD (amplitude-only) consuming just 22 µA at 330 ms polling interval. The integrated DC-DC is synchronized with the receiver clock to suppress switching noise, enabling stable RF performance even with de-charged batteries.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RF Protocols | Fully supports ISO/IEC 14443-A/B, FeliCa (212/424 kbit/s), ISO/IEC 15693, ISO/IEC 18000-3 Mode 3, ISO/IEC 18092, ISO/IEC 21481, and P2P up to 424 kbit/s - no host firmware required for base-layer modulation/demodulation. |
| Transmit Power | Up to 2.3 W output power with external TX_LDO supply; enables >10 cm read range on standard 50 Ω antennas per EMVCo Level 1 requirements. |
| ULPCD Current | 22 µA average consumption at 330 ms polling interval - extends battery life in portable POS and mobile ID readers beyond 6 months on a single coin cell. |
| SPI Interface | 15 Mbit/s full-duplex SPI with independent 1024-byte TX/RX buffers and IRQ line - reduces host interrupt latency and eliminates command-response bottlenecks in high-throughput applications. |
| DC-DC Output | Step-up converter delivering 2.8–6.0 V from 3.3 V input; eliminates need for external boost IC and simplifies PCB layout in space-constrained designs. |
| Firmware Version | Pre-programmed with FW 3.2 including DPR (Dynamic Power Regulation), LFO timing calibration, and LPCD-with-Autocoll event support - enables secure crypto-assisted field updates via HDLL commands. |
| Operating Temp | -40 °C to +105 °C ambient (TX current = 120 mA @ VDDPA = 3.6 V) - qualified for industrial-grade embedded systems in uncontrolled environments. |
Pinout & Package
VFLGA40 package: very thin fine-pitch land grid array, 40 terminals, 0.4 mm pitch, 5 mm × 5 mm × 0.8 mm body, MSL=3, delivered in multiple trays (K suffix). Central heatsink must be connected to GND for thermal management.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ATX_A / ATX_B / ATX_C / ATX_D | SPI target interface | Full-duplex SPI signals (MOSI/MISO/SCK/NSS) with 15 Mbit/s capability - requires no level-shifting when interfaced with 3.3 V microcontrollers. |
| IRQ | Interrupt request output | Active-low open-drain signal notifying host of card detection, Autocoll completion, or error events - eliminates polling overhead and enables deterministic real-time response. |
| VDDPA / VUP_TX / TX1 / TX2 | Transmitter power and outputs | VDDPA supplies the TX_LDO; VUP_TX feeds the LDO input; TX1/TX2 drive differential antenna outputs - supports 50 Ω matching networks with optional balun integration. |
| RXP / RXN / VMID | Differential receiver inputs and symmetry point | RXP/RXN accept balanced antenna signals; VMID connects to antenna ground via 100 nF cap - ensures optimal common-mode rejection and EMI immunity. |
| VEN | Hardware reset input | Low-active asynchronous reset independent of VDDIO - guarantees reliable initialization during brown-out or power sequencing faults. |
| GPIO0–GPIO3 | General-purpose I/O | Configurable digital I/Os; GPIO3 reserved exclusively for ULPCD abort function when ULPCD is enabled - prevents accidental conflict with low-power state transitions. |
Key Features
| Feature | Design Value |
|---|---|
| Dynamic Power Control 2.0 | True transmitter current sensing with <1 ms regulation loop - maintains constant field strength across varying antenna loads without host CPU involvement. |
| Adaptive Waveshape Control | Real-time adjustment of TX driver output waveform - eliminates manual antenna tuning iterations and ensures ISO/IEC 14443-A/B spectral mask compliance under mechanical stress or temperature drift. |
| Ultra-Low-Power Card Detection | 22 µA average current at 330 ms polling interval - enables multi-month battery life in handheld readers while retaining fast wake-up (<100 µs) on card presence. |
| Integrated DC-DC Converter | 2.8–6.0 V step-up output synchronized to receiver clock - removes external boost IC, reduces BOM count by 3+ components, and avoids DC-DC-induced RF interference. |
| Firmware 3.2 Security | Crypto-assisted HDLL download with encrypted firmware update path - satisfies PCI PTS v6.0 and EMVCo Level 2 security requirements for payment terminal certification. |
Applications
| Payment Terminals | Physical Access Systems |
|---|---|
Use Scenario: Contactless payment processing in portable or countertop POS terminals operating on Li-ion or coin-cell batteries. IC Role / Device Role / Timing Role: NFC frontend handling all RF layer functions (modulation, demodulation, protocol framing) and autonomous DPC/AWC for EMVCo-compliant field stability. Use Value: Enables >10 cm read range and sub-100 ms transaction time while extending battery life to ≥6 months on 200 mAh cells via ULPCD and integrated DC-DC. | Use Scenario: Secure door entry readers deployed in office buildings, hotels, or government facilities requiring tamper-resistant credential validation. IC Role / Device Role / Timing Role: Reader/writer IC executing MIFARE DESFire EV2 and ISO/IEC 14443-B authentication sequences independently of host OS scheduling delays. Use Value: Guarantees deterministic <50 ms card response time under Linux/Android preemptive multitasking, eliminating missed swipes during high-traffic periods. |
| e-Government ID Readers | Industrial Asset Tagging |
Use Scenario: Field-deployable citizen ID verification devices used in remote registration centers or mobile service vans. IC Role / Device Role / Timing Role: High-reliability NFC frontend supporting ISO/IEC 14443-A card emulation mode (PICC) with active load modulation for extended communication range. Use Value: Achieves 7–9 cm read distance on national eID cards (e.g., German ePass, French Carte Vitale) without external PA, reducing system size and cost. | Use Scenario: Ruggedized handheld scanners for maintenance teams reading NFC tags on industrial machinery in electrically noisy factory environments. IC Role / Device Role / Timing Role: Robust receiver with automatic RF input attenuator and true Baseband Amplifier (BBA) - rejects EMI from motors, VFDs, and welding equipment. Use Value: Maintains >99.5% tag read success rate in 40 V/m conducted noise environments where legacy readers fail, verified per IEC 61000-4-3. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NFC frontend applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PN5180A1HN/C131K | Lower max transmit power (1.5 W vs. 2.3 W); no ULPCD mode; FW 2.07 preloaded; same VFLGA40 package. | Limited to mid-range payment terminals and access readers where >7 cm read distance is not required. | Select when cost sensitivity outweighs range and ultra-low-power needs - saves ~$0.45/unit but sacrifices EMVCo Level 1 margin and battery life. |
| ST25R3916B | Supports identical protocols but lacks integrated DC-DC and DPC2.0; 12 Mbit/s SPI; 35 µA ULPCD current; QFN32 package. | Better suited for compact consumer electronics (e.g., smart locks) where board area is critical and external boost is acceptable. | Choose for space-constrained designs needing pin count reduction - trades 13 µA higher ULPCD current and no autonomous DPC for 25% smaller footprint. |
Compared with PN5180A1HN/C131K and ST25R3916B, PN5190B2HN/C131K delivers superior RF performance headroom, autonomous low-power operation, and certified firmware - making it the only option qualified for EMVCo Level 1 and PCI PTS v6.0 payment terminal deployments requiring field stability and battery longevity.
Availability
PN5190B2HN/C131K is available at Aetrix Electronics and suitable for payment terminals, physical access systems, and e-government ID readers requiring stable component supply, long-term lifecycle support, and certified NFC functionality.
Supply support for PN5190B2HN/C131K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global leader in secure connectivity solutions for automotive, industrial, and IoT applications, with over 20 years of NFC innovation and 1.5 billion NFC chips shipped.
The PN5190 product line was designed specifically for high-reliability, high-power NFC reader applications demanding autonomous protocol execution, robust field control, and long-term security certification - targeting EMVCo, PCI PTS, and Common Criteria validated systems.
FAQ
What is the preloaded firmware version on PN5190B2HN/C131K?
The PN5190B2HN/C131K ships with firmware version 3.2 pre-programmed in ROM. This version includes Dynamic Power Regulation (DPR), LFO timing calibration for improved LPCD accuracy, and the LPCD_WITH_AUTOCOLL_EVENT feature (command 0x23, bControl = 0x13). Firmware updates are performed securely via crypto-assisted HDLL commands and cannot be downgraded to earlier versions.
Does PN5190B2HN/C131K support both ISO/IEC 14443-A and ISO/IEC 14443-B card reading?
Yes, PN5190B2HN/C131K supports full reader/writer mode for both ISO/IEC 14443-A and ISO/IEC 14443-B standards at data rates up to 848 kbit/s. It handles all required modulation schemes (ASK 100% for Type A, BPSK for Type B), anticollision, and protocol initialization autonomously - no host-side stack implementation is needed for basic card discovery and UID reading.
What is the difference between LPCD and ULPCD modes on PN5190B2HN/C131K?
PN5190B2HN/C131K offers two low-power detection modes: LPCD uses I/Q channel analysis for maximum detection range (>8 cm), while ULPCD uses amplitude-only sampling to achieve 22 µA average current at 330 ms polling intervals. ULPCD disables GPIO3 for other functions and cannot use the integrated DC-DC; LPCD allows full GPIO flexibility and DC-DC operation but consumes more current.
Can PN5190B2HN/C131K operate without an external crystal?
Yes, PN5190B2HN/C131K can operate without a 27.12 MHz crystal by using its internal PLL with an external 24 MHz, 32 MHz, or 48 MHz clock source - configured via EEPROM register CLK_INPUT_FREQ (0012h). This eliminates the crystal BOM item and reduces board area, though 27.12 MHz crystal operation provides optimal RF field accuracy and jitter performance.
Is PN5190B2HN/C131K pin-compatible with earlier PN5190B1 variants?
Yes, PN5190B2HN/C131K is electrically and mechanically pin-compatible with PN5190B1 in the same package (VFLGA40). The only differences are firmware-level: PN5190B2 includes ROM-resident enhancements to DPC2.0, AWC, and ULPCD algorithms, and supports encrypted firmware updates - no PCB or schematic changes are required for migration from B1 to B2.
PN5190B2HN/C131K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 40-VFLGA Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Type:
- RFID Reader/Transponder
- Frequency:
- 13.56MHz
- Standards:
- FeliCa, ISO 14443A, ISO 14443B, Mifare, NFC
- Interface:
- I2C, SPI, USB
- Voltage - Supply:
- 2.4V ~ 5.5V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-VFLGA (5x5)
PN5190B2HN/C131K FAQ
1.How can I place an order for PN5190B2HN/C131K through Aetrix?
Please submit a Request for Quotation (RFQ) for PN5190B2HN/C131K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PN5190B2HN/C131K reliable?
The price and inventory of PN5190B2HN/C131K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PN5190B2HN/C131K is usually 5 days.
3.What payment methods are accepted for PN5190B2HN/C131K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PN5190B2HN/C131K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PN5190B2HN/C131K?
PN5190B2HN/C131K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PN5190B2HN/C131K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PN5190B2HN/C131K?
For technical support, including PN5190B2HN/C131K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PN5190B2HN/C131K requirements.
6.How does Aetrix verify that PN5190B2HN/C131K is sourced from the original manufacturer or authorized distributors?
All PN5190B2HN/C131K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PN5190B2HN/C131K meets industry standards.
7.What is the process for return or replacement of PN5190B2HN/C131K?
All PN5190B2HN/C131K units undergo pre-shipment inspection (PSI). If there is an issue with PN5190B2HN/C131K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PN5190B2HN/C131K part is unused and in its original packaging.
Return procedure for PN5190B2HN/C131K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PN5190B2HN/C131K Tags
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