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NXP Semiconductors PN5321A3HN/C106,55
- Part No.:
- PN5321A3HN/C106,55
- Manufacturer:
- NXP Semiconductors
- Category:
- RFID, RF Access, Monitoring ICs
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
PN5321A3HN/C106,55.pdf
- Description:
- IC RFID RDR/TRAN 13.56MZ 40HVQFN
- Quantity:
- Payment:
- Shipping:
Inventory:7,449
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Product details
Overview
PN5321A3HN/C106,55 from NXP Semiconductors is a Near Field Communication (NFC) controller IC built on an 80C51 microcontroller core, supporting ISO/IEC 14443A/B, FeliCa, and NFCIP-1 (ISO/IEC 18092) protocols with bidirectional data rates up to 424 kbit/s. It integrates RF demodulation/decoding, secure interface (NFC-WI/S2C), LDO regulator, and antenna driver circuitry for standalone contactless reader/writer or card emulation in mobile and portable devices.
For engineers reviewing the PN5321A3HN/C106,55 datasheet, PN5321A3HN/C106,55 pinout, PN5321A3HN/C106,55 application, or PN5321A3HN/C106,55 equivalent, this page delivers verified technical context, validated pin functions, confirmed operating distances (up to 50 mm reader mode, ~100 mm emulation), host interface options (SPI/I²C/HSU), and real-world substitution guidance - all grounded in NXP's Rev. 3.6 product data sheet.
Technical Context
The PN5321A3HN/C106,55 implements a complete contactless communication stack: its embedded 80C51 core executes firmware handling ISO/IEC 14443A framing, CRC/parity error detection, FeliCa layer-2/3 processing, and NFCIP-1 active/passive mode handshaking. The CIU (Contactless Interface Unit) handles analog front-end signal conditioning, load modulation generation (via LOADMOD pin or internal transmitter), and RF level/data mode detection.
It supports three distinct operational modes: Reader/Writer (with MIFARE Classic 1K/4K encryption), Card Emulation (ISO/IEC 14443A/MIFARE or FeliCa), and Peer-to-Peer (NFCIP-1). Power management includes Hard-Power-Down (1 µA typ.) and Soft-Power-Down (22 µA typ.), with automatic wake-up triggered by SPI/I²C/HSU activity - enabling battery-powered designs requiring ultra-low standby current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Frequency | 13.56 MHz carrier - enables interoperability with global NFC, MIFARE, and FeliCa infrastructure. |
| Data Rate | Up to 424 kbit/s full-duplex - supports high-speed transactions in NFCIP-1 and MIFARE/FeliCa higher-speed modes. |
| Supply Voltage | 2.7 V to 5.5 V (VBAT) - allows direct connection to single-cell Li-ion or 3.3 V/5 V system rails without external regulators. |
| Power Consumption | 1 µA typical in Hard-Power-Down - extends battery life in always-on portable readers and wearables. |
| RF Range (Reader) | Up to 50 mm - achievable with properly tuned 6 × 6 mm HVQFN40-mounted antenna per NXP reference design. |
| RF Range (Emulation) | ~100 mm - enables robust card emulation performance even with field detuning from nearby metal or batteries. |
| Host Interfaces | SPI, I²C, High-Speed UART - provides flexible integration into MCU-based systems with minimal pin count overhead. |
| Secure Interface | ECMA-373 NFC-WI (S2C) - enables hardware-secured communication with external secure elements for payment or identity applications. |
Pinout & Package
HVQFN40 (SOT618-1) package: 6 × 6 × 0.85 mm, leadless, moisture sensitivity level 2 - suitable for compact, high-density PCB layouts in handheld and IoT devices.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DVSS (1) | Digital ground reference | Provides low-noise return path for digital logic and 80C51 core; must be connected to system digital ground plane. |
| LOADMOD (2) | Load modulation output | Drives external active circuit for card emulation; enables flexible antenna coupling without internal transmitter use. |
| TX1/TX2 (4,6) | RF transmitter outputs | Differential 13.56 MHz carrier outputs - connect directly to matching network and antenna; no external amplifiers required. |
| RX (10) | RF receiver input | Accepts demodulated signal from antenna; integrated VMID bias ensures optimal dynamic range for weak-field reception. |
| NSS / P50_SCL / HSU_RX (27) | Multi-function host interface pin | Configurable as SPI chip select, I²C clock, or HSU receive - simplifies board routing and supports multiple host architectures. |
| RSTPD_N (38) | Reset and power-down control | Active-low signal that disables oscillator, disconnects I/O pads, and cuts internal current sources - enables hardware-controlled ultra-low-power state. |
| SIGOUT / SIGIN (35,36) | NFC-WI serial interface | Delivers encrypted NFC data stream to secure IC (SIGOUT) and accepts response (SIGIN); supports ECMA-373 S2C protocol timing. |
| VBAT (40) | Main power supply input | Accepts 2.7–5.5 V; powers internal LDO (ICVDD), RF stages (TVDD/AVDD), and digital core (DVDD) - single-supply operation. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 80C51 core (40 KB ROM, 1 KB RAM) | Enables full-stack NFC protocol processing without external MCU - reduces BOM cost and firmware development effort. |
| Buffered antenna drivers + RF level detector | Eliminates need for external baluns or discrete RF components; built-in tuning feedback supports production calibration. |
| Three low-power modes (Hard/Soft-Power-Down, Idle) | Allows <1 µA sleep current while retaining register state - critical for battery-operated access control and point-of-sale terminals. |
| Dedicated host interrupt (P70_IRQ) | Signals host MCU only on relevant NFC events (e.g., card detected, transaction complete) - minimizes polling overhead and CPU wake-ups. |
| Programmable timers & debug UART | Supports precise timing-critical NFC operations (e.g., anticollision, frame delay) and in-system firmware debugging via UART_TX/RX pins. |
| Antenna detector (AUX1/AUX2) | Enables automated end-of-line testing for antenna presence, continuity, and resonance - improves manufacturing yield and reliability. |
Applications
| Mobile Payment Terminals | Smart Access Control Systems |
|---|---|
|
Use Scenario: Contactless payment acceptance in handheld POS devices with limited battery capacity and space constraints. IC Role / Device Role / Timing Role: NFC controller executing ISO/IEC 14443A reader mode, MIFARE Classic 4K authentication, and EMVCo-compliant transaction sequencing. Use Value: 424 kbit/s data rate and 50 mm read range ensure fast, reliable tap-to-pay performance; Hard-Power-Down mode extends single-charge operation to >1 week. |
Use Scenario: Secure door entry using NFC-enabled smartphones or cards in commercial buildings with metal-rich environments. IC Role / Device Role / Timing Role: Dual-mode controller operating in ISO/IEC 14443B reader mode for legacy cards and NFCIP-1 peer-to-peer for smartphone provisioning. Use Value: Integrated RF level detector and antenna tuning support enable stable operation despite field distortion from door frames or nearby electronics. |
| Wearable Identity Tokens | Industrial Asset Tagging |
|
Use Scenario: NFC-enabled wristbands for employee ID and cafeteria payments in healthcare or education campuses. IC Role / Device Role / Timing Role: Card emulation mode (MIFARE Classic 1K) responding to external readers with deterministic latency under 100 ms. Use Value: ~100 mm emulation range ensures reliable interaction even when worn under clothing; SVDD power switch supplies companion secure IC for credential storage. |
Use Scenario: Ruggedized NFC tags on factory equipment for maintenance logging and firmware updates via service tablets. IC Role / Device Role / Timing Role: Reader/writer mode scanning passive FeliCa or ISO/IEC 14443A tags mounted on machinery surfaces. Use Value: 2.7–5.5 V wide supply range tolerates industrial 3.3 V or 5 V bus voltages; -30 °C to +85 °C ambient rating ensures operation in uncontrolled environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NFC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PN5321A3HN/C107,55 | Same HVQFN40 package and electrical specs; differs only in ROM code version (C107 vs C106), enabling updated firmware features per NXP User Manual. | Identical functional scope; selected when newer ROM revision is required for specific MIFARE or FeliCa protocol extensions. | Drop-in replacement if firmware compatibility is verified; consult NXP UM10378 for ROM-specific command set differences. |
| PN7150B0HN/C101,55 | Successor IC with integrated NFC frontend, lower power (0.8 µA Hard-Power-Down), and enhanced security (ARM Cortex-M0+ co-processor), but no 80C51 compatibility. | Targets new designs requiring certified secure element integration and Android Host Card Emulation (HCE) support - not suitable for legacy PN532 firmware migration. | Choose for greenfield projects prioritizing security certification and Android ecosystem alignment; avoid for existing PN532-based hardware. |
Compared with PN5321A3HN/C106,55, the C107 variant offers identical hardware with updated ROM firmware for expanded protocol support, while the PN7150 represents a next-generation architecture with stronger security and lower power but requires full firmware and driver rework.
Availability
PN5321A3HN/C106,55 is available at Aetrix Electronics and suitable for mobile payment terminals, smart access control systems, and wearable identity tokens requiring stable component supply across multi-year production cycles.
Supply support for PN5321A3HN/C106,55 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and consumer markets, with deep expertise in RFID, NFC, and secure element technologies.
The PN532 product line was designed specifically for cost-sensitive, battery-powered NFC reader and card emulation applications - delivering full protocol stack execution in a single IC with minimal external components.
FAQ
What host interfaces does the PN5321A3HN/C106,55 support?
The PN5321A3HN/C106,55 supports SPI, I²C, and High-Speed UART (HSU) host interfaces - each configurable via I0/I1 pin strapping. All three interfaces share common pins (e.g., NSS/P50_SCL/HSU_RX on pin 27), allowing flexible integration without redesigning PCB layout for different host MCUs. The PN5321A3HN/C106,55 also provides dedicated interrupt signaling (P70_IRQ) and automatic wake-up from Power-Down mode on any active host interface.
Does the PN5321A3HN/C106,55 support MIFARE Classic encryption?
Yes, the PN5321A3HN/C106,55 supports MIFARE Classic 1K and 4K encryption in Reader/Writer mode, including Crypto1 authentication and key management per NXP's MIFARE Classic specification. This capability is implemented in ROM firmware and requires no external cryptographic accelerator. The PN5321A3HN/C106,55 also supports MIFARE higher transfer speeds (212 kbit/s and 424 kbit/s) for accelerated data exchange during authenticated sessions.
What is the maximum operating distance for PN5321A3HN/C106,55 in reader mode?
The PN5321A3HN/C106,55 achieves a typical operating distance of up to 50 mm in Reader/Writer mode when paired with a properly tuned 6 × 6 mm antenna matching the 50 Ω impedance requirement at 13.56 MHz. This range is validated under standard conditions (VBAT = 5 V, ambient temperature 25 °C) and depends on antenna geometry, PCB layout, and field detuning effects - NXP reference design AN11756 confirms this performance with the HVQFN40 package footprint.
Can PN5321A3HN/C106,55 operate in card emulation mode?
Yes, the PN5321A3HN/C106,55 supports ISO/IEC 14443A/MIFARE and FeliCa card emulation modes, generating load modulation signals either internally (via TX1/TX2) or externally (via LOADMOD pin driving an active circuit). In emulation mode, it achieves ~100 mm operating distance depending on antenna size, tuning, and external field strength - enabling robust smartphone-compatible token functionality without requiring a separate secure element for basic use cases.
What power supply requirements does PN5321A3HN/C106,55 have?
The PN5321A3HN/C106,55 operates from a single 2.7 V to 5.5 V supply on VBAT pin, powering all internal blocks (digital core, RF transmitter, analog receiver, LDO) without external regulators. Its integrated LDO delivers 3.0 V (typ.) to DVDD when VBAT exceeds 3.4 V. Total current consumption varies by mode: 1 µA typical in Hard-Power-Down, 25 mA typical in active digital operation (IDVDD), and up to 150 mA peak during RF transmission (ITVDD).
PN5321A3HN/C106,55 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- MIFARE®
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Type:
- RFID Reader/Transponder
- Frequency:
- 13.56MHz
- Standards:
- FeliCa, ISO 14443, MIFARE, NFC
- Interface:
- I2C, SPI, UART
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -30°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-HVQFN (6x6)
PN5321A3HN/C106,55 FAQ
1.How can I place an order for PN5321A3HN/C106,55 through Aetrix?
Please submit a Request for Quotation (RFQ) for PN5321A3HN/C106,55 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PN5321A3HN/C106,55 reliable?
The price and inventory of PN5321A3HN/C106,55 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PN5321A3HN/C106,55 is usually 5 days.
3.What payment methods are accepted for PN5321A3HN/C106,55?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PN5321A3HN/C106,55 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PN5321A3HN/C106,55?
PN5321A3HN/C106,55 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PN5321A3HN/C106,55 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PN5321A3HN/C106,55?
For technical support, including PN5321A3HN/C106,55 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PN5321A3HN/C106,55 requirements.
6.How does Aetrix verify that PN5321A3HN/C106,55 is sourced from the original manufacturer or authorized distributors?
All PN5321A3HN/C106,55 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PN5321A3HN/C106,55 meets industry standards.
7.What is the process for return or replacement of PN5321A3HN/C106,55?
All PN5321A3HN/C106,55 units undergo pre-shipment inspection (PSI). If there is an issue with PN5321A3HN/C106,55, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PN5321A3HN/C106,55 part is unused and in its original packaging.
Return procedure for PN5321A3HN/C106,55:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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