My Inquiry
My Account
NXP Semiconductors PN7362AUHN/C300E
- Part No.:
- PN7362AUHN/C300E
- Manufacturer:
- NXP Semiconductors
- Category:
- RFID, RF Access, Monitoring ICs
- Package:
- 64-VFQFN Dual Rows, Exposed Pad
- Datasheet:
-
PN7362AUHN/C300E.pdf
- Description:
- IC RFID RDR/TRAN 13.56MZ 64HVQFN
- Quantity:
- Payment:
- Shipping:
Inventory:259
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PN7362AUHN from NXP Semiconductors is a 32-bit Arm Cortex-M0 NFC microcontroller with integrated contactless frontend, 160 kB Flash, 12 kB SRAM, and HVQFN64 package. It operates at up to 20 MHz, supports ISO/IEC 14443 A/B, NFC Forum Types 1–5, P2P, and card emulation at 13.56 MHz - enabling EMV-compliant contactless payment readers and secure access terminals.
For engineers reviewing the PN7362AUHN datasheet, PN7362AUHN pinout, PN7362AUHN application, or PN7362AUHN equivalent, this page delivers verified specifications, validated pin functions, confirmed use cases in physical access and USB NFC readers, and two technically documented alternative parts for dual-interface or memory-constrained designs.
Technical Context
The PN7362AUHN implements a dedicated high-power NFC frontend with Adaptive Wave Control (AWC), Dynamic Power Control (DPC), and integrated TX LDO (configurable 3–4.75 V) - enabling robust 13.56 MHz field generation without external active components. Its Arm Cortex-M0 core runs at up to 20 MHz with 40 kB boot ROM containing USB mass storage primary boot loader.
Unlike PN7462AUHN, PN7362AUHN omits both contact smart card interface (ISO/IEC 7816 UART) and auxiliary I/O for slot extenders. It retains full host interfaces: USB 2.0 full-speed, HSUART (up to 1.288 Mbit/s), SPI (7 Mbit/s), and I²C (high-speed mode), alongside four general-purpose timers and CRC coprocessor.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M0, 32-bit, up to 20 MHz - enables deterministic real-time NFC protocol stack execution with low power consumption. |
| Memory | 160 kB Flash + 12 kB SRAM + 4 kB EEPROM - sufficient for full NFC Forum tag emulation, P2P, and card emulation firmware plus user application code. |
| Contactless Interface | ISO/IEC 14443 A/B, NFC IP1/IP2, Types 1–5, P2P initiator/target, EMV contactless compliant - supports certified payment and transit applications without RF tuning components. |
| Host Interfaces | USB 2.0 full-speed, HSUART (1.288 Mbit/s), SPI (7 Mbit/s), I²C (high-speed mode) - enables direct connection to host processors or PC via USB CDC/ACM or serial bridge. |
| Package & Temp | HVQFN64 (9 × 9 × 0.85 mm), -40 °C to +85 °C - surface-mount compatible with industrial reader PCBs requiring thermal reliability and compact footprint. |
| Power Supply | VDDP(VBUS): 2.7–5.5 V; PVDD_IN: 3.0–3.6 V (if USB used); TX LDO configurable 3.0/3.3/3.6/4.5/4.75 V - supports flexible power architecture with internal regulation for antenna and digital domains. |
| Low-Power Modes | Standby (18–55 µA), hard power-down (12 µA), suspend (120–250 µA) - extends battery life in portable NFC readers and IoT edge devices. |
Pinout & Package
HVQFN64 package (SOT804-4), 9 mm × 9 mm × 0.85 mm body, thermally enhanced, leadless, with exposed die pad connected to GND. Pin 1 index located at top-left corner; pins numbered counterclockwise.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ANT1 / ANT2 | NFC antenna differential output | Direct connection points for 13.56 MHz LC tank; support load modulation in card emulation and P2P passive target modes. |
| TVDD_IN / TVDD_OUT | Antenna driver supply input/output | TVDD_IN accepts 3–5.5 V input; TVDD_OUT delivers regulated output from integrated TX LDO for antenna power stage. |
| RXN / RXP / VMID | Contactless receiver inputs | Differential receiver pair with mid-point reference - enables high-sensitivity demodulation of weak tag responses. |
| VBUS / VDD / DVDD / PVDD_IN | Main, digital core, and pad supply rails | VBUS powers MCU core; VDD = 1.8 V regulator output; DVDD = digital logic supply; PVDD_IN powers I/O pads and master interfaces. |
| SWDIO / SWDCLK | Serial Wire Debug interface | Two-pin debug port supporting firmware download, real-time trace, and boundary scan - essential for NFC stack development and certification testing. |
| USB D+/D− (ATX_C / ATX_D) | USB 2.0 full-speed differential pair | Integrated PHY with on-chip termination - enables plug-and-play USB NFC reader operation without external transceiver. |
| XTAL1 / XTAL2 | 27.12 MHz crystal oscillator inputs | Drives internal PLL for precise 13.56 MHz RF carrier generation and USB clock synchronization - eliminates need for separate RF crystal. |
Key Features
| Feature | Design Value |
|---|---|
| EMV Contactless Compliant Frontend | Integrated high-power NFC IC with Adaptive Range Control (ARC) and Dynamic Power Control (DPC) - achieves >50 mm read range and passes EMVCo Level 1 RF conformance without external amplifiers or matching networks. |
| On-Chip Boot ROM | 40 kB ROM with USB mass storage primary boot loader - allows firmware updates via standard USB drive enumeration, eliminating need for dedicated programming hardware. |
| Hardware Security Accelerators | CRC coprocessor and true random number generator (TRNG) - offloads cryptographic checksum calculation and key generation for secure NFC transactions and firmware signing. |
| Multi-Protocol NFC Support | Full NFC Forum tag types (1–5), ISO/IEC 15693, ISO/IEC 18000-3 Mode 3, MIFARE Crypto1 - enables interoperability with legacy and next-gen tags across retail, logistics, and identity applications. |
| Configurable TX LDO | Programmable output voltage (3.0/3.3/3.6/4.5/4.75 V) - optimizes RF output power and antenna efficiency across varying coil geometries and regulatory limits (e.g., FCC Part 15 vs. ETSI EN 300 330). |
Applications
| USB NFC Reader | Secure Physical Access Terminal |
|---|---|
|
Use Scenario: Desktop or kiosk-based NFC reader connecting to host PC via USB for credential verification, ticketing, or loyalty scanning. IC Role / Device Role / Timing Role: Standalone NFC controller executing ISO/IEC 14443-A/B and NFC Forum protocols; USB interface handles host communication and power delivery. Use Value: Eliminates external NFC transceiver and microcontroller - reduces BOM cost by 30% and PCB area by 45% versus discrete solutions. |
Use Scenario: Wall-mounted door access panel reading employee badges or mobile credentials in office buildings or data centers. IC Role / Device Role / Timing Role: Real-time NFC initiator with low-latency response (<100 ms) to tag presence; integrated security accelerators enable encrypted challenge-response authentication. Use Value: Meets ISO/IEC 15693 anti-collision and EMV contactless timing requirements while operating reliably at -40 °C to +85 °C ambient. |
| Industrial Asset Tag Reader | IoT Edge NFC Configurator |
|
Use Scenario: Handheld tool or fixed gateway reading NFC tags on machinery, valves, or calibration equipment for maintenance logging and firmware version tracking. IC Role / Device Role / Timing Role: NFC target emulator and initiator supporting ISO/IEC 15693 and Type 5 tags; SPI/HSUART interfaces connect to local MCU or wireless module. Use Value: Enables offline tag interrogation without smartphone dependency; 12 kB SRAM buffers multi-record NDEF messages for batch upload over LoRaWAN or NB-IoT. |
Use Scenario: Smart sensor node with NFC interface for secure, touch-based configuration of Wi-Fi credentials, OTA update keys, or sensor calibration parameters. IC Role / Device Role / Timing Role: Passive NFC target emulating Type 4A tag; uses internal EEPROM to store configuration data accessible via Android HCE or iOS CoreNFC. Use Value: Avoids insecure QR-code or Bluetooth pairing; leverages PN7362AUHN's 4 kB EEPROM for tamper-resistant parameter storage with write-protection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NFC microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PN7462AUHN | Includes ISO/IEC 7816-3&4 UART contact interface and auxiliary I/O for TDA8026 slot extension; same 160 kB Flash, HVQFN64 package. | Required for dual-interface (contact + contactless) smart card readers; adds ~0.5 mm height due to contact interface circuitry. | Select when building EMVCo-certified payment terminals needing both NFC and physical card swipe capability. |
| PN7360AUHN | Same HVQFN64 package and contactless features, but reduced 80 kB Flash and no ISO/IEC 7816 UART - otherwise identical peripheral set and pinout. | Suitable for cost-sensitive NFC readers where firmware footprint <80 kB (e.g., basic Type 2 tag reader only). | Choose for simplified NFC applications with constrained memory budget; maintains PCB layout compatibility with PN7362AUHN. |
Compared with PN7462AUHN, PN7362AUHN removes contact interface overhead to reduce power and complexity for pure contactless use; compared with PN7360AUHN, it doubles Flash for advanced NFC stack features like secure element emulation or multi-protocol middleware.
Availability
PN7362AUHN is available at Aetrix Electronics and suitable for USB NFC readers, secure physical access terminals, and industrial asset tag readers requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.
Supply support for PN7362AUHN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in NFC, RFID, and secure microcontrollers.
PN7362AUHN belongs to the PN7462 family of NFC microcontrollers designed specifically for single-chip, EMV-compliant contactless reader applications - prioritizing RF performance, firmware flexibility, and integration density over contact interface capability.
FAQ
What is the maximum RF output power supported by PN7362AUHN?
PN7362AUHN supports up to 250 mA antenna supply current (IDD(TVDD)) and integrates a configurable TX LDO (3.0–4.75 V). Its high-power NFC frontend delivers field strength compliant with EMV contactless Level 1 requirements - typically enabling >50 mm read range with standard 10 cm² antenna coils under FCC/ETSI limits. Actual output power depends on antenna design and LDO voltage selection.
Does PN7362AUHN support ISO/IEC 7816 contact smart card interface?
No, PN7362AUHN does not include the ISO/IEC 7816-3&4 UART contact interface. This feature is present in PN7462AUHN and PN7412AUHN but explicitly omitted in PN7362AUHN per Table 1 and Ordering Information. It is a contactless-only NFC microcontroller optimized for pure RFID/NFC reader applications.
Which crystal frequency is required for PN7362AUHN operation?
PN7362AUHN requires a 27.12 MHz fundamental-mode crystal connected to XTAL1 and XTAL2 pins. This frequency drives the internal PLL to generate both the precise 13.56 MHz RF carrier and the 48 MHz USB clock - eliminating need for separate crystals and ensuring phase coherence between NFC and USB timing domains.
Can PN7362AUHN be programmed via USB without external debugger?
Yes, PN7362AUHN includes 40 kB boot ROM with USB mass storage class (MSC) primary boot loader. When held in download mode (DWL_REQ asserted), it enumerates as a USB flash drive - allowing drag-and-drop firmware updates without JTAG/SWD hardware. Full debug still requires SWDIO/SWDCLK pins.
What are the key differences between PN7362AUHN and PN7360AUHN?
PN7362AUHN and PN7360AUHN share identical HVQFN64 package, contactless features, and peripheral set, but PN7362AUHN has 160 kB Flash versus 80 kB in PN7360AUHN. Both lack contact interface and ISO/IEC 7816 UART. The doubled Flash enables complex NFC stacks, secure element emulation, or multi-application firmware on PN7362AUHN.
PN7362AUHN/C300E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 64-VFQFN Dual Rows, Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Type:
- RFID Reader/Transponder
- Frequency:
- 13.56MHz
- Standards:
- FeliCa, ISO 14443, ISO 15693, ISO 18000, MIFARE, NFC
- Interface:
- I2C, SPI, UART, USB
- Voltage - Supply:
- 1.65V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-HVQFN (9x9)
PN7362AUHN/C300E FAQ
1.How can I place an order for PN7362AUHN/C300E through Aetrix?
Please submit a Request for Quotation (RFQ) for PN7362AUHN/C300E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PN7362AUHN/C300E reliable?
The price and inventory of PN7362AUHN/C300E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PN7362AUHN/C300E is usually 5 days.
3.What payment methods are accepted for PN7362AUHN/C300E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PN7362AUHN/C300E transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PN7362AUHN/C300E?
PN7362AUHN/C300E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PN7362AUHN/C300E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PN7362AUHN/C300E?
For technical support, including PN7362AUHN/C300E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PN7362AUHN/C300E requirements.
6.How does Aetrix verify that PN7362AUHN/C300E is sourced from the original manufacturer or authorized distributors?
All PN7362AUHN/C300E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PN7362AUHN/C300E meets industry standards.
7.What is the process for return or replacement of PN7362AUHN/C300E?
All PN7362AUHN/C300E units undergo pre-shipment inspection (PSI). If there is an issue with PN7362AUHN/C300E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PN7362AUHN/C300E part is unused and in its original packaging.
Return procedure for PN7362AUHN/C300E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PN7362AUHN/C300E Tags
-
SL2S2602FTBX
NXP Semiconductors
-
ST25DV04K-IER6S3
STMicroelectronics
-
ST25DV04K-IER6C3
STMicroelectronics
-
LXMSJZNCMD-217
Murata Electronics
-
NT3H2111W0FTTJ
NXP Semiconductors
-
NT3H2111W0FHKH
NXP Semiconductors
-
M24LR04E-RMC6T/2
STMicroelectronics
-
ST25DV04KC-JF6D3
STMicroelectronics
-
ST25DV64KC-IE6S3
STMicroelectronics
-
ST25DV64K-IER6T3
STMicroelectronics
-
NT3H2211W0FTTJ
NXP Semiconductors
-
NT3H2211W0FHKH
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
