Vishay General Semiconductor - Diodes Division SAC5.0-E3/54
- Part No.:
- SAC5.0-E3/54
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- DO-204AC, DO-15, Axial
- Datasheet:
-
SAC5.0-E3/54.pdf
- Description:
- TVS DIODE 5VWM 10VC DO204AC
- Quantity:
- Payment:

- Shipping:

Inventory:653
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Product details
Overview
SAC5.0-E3/54 from Vishay General Semiconductor is a unidirectional low-capacitance TRANSZORB® transient voltage suppressor diode in DO-15 package, rated for 5.0 V working voltage, 7.6 V minimum breakdown voltage at 1.0 mA, 10.0 V maximum clamping voltage at 5.0 A, 500 W peak pulse power (10/1000 µs), and 175 °C max junction temperature - used to protect ICs and MOSFETs against inductive switching transients in industrial sensor signal lines.
For engineers reviewing the SAC5.0-E3/54 datasheet, SAC5.0-E3/54 pinout, SAC5.0-E3/54 application, or SAC5.0-E3/54 equivalent, key selection criteria include clamping voltage at rated IPP, reverse leakage at VWM, junction capacitance, thermal derating above 25 °C, and DO-15 lead-form compatibility with automated PCB assembly.
Technical Context
The SAC5.0-E3/54 employs a glass-passivated silicon junction optimized for fast response to ESD and surge events, with low incremental surge resistance enabling tight clamping under 5.0 A 10/1000 µs pulses. Its unidirectional polarity (cathode marked by color band) supports DC-biased protection paths without AC coupling constraints.
Designed for repetitive surge duty cycles up to 0.01 %, it operates across -55 °C to +175 °C junction temperature range and dissipates 3.0 W on infinite heatsink at TL = 75 °C. The device meets JESD 22-B106 solder dip requirements (275 °C, 10 s) and JESD 201 Class 1A whisker testing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VWM | 5.0 V - Maximum continuous reverse voltage before significant leakage; sets upper limit for DC bias in protected line. |
| VBR (min) | 7.6 V at IT = 1.0 mA - Ensures reliable turn-on above normal operating voltage while avoiding false triggering. |
| VC (max) | 10.0 V at IPP = 5.0 A - Clamped voltage seen by downstream circuitry during 10/1000 µs surge; defines worst-case stress level. |
| PPPM | 500 W - Peak pulse power handling capability per standard 10/1000 µs waveform; determines survivability of common lightning/surge events. |
| Junction Capacitance | 50 pF at 0 V - Low enough to avoid signal integrity degradation on high-speed data lines (e.g., RS-485, CAN, USB). |
| ID (max) | 300 µA at VWM - Reverse leakage current that minimally loads source impedance in standby mode. |
| TJ max | +175 °C - Enables operation in high-temperature industrial enclosures without thermal shutdown or parameter drift. |
Pinout & Package
Package: DO-15 (DO-204AC), axial-leaded, epoxy-molded, UL 94 V-0 rated, matte tin-plated leads compliant with J-STD-002 and JESD 22-B102. Cathode indicated by color band.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode | Connected to protected line ground or lower-potential rail | Completes conduction path during reverse surge; must be routed with low-inductance trace to minimize clamping overshoot. |
| Cathode | Connected to protected signal or power line | Marked by color band; accepts transient energy and clamps voltage relative to anode reference. |
Key Features
| Feature | Design Value |
|---|---|
| Glass passivated chip junction | Enables stable, repeatable breakdown characteristics over lifetime and temperature, critical for long-term reliability in industrial environments. |
| 500 W peak pulse power (10/1000 µs) | Withstands IEC 61000-4-5 Level 3 (1 kV line-to-line, 2 kV line-to-ground) surges without degradation when properly mounted. |
| Low incremental surge resistance | Minimizes voltage overshoot during fast-rising transients (<1 ns), improving clamping precision beyond nominal VC spec. |
| 10/1000 µs waveform compliance | Validated for telecom and industrial surge immunity standards requiring long-duration energy absorption, not just ESD. |
| DO-15 mechanical robustness | Supports wave and reflow soldering per JESD 22-B106; lead form accommodates standard axial tape-and-reel automation (E3/54 = 4000 pcs/reel). |
Applications
| Industrial Sensor Signal Protection | DC Power Rail Clamp |
|---|---|
Use Scenario: Protecting analog output lines (e.g., 4–20 mA, 0–10 V) of pressure/temperature sensors from relay coil flyback and motor drive noise. IC Role / Device Role / Timing Role: Unidirectional TVS placed between signal line and local ground, absorbing positive-going transients only. Use Value: Limits clamped voltage to ≤10.0 V, preventing damage to 12 V-tolerant ADC inputs and op-amp buffers without adding series resistance. | Use Scenario: Safeguarding 5 V microcontroller supply rails against load dump and hot-swap inverter spikes in programmable logic controllers. IC Role / Device Role / Timing Role: Standoff-rated clamp connected between VCC and GND, conducting only when rail exceeds 7.6 V. Use Value: Maintains 5.0 V nominal operation while suppressing >100 V spikes within 1 ns, preserving MCU reset integrity and flash memory retention. |
| Automotive Body Control Module Inputs | RS-485 Data Line Surge Suppression |
Use Scenario: Shielding LIN bus or switch inputs in BCMs exposed to battery disconnect transients and alternator load dump. IC Role / Device Role / Timing Role: Unidirectional transient suppressor tied to input pin and chassis ground, leveraging DO-15 axial form factor for high-voltage creepage. Use Value: Withstands 500 W surges per ISO 7637-2 Pulse 1/2a while maintaining <300 µA leakage at 5 V, minimizing quiescent current draw. | Use Scenario: Protecting half-duplex RS-485 transceivers (e.g., MAX13487) on factory floor networks subject to ground potential differences and lightning-induced surges. IC Role / Device Role / Timing Role: Paired unidirectional SAC5.0-E3/54 units (anode-to-anode) across differential pair for bidirectional clamping. Use Value: 50 pF junction capacitance avoids signal edge distortion at 10 Mbps, while 10.0 V clamping prevents transceiver latch-up during 1 kV EFT bursts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMBJ5.0A-E3/52 (Vishay) | DO-214AA package; 600 W PPPM; 12.5 V VC at 5.0 A; 100 pF CJ | Higher clamping voltage and capacitance; suited for less sensitive circuits with larger layout margins. | Select when higher surge margin is needed and board space allows SMC footprint; not drop-in due to different package and thermal profile. |
| P6KE5.0A (ON Semiconductor) | DO-15 package; 600 W PPPM; 13.4 V VC at 5.0 A; 1500 pF CJ | Significantly higher junction capacitance limits use to low-frequency power rails only. | Choose only for cost-sensitive, non-high-speed applications where 10.0 V clamping and 50 pF are not required. |
Compared with SMBJ5.0A-E3/52 and P6KE5.0A, SAC5.0-E3/54 delivers tighter clamping (10.0 V vs. ≥12.5 V) and lower capacitance (50 pF vs. ≥100 pF), making it preferable for protecting high-impedance, high-speed nodes - but requires verification of DO-15 lead spacing and thermal relief in PCB layout.
Availability
SAC5.0-E3/54 is available at Aetrix Electronics and suitable for industrial sensor interfaces, DC power rail clamping, and RS-485 data line protection requiring stable component supply across extended production lifecycles.
Supply support for SAC5.0-E3/54 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay General Semiconductor is a global leader in discrete semiconductors, specializing in diodes, rectifiers, and protection devices with emphasis on reliability, thermal performance, and automotive-grade qualification.
The SAC series was developed specifically for low-capacitance, high-energy transient suppression in industrial and automotive signal and power lines - balancing clamping precision, surge endurance, and manufacturability in axial packages.
FAQ
What is the maximum clamping voltage of SAC5.0-E3/54 at 5.0 A?
The SAC5.0-E3/54 has a maximum clamping voltage (VC) of 10.0 V when subjected to a 10/1000 µs surge current of 5.0 A. This value is measured under standardized test conditions and defines the peak voltage imposed on protected circuitry during such an event. It is a key parameter for ensuring downstream components like microcontrollers or transceivers remain within safe operating limits. The SAC5.0-E3/54 achieves this clamping performance while maintaining low incremental surge resistance.
Is SAC5.0-E3/54 unidirectional or bidirectional?
SAC5.0-E3/54 is a unidirectional transient voltage suppressor, meaning it conducts only when the cathode is at a higher potential than the anode - protecting against positive-going transients on DC-biased lines. Its polarity is marked by a color band on the cathode end. For AC or bidirectional signal lines, two SAC5.0-E3/54 devices must be connected anode-to-anode. This configuration is explicitly recommended in the Vishay application note for AC line protection.
What is the junction capacitance of SAC5.0-E3/54 and why does it matter?
The SAC5.0-E3/54 has a maximum junction capacitance of 50 pF at 0 V, which is critical for preserving signal integrity on high-speed or high-impedance lines such as RS-485, CAN, or analog sensor outputs. Lower capacitance reduces loading effects and edge distortion, especially above 1 MHz. At 50 pF, SAC5.0-E3/54 enables reliable protection without requiring additional series impedance or bandwidth compensation - unlike higher-capacitance alternatives like P6KE5.0A (1500 pF).
Can SAC5.0-E3/54 be used in automotive applications?
Yes, SAC5.0-E3/54 is suitable for automotive body electronics applications including LIN bus inputs, switch monitoring, and BCM power rail clamping, provided system-level testing confirms compliance with ISO 7637-2 Pulse 1 and Pulse 2a requirements. Its 175 °C max junction temperature, DO-15 mechanical robustness, and 500 W surge rating meet typical under-hood environmental demands. However, AEC-Q200 qualification is not claimed for this commercial-grade variant (E3 suffix), so design-in requires customer validation.
What does the "E3/54" suffix mean in SAC5.0-E3/54?
The "E3" suffix indicates RoHS-compliant, commercial-grade construction with matte tin-plated leads qualified to JESD 201 Class 1A whisker testing. The "/54" denotes the preferred package code for 13-inch diameter paper tape and reel packaging, with a base quantity of 4000 pieces per reel. This format supports automated pick-and-place assembly and is documented in Vishay's ordering information table for the SAC5.0-E3/54 part number.
SAC5.0-E3/54 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- DO-204AC, DO-15, Axial
- Series:
- TransZorb®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V
- Voltage - Breakdown (Min):
- 7.6V
- Voltage - Clamping (Max) @ Ipp:
- 10V
- Current - Peak Pulse (10/1000µs):
- 44A
- Power - Peak Pulse:
- 500W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- DO-204AC (DO-15)
SAC5.0-E3/54 FAQ
1.How can I place an order for SAC5.0-E3/54 through Aetrix?
Please submit a Request for Quotation (RFQ) for SAC5.0-E3/54 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SAC5.0-E3/54 reliable?
The price and inventory of SAC5.0-E3/54 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SAC5.0-E3/54 is usually 5 days.
3.What payment methods are accepted for SAC5.0-E3/54?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SAC5.0-E3/54 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SAC5.0-E3/54?
SAC5.0-E3/54 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SAC5.0-E3/54 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SAC5.0-E3/54?
For technical support, including SAC5.0-E3/54 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SAC5.0-E3/54 requirements.
6.How does Aetrix verify that SAC5.0-E3/54 is sourced from the original manufacturer or authorized distributors?
All SAC5.0-E3/54 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SAC5.0-E3/54 meets industry standards.
7.What is the process for return or replacement of SAC5.0-E3/54?
All SAC5.0-E3/54 units undergo pre-shipment inspection (PSI). If there is an issue with SAC5.0-E3/54, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SAC5.0-E3/54 part is unused and in its original packaging.
Return procedure for SAC5.0-E3/54:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SAC5.0-E3/54 Tags

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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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Toshiba Semiconductor and Storage

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Diodes Incorporated
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