Vishay Siliconix SI1304BDL-T1-E3
- Part No.:
- SI1304BDL-T1-E3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- SC-70, SOT-323
- Datasheet:
-
SI1304BDL-T1-E3.pdf
- Description:
- MOSFET N-CH 30V 900MA SC70-3
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI1304BDL-T1-E3 from Vishay Siliconix is an N-channel 30 V (D-S) TrenchFET® Power MOSFET in SC-70 (3-lead) package, rated for 0.90 A continuous drain current at TC = 25 °C, with RDS(on) = 0.270 Ω at VGS = 4.5 V and 0.385 Ω at VGS = 2.5 V, designed for low-power load switching in space-constrained portable electronics.
For engineers reviewing the SI1304BDL-T1-E3 datasheet, SI1304BDL-T1-E3 pinout, SI1304BDL-T1-E3 application, or SI1304BDL-T1-E3 equivalent, this device serves as a compact, halogen-free, RoHS-compliant discrete switch requiring minimal gate drive, suitable for battery-powered logic-level control circuits where thermal budget and board area are tightly constrained.
Technical Context
This MOSFET uses trench-gate silicon technology to achieve low on-resistance in a miniature surface-mount package. Its gate threshold voltage (VGS(th)) ranges from 0.6 V to 1.3 V, enabling reliable turn-on with 2.5 V or 3.3 V logic, while its 1.1 nC total gate charge (Qg) at VGS = 2.5 V supports fast switching with low drive power.
The device features a built-in body diode with VSD = 0.8–1.2 V at IS = 0.28 A and trr = 50–75 ns, supporting synchronous rectification and reverse recovery in low-current DC-DC stages. Thermal resistance RthJA is 315–375 °C/W (t ≤ 5 s), consistent with SC-70's inherent limitations for ambient-referenced dissipation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V maximum - defines safe blocking voltage in low-voltage rail switching (e.g., 3.3 V, 5 V, 12 V systems) |
| RDS(on) | 0.270 Ω at VGS = 4.5 V, ID = 0.9 A - enables <240 mW conduction loss at full rated current |
| ID (Cont.) | 0.90 A at TC = 25 °C - usable for sustained loads up to ~300 mW in typical PCB layouts |
| Qg | 1.1 nC at VGS = 2.5 V - allows efficient driving from microcontroller GPIO without external buffer |
| VGS(th) | 0.6–1.3 V - ensures turn-on compatibility with 1.8 V/2.5 V/3.3 V logic families |
| RthJA | 315–375 °C/W (t ≤ 5 s) - constrains usable power in unheatsinked, small-footprint applications |
| Ciss | 100 pF at VDS = 15 V - contributes to low capacitive loading on gate driver outputs |
Pinout & Package
SC-70 (3-lead) package: ultra-compact surface-mount outline measuring 2.00 mm × 1.25 mm × 0.95 mm (D × E1 × A2), optimized for high-density PCBs in portable devices. Lead frame is Alloy 42; terminals are matte tin-plated.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G) | Gate | Controls channel conduction; requires <1.3 V to turn on, driven directly by low-voltage logic |
| 2 (S) | Source | Reference node for gate drive and current return path; tied to system ground or low-side return |
| 3 (D) | Drain | High-side load connection point; carries switched current and dissipates heat via single lead |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® architecture | Delivers lowest possible RDS(on) per unit die area in SC-70, improving efficiency in milliwatt-to-watt switching |
| 100 % Rg tested | Ensures gate resistance falls within 0.5–2.3 Ω range, guaranteeing predictable switching speed and EMI behavior |
| Halogen-free construction | Meets IEC 61249-2-21, supporting environmentally compliant end-product certifications (e.g., WEEE, EcoDesign) |
| RoHS-compliant (Pb-free) | Enables use in consumer, medical, and industrial products sold in EU, China, and other regulated markets |
| Low Qgd / Qgs ratio | 0.6 nC / 0.4 nC = 1.5 - reduces Miller effect, enabling stable high-speed switching without oscillation |
Applications
| Battery Protection Circuit | USB Port Power Switch |
|---|---|
Use Scenario: Isolating Li-ion cell from charging circuit during overvoltage or overtemperature fault conditions. IC Role / Device Role / Timing Role: Low-side load switch controlled by protection IC's output signal; operates in static on/off mode with infrequent transitions. Use Value: 0.270 Ω RDS(on) limits voltage drop to <250 mV at 0.9 A, preserving battery runtime and minimizing thermal rise in sealed enclosures. | Use Scenario: Enabling/disabling 5 V power delivery to downstream USB peripherals in host controllers or hubs. IC Role / Device Role / Timing Role: High-side or low-side power gate; driven by 3.3 V GPIO with <10 µs switching required for hot-plug compliance. Use Value: 1.1 nC Qg at 2.5 V allows full turn-on in <500 ns using standard MCU output, meeting USB 2.0 power sequencing timing. |
| LED Backlight Dimming | IoT Sensor Node Power Gating |
Use Scenario: PWM-controlled current sink for white LED strings in compact displays (e.g., smartwatches, wearables). IC Role / Device Role / Timing Role: Synchronous low-side switch operating at 1–10 kHz; handles pulsed 0.75 A peak current. Use Value: 0.385 Ω RDS(on) at VGS = 2.5 V ensures <300 mW peak dissipation during PWM on-time, compatible with passive cooling. | Use Scenario: Shutting down non-critical subsystems (e.g., RF transceiver, ADC bias) between sensor readings to extend battery life. IC Role / Device Role / Timing Role: Always-off, infrequently activated power switch; spends >99.9% of time in zero-current state. Use Value: 1 µA IDSS at VDS = 30 V prevents measurable leakage drain during multi-week sleep cycles, preserving coin-cell longevity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel low-voltage MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DMN2004LK-7 | RDS(on) = 0.22 Ω @ 4.5 V, but SC-70-6 package (6-pin); higher cost and larger footprint | Supports higher continuous current (1.2 A) and lower thermal resistance (RthJA = 212 °C/W), suited for margin-critical designs | Select when >0.9 A rating or <300 mW steady-state dissipation is required; not pin-compatible |
| AO3400 | SOT-23 package, RDS(on) = 0.042 Ω @ 10 V but VGS(th) = 0.8–1.5 V; higher gate charge (12 nC) | Requires stronger gate drive; better for higher-current, lower-frequency switching where size is secondary to RDS(on) | Choose for cost-sensitive, medium-power applications where PCB area allows SOT-23 and gate drive capability exists |
Compared with DMN2004LK-7 and AO3400, SI1304BDL-T1-E3 offers the smallest footprint and lowest gate drive demand among these three, making it optimal for ultra-compact, low-duty-cycle, logic-level-switched functions where thermal headroom is managed via layout rather than package enhancement.
Availability
SI1304BDL-T1-E3 is available at Aetrix Electronics and suitable for battery management systems, USB power delivery modules, wearable display backlights, and IoT sensor node power gating requiring stable component supply across long-lifecycle embedded programs.
Supply support for SI1304BDL-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability power MOSFETs, diodes, and optoelectronics for industrial, automotive, and computing applications.
The Si1304BDL belongs to Vishay's LITTLE FOOT® SC-70 MOSFET family, engineered specifically for miniaturized, low-power switching in portable and space-constrained electronics where traditional SOT-23 is too large and performance must remain predictable at logic-level gate voltages.
FAQ
What is the maximum continuous drain current rating for SI1304BDL-T1-E3 at 70 °C case temperature?
The SI1304BDL-T1-E3 is rated for 0.71 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limits of the SC-70 package under sustained power dissipation; operation above this current requires verification of junction temperature using RthJA and actual board layout conditions. The SI1304BDL-T1-E3 datasheet confirms this value applies under steady-state conditions with no heatsinking.
Does SI1304BDL-T1-E3 support 1.8 V logic-level gate drive?
Yes, SI1304BDL-T1-E3 supports 1.8 V logic-level gate drive due to its guaranteed VGS(th) minimum of 0.6 V and RDS(on) specification down to VGS = 2.5 V. At 1.8 V, the device will partially enhance, delivering reduced but usable current-actual ID depends on VGS and temperature. For full-rated performance (0.90 A), VGS ≥ 2.5 V is required, making SI1304BDL-T1-E3 suitable for 1.8 V systems where partial conduction suffices or where gate boosting is applied.
What is the body diode forward voltage of SI1304BDL-T1-E3 and how does it affect reverse recovery?
The SI1304BDL-T1-E3 body diode has a forward voltage VSD of 0.8–1.2 V at IS = 0.28 A and exhibits reverse recovery time trr of 50–75 ns at TJ = 25 °C. This relatively fast recovery supports use in low-frequency synchronous rectification and flyback snubbing, though its 160 nC Qrr indicates moderate stored charge-designers should avoid high-frequency (>1 MHz) hard-switched topologies where this could increase losses. The SI1304BDL-T1-E3 body diode characteristics are fully characterized in the datasheet's Drain-Source Body Diode section.
Is SI1304BDL-T1-E3 pin-compatible with other SC-70 N-channel MOSFETs like SI1305DL?
No, SI1304BDL-T1-E3 is not pin-compatible with SI1305DL. While both use SC-70 (3-lead) packages, SI1305DL has a different pinout: Pin 1 = Source, Pin 2 = Gate, Pin 3 = Drain-reversed relative to SI1304BDL-T1-E3 (Pin 1 = Gate, Pin 2 = Source, Pin 3 = Drain). Substituting them without PCB revision would result in incorrect gate control and potential device failure. Always verify pin mapping using the official Vishay package drawings before replacement.
What thermal performance can be expected from SI1304BDL-T1-E3 on a standard FR4 PCB?
On a 1" × 1" FR4 board with copper on both sides, SI1304BDL-T1-E3 achieves RthJA = 315–375 °C/W (t ≤ 5 s), allowing ~340 mW maximum power dissipation at TA = 25 °C before reaching TJ(max) = 150 °C. With no added copper, thermal performance degrades significantly-designers should follow Vishay's recommended pad pattern (Document 72601) and consider thermal vias under the drain pad to improve heat spreading. This thermal behavior is intrinsic to the SI1304BDL-T1-E3 SC-70 package construction and is documented in AN813.
SI1304BDL-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- SC-70, SOT-323
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 900mA (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 2.5V, 4.5V
- Rds On (Max) @ Id, Vgs:
- 270mOhm @ 900mA, 4.5V
- Vgs(th) (Max) @ Id:
- 1.3V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 2.7 nC @ 4.5 V
- Vgs (Max):
- ±12V
- Input Capacitance (Ciss) (Max) @ Vds:
- 100 pF @ 15 V
- FET Feature:
- -
- Power Dissipation (Max):
- 340mW (Ta), 370mW (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-70-3
SI1304BDL-T1-E3 FAQ
1.How can I place an order for SI1304BDL-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI1304BDL-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI1304BDL-T1-E3 reliable?
The price and inventory of SI1304BDL-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI1304BDL-T1-E3 is usually 5 days.
3.What payment methods are accepted for SI1304BDL-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI1304BDL-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI1304BDL-T1-E3?
SI1304BDL-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI1304BDL-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI1304BDL-T1-E3?
For technical support, including SI1304BDL-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI1304BDL-T1-E3 requirements.
6.How does Aetrix verify that SI1304BDL-T1-E3 is sourced from the original manufacturer or authorized distributors?
All SI1304BDL-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI1304BDL-T1-E3 meets industry standards.
7.What is the process for return or replacement of SI1304BDL-T1-E3?
All SI1304BDL-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with SI1304BDL-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI1304BDL-T1-E3 part is unused and in its original packaging.
Return procedure for SI1304BDL-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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