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Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Vishay Siliconix SI3433CDV-T1-E3

Name: SI3433CDV-T1-E3
Brand: Vishay Siliconix
SKU: SI3433CDV-T1-E3
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI3433CDV-T1-E3

Manufacturer:: Vishay Siliconix

Category:: FETs, MOSFETs

Package:: SOT-23-6 Thin, TSOT-23-6

Datasheet:: SI3433CDV-T1-E3.pdf

Description:: MOSFET P-CH 20V 6A 6TSOP

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Product details

Overview

SI3433CDV-T1-E3 from Vishay Siliconix is a P-channel enhancement-mode MOSFET designed for high-efficiency load switching in space-constrained portable electronics. It features -20 V drain-source rating, 0.038 Ω R_DS(on) at V_GS = -4.5 V, -6 A continuous drain current (T_C = 25 °C), and TSOP-6 surface-mount package optimized for notebook power rail control.

For engineers reviewing the SI3433CDV-T1-E3 datasheet, SI3433CDV-T1-E3 pinout, SI3433CDV-T1-E3 application, or SI3433CDV-T1-E3 equivalent, this device is selected for low-voltage DC-DC output stage switching, battery protection circuits, and USB port power gating where fast turn-on, low gate charge (18 nC typ.), and thermally robust junction-to-foot resistance (25 °C/W typ.) are critical.

Technical Context

This MOSFET employs TrenchFET® technology to achieve low on-resistance with minimal gate drive voltage, enabling operation down to V_GS = -1.8 V while maintaining <0.060 Ω R_DS(on). Its negative threshold voltage (-0.4 to -1.0 V) ensures reliable enhancement-mode behavior without unintended conduction during power-up sequencing.

The device integrates a body diode with 45–70 ns reverse recovery time and 40–60 nC Q_rr, supporting synchronous rectification in buck converters and bidirectional current handling in hot-swap applications. Thermal design is supported by validated junction-to-foot (R_thJF) and junction-to-ambient (R_thJA) resistance values under defined PCB mounting conditions.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	-20 V - Maximum blocking voltage for 3.3 V/5 V system rails and battery-side switching
R_DS(on) max @ V_GS = -4.5 V	0.038 Ω - Enables ≤100 mW conduction loss at 5.2 A, critical for thermal management in thin notebooks
I_D continuous (T_C = 25 °C)	-6 A - Supports high-current load switching without external heatsinking on standard FR4
Q_g typ.	18 nC - Reduces gate driver power and enables fast switching (t_d(on) = 10–20 ns) in high-frequency PWM
V_GS(th)	-0.4 to -1.0 V - Ensures clean turn-on with standard logic-level gate drivers and avoids shoot-through in half-bridge configurations
R_thJF max	38 °C/W - Provides predictable thermal path to PCB copper pour, enabling accurate junction temperature estimation
Body diode V_SD	-0.8 to -1.2 V @ I_S = -4.2 A - Low forward drop improves efficiency in freewheeling and reverse-current blocking modes

Pinout & Package

SI3433CDV-T1-E3 is housed in a lead (Pb)-free, halogen-free TSOP-6 package (JEDEC MO-193C), measuring 3.05 mm × 2.85 mm × 1.00 mm, with exposed drain pads on pins 1, 2, 5, and 6 for enhanced thermal dissipation.

Pin/Terminal	Circuit Role	Design Meaning
1, 2, 5, 6	Drain (D)	Common high-current output node; electrically and thermally connected to exposed copper pad for low-inductance, low-R_th path
3	Gate (G)	Control input requiring -4.5 V to fully enhance; low C_iss (1300 pF) minimizes driver loading
4	Source (S)	Reference node for gate drive and load return; tied to system ground or battery negative in high-side switch configurations

Key Features

Feature	Design Value
TrenchFET® process technology	Delivers industry-leading R_DS(on) × area ratio for TSOP-6, reducing board space and conduction losses in portable power stages
Low V_GS(th) with tight distribution	Guarantees consistent turn-on across temperature (-55 to +150 °C) and unit-to-unit, eliminating need for gate bias resistors in simple on/off control
Optimized gate charge profile	Q_gd/Q_gs ratio of ~2.3 supports stable switching with reduced risk of Miller-induced false turn-on in high-dV/dt environments
Enhanced body diode performance	Q_rr = 40–60 nC and t_rr = 45–70 ns enable efficient synchronous rectification without external Schottky parallel paths
Thermally validated R_thJF	25–38 °C/W steady-state value allows direct thermal modeling from junction to PCB foot, simplifying thermal reliability validation

Applications

USB Power Delivery Switching	Notebook System Power Rail Control
Use Scenario: Managing power delivery negotiation and overcurrent protection between host and peripheral in USB-C PD 3.0 systems. IC Role / Device Role / Timing Role: High-side load switch controlling V_BUS path with fast fault response and minimal voltage drop. Use Value: 0.038 Ω R_DS(on) limits voltage drop to <200 mV at 5 A, preserving PD compliance margins while enabling <100 ns fault shutdown via gate control.	Use Scenario: Enabling/disabling core voltage rails (e.g., +3.3 V, +5 V) during sleep/wake transitions in ultrabook platforms. IC Role / Device Role / Timing Role: Logic-controlled power gate isolating subsystems to meet ACPI S3/S4 power budget targets. Use Value: -1.0 V V_GS(th) max ensures full enhancement with 1.8 V GPIO, and 18 nC Q_g supports <1 µs transition times without excessive gate driver stress.
Hot-Swap Circuit Protection	Li-ion Battery Disconnect Switch
Use Scenario: Safely inserting/removing modular peripherals (e.g., docking stations) into live backplanes without supply disturbance. IC Role / Device Role / Timing Role: Inrush current limiter and short-circuit protector using current-sense feedback and gate slew control. Use Value: Body diode reverse recovery specs (t_rr, Q_rr) allow controlled turn-off during fault events, preventing voltage overshoot on shared bus lines.	Use Scenario: Isolating depleted or faulty Li-ion cells from charging circuitry and system loads in multi-cell battery packs. IC Role / Device Role / Timing Role: Bidirectional blocking switch placed between battery terminals and protection IC or charger. Use Value: -20 V V_DS rating accommodates 4S Li-ion stack (≤16.8 V), and -20 A pulsed ID capability handles surge currents during pack reconnection.

USB Power Delivery Switching

Notebook System Power Rail Control

Use Scenario: Managing power delivery negotiation and overcurrent protection between host and peripheral in USB-C PD 3.0 systems.

IC Role / Device Role / Timing Role: High-side load switch controlling V_BUS path with fast fault response and minimal voltage drop.

Use Value: 0.038 Ω R_DS(on) limits voltage drop to <200 mV at 5 A, preserving PD compliance margins while enabling <100 ns fault shutdown via gate control.

Use Scenario: Enabling/disabling core voltage rails (e.g., +3.3 V, +5 V) during sleep/wake transitions in ultrabook platforms.

IC Role / Device Role / Timing Role: Logic-controlled power gate isolating subsystems to meet ACPI S3/S4 power budget targets.

Use Value: -1.0 V V_GS(th) max ensures full enhancement with 1.8 V GPIO, and 18 nC Q_g supports <1 µs transition times without excessive gate driver stress.

Hot-Swap Circuit Protection

Li-ion Battery Disconnect Switch

Use Scenario: Safely inserting/removing modular peripherals (e.g., docking stations) into live backplanes without supply disturbance.

IC Role / Device Role / Timing Role: Inrush current limiter and short-circuit protector using current-sense feedback and gate slew control.

Use Value: Body diode reverse recovery specs (t_rr, Q_rr) allow controlled turn-off during fault events, preventing voltage overshoot on shared bus lines.

Use Scenario: Isolating depleted or faulty Li-ion cells from charging circuitry and system loads in multi-cell battery packs.

IC Role / Device Role / Timing Role: Bidirectional blocking switch placed between battery terminals and protection IC or charger.

Use Value: -20 V V_DS rating accommodates 4S Li-ion stack (≤16.8 V), and -20 A pulsed ID capability handles surge currents during pack reconnection.

Equivalent & Alternatives

The following parts are listed as comparable options for similar P-channel load switch applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si3431DV-T1-E3	R_DS(on) = 0.052 Ω @ -4.5 V; higher threshold (-0.6 to -1.2 V); same TSOP-6 package	Slightly lower current capability (-4.8 A) and higher conduction loss; suitable where margin exists for thermal derating	Select when lower gate charge (14 nC) is prioritized over absolute R_DS(on) minimum.
DMN2011UFG-7	R_DS(on) = 0.035 Ω @ -4.5 V; 20 V rating; WDFN-6 package (2 × 2 mm); no exposed drain pad	Smaller footprint but higher R_thJA (100 °C/W); requires more aggressive PCB copper for thermal performance	Prefer for ultra-compact designs where board area is constrained and thermal mass can be added locally.

Compared with Si3433CDV-T1-E3, Si3431DV-T1-E3 trades 10% higher R_DS(on) for lower Q_g, while DMN2011UFG-7 achieves marginally better on-resistance in a smaller package but demands tighter thermal layout control due to inferior junction-to-ambient thermal resistance.

Availability

SI3433CDV-T1-E3 is available at Aetrix Electronics and suitable for notebook power management, USB-C PD load switching, and battery protection circuits requiring stable component supply, long-term lifecycle support, and RoHS-compliant manufacturing.

Supply support for SI3433CDV-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Vishay Siliconix is a global leader in discrete semiconductors, specializing in MOSFETs, diodes, and optoelectronics with emphasis on power efficiency, reliability, and miniaturization.

The SI3433CDV-T1-E3 belongs to Vishay's TrenchFET® P-channel MOSFET product line, engineered specifically for high-density portable power management where low R_DS(on), fast switching, and thermal predictability are essential.

FAQ

What is the maximum continuous drain current for SI3433CDV-T1-E3 at 70 °C case temperature?

The maximum continuous drain current for SI3433CDV-T1-E3 is -6 A at T_C = 70 °C, as specified in the Absolute Maximum Ratings table. This rating reflects thermal derating based on package power dissipation limits and is validated under standard surface-mount conditions on 1" × 1" FR4 board. SI3433CDV-T1-E3 maintains this current capability without requiring forced air or additional heatsinking.

Does SI3433CDV-T1-E3 support logic-level gate drive from a 1.8 V microcontroller GPIO?

Yes, SI3433CDV-T1-E3 supports logic-level gate drive from 1.8 V sources: its gate-source threshold voltage range is -0.4 V to -1.0 V, and it delivers R_DS(on) = 0.060 Ω at V_GS = -1.8 V (ID = -2 A). This ensures full enhancement and stable conduction without external level-shifting circuitry. SI3433CDV-T1-E3 is therefore well-suited for direct interface with low-voltage I/O domains.

What is the typical total gate charge (Qg) of SI3433CDV-T1-E3 at VGS = -4.5 V?

The typical total gate charge (Q_g) of SI3433CDV-T1-E3 is 18 nC at V_GS = -4.5 V, V_DS = -10 V, and I_D = -5.2 A, per the Dynamic specifications table. This low Q_g value reduces gate driver power consumption and enables fast switching transitions-critical for high-frequency DC-DC controllers and dynamic load switching. SI3433CDV-T1-E3 achieves this while maintaining robust ESD tolerance and latch-up immunity.

Can SI3433CDV-T1-E3 be used in bidirectional current applications such as battery backup switchover?

Yes, SI3433CDV-T1-E3 supports bidirectional current flow via its integrated body diode, which exhibits V_SD = -0.8 to -1.2 V at -4.2 A and t_rr = 45–70 ns. When used in battery backup configurations, the device blocks reverse current in normal operation and conducts freewheeling current during switchover transients. SI3433CDV-T1-E3's specified I_S = -2.7 A (continuous) and I_SM = -20 A (pulse) confirm its suitability for such roles.

What is the thermal resistance from junction to ambient (RthJA) for SI3433CDV-T1-E3 under standard test conditions?

The maximum junction-to-ambient thermal resistance (R_thJA) for SI3433CDV-T1-E3 is 80 °C/W under standard test conditions: surface-mounted on a 1" × 1" FR4 board with 2 oz copper, t ≤ 5 s pulse. The typical value is 60 °C/W. These values are measured per JEDEC JESD51-2 and are essential for calculating worst-case junction temperature rise. SI3433CDV-T1-E3's R_thJA enables reliable operation up to 1.6 W power dissipation at T_A = 25 °C.

SI3433CDV-T1-E3 Specifications

Product attributes: Attribute value

Manufacturer:: Vishay Siliconix

Series:: TrenchFET®

Package/Case:: SOT-23-6 Thin, TSOT-23-6

Packaging:: Tape & Reel (TR)

Product Status:: Active

FET Type:: P-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 20 V

Current - Continuous Drain (Id) @ 25°C:: 6A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: 1.8V, 4.5V

Rds On (Max) @ Id, Vgs:: 38mOhm @ 5.2A, 4.5V

Vgs(th) (Max) @ Id:: 1V @ 250µA

Gate Charge (Qg) (Max) @ Vgs:: 45 nC @ 8 V

Vgs (Max):: ±8V

Input Capacitance (Ciss) (Max) @ Vds:: 1300 pF @ 10 V

FET Feature:: -

Power Dissipation (Max):: 3.3W (Tc)

Operating Temperature:: -55°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 6-TSOP

SI3433CDV-T1-E3 FAQ

1.How can I place an order for SI3433CDV-T1-E3 through Aetrix?

Please submit a Request for Quotation (RFQ) for SI3433CDV-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI3433CDV-T1-E3 reliable?

The price and inventory of SI3433CDV-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI3433CDV-T1-E3 is usually 5 days.

3.What payment methods are accepted for SI3433CDV-T1-E3?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI3433CDV-T1-E3 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI3433CDV-T1-E3?

SI3433CDV-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI3433CDV-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI3433CDV-T1-E3?

For technical support, including SI3433CDV-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI3433CDV-T1-E3 requirements.

6.How does Aetrix verify that SI3433CDV-T1-E3 is sourced from the original manufacturer or authorized distributors?

All SI3433CDV-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI3433CDV-T1-E3 meets industry standards.

7.What is the process for return or replacement of SI3433CDV-T1-E3?

All SI3433CDV-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with SI3433CDV-T1-E3, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI3433CDV-T1-E3 part is unused and in its original packaging.

Return procedure for SI3433CDV-T1-E3:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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