Vishay Siliconix SI3469DV-T1-BE3
- Part No.:
- SI3469DV-T1-BE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- SOT-23-6 Thin, TSOT-23-6
- Datasheet:
-
SI3469DV-T1-BE3.pdf
- Description:
- P-CHANNEL 20-V (D-S) MOSFET
- Quantity:
- Payment:

- Shipping:

Inventory:5,120
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Product details
Overview
SI3469DV-T1-BE3 from Vishay Siliconix is a P-channel enhancement-mode MOSFET designed for high-efficiency load switching in portable computing and consumer electronics. It features -20 V drain-source voltage rating, 0.030 Ω RDS(on) at VGS = -10 V, -6.7 A continuous drain current (TA = 25 °C), and TSOP-6 surface-mount package optimized for thermal performance in space-constrained notebook PC power rails.
For engineers reviewing the SI3469DV-T1-BE3 datasheet, SI3469DV-T1-BE3 pinout, SI3469DV-T1-BE3 application, or SI3469DV-T1-BE3 equivalent, this device is selected for low-voltage, high-current DC load switching where gate drive compatibility with 3.3 V/5 V logic, tight RDS(on) tolerance, and robust pulsed current capability (-25 A) are critical design requirements.
Technical Context
This MOSFET employs TrenchFET® technology to achieve low on-resistance and fast switching dynamics. Its gate threshold voltage of -1.0 V to -3.0 V ensures reliable turn-on with standard logic-level gate drivers, while the integrated body diode supports bidirectional current flow in synchronous buck or OR-ing configurations.
The TSOP-6 package integrates four parallel drain terminals (pins 1, 2, 5, 6) to minimize thermal resistance (RthJF = 25–30 °C/W) and maximize power dissipation (1.14 W steady-state at TA = 70 °C). The device operates across -55 °C to +150 °C junction temperature range and meets RoHS and halogen-free compliance per IEC 61249-2-21.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | -20 V - Maximum blocking voltage for 3.3 V/5 V system rail protection and battery-side switching |
| RDS(on) | 0.030 Ω @ VGS = -10 V - Enables <100 mW conduction loss at 6.7 A, critical for thermal budget in thin notebooks |
| ID (continuous) | -6.7 A @ TA = 25 °C - Supports high-current peripheral loads such as USB-C PD controllers or display backlight drivers |
| Qg | 20–30 nC - Low gate charge enables efficient 1–2 MHz switching in compact DC-DC post-regulators |
| VGS(th) | -1.0 to -3.0 V - Ensures full enhancement with 3.3 V microcontroller GPIO without level-shifting circuitry |
| TJ range | -55 to +150 °C - Qualified for extended-temperature operation in game machines and industrial embedded systems |
| PD | 1.14 W @ TA = 70 °C - Specifies maximum power dissipation under real-world board thermal conditions |
Pinout & Package
TSOP-6 surface-mount package with exposed drain paddle for enhanced thermal transfer. Dimensions: 3.05 mm × 2.85 mm × 1.0 mm (JEDEC MO-193C). Four drain pins share thermal and electrical connection to PCB copper pour.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 5, 6 | Drain (D) | Electrically and thermally tied together; must be connected to large copper area for heat spreading and low-impedance current return path |
| 4 | Source (S) | Main current return node; connects to system ground or negative rail; body diode anode |
| 3 | Gate (G) | Control input requiring <30 nC total charge; sensitive to ESD; requires series resistor for ringing suppression in high-dI/dt applications |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® architecture | Delivers 24% lower RDS(on) vs. planar P-channel MOSFETs at same die size, enabling smaller footprint for equivalent current handling |
| Halogen-free & RoHS-compliant | Meets IEC 61249-2-21 and Directive 2002/95/EC - required for CE-marked portable electronics sold in EU markets |
| Low VGS(th) distribution | -1.0 V min threshold ensures guaranteed turn-on with 3.3 V logic; tight -3.0 V max avoids unintended conduction during brown-out |
| High pulsed current rating | -25 A single-pulse capability supports inrush current limiting during hot-swap events in desktop and docking station designs |
| Optimized for reflow | Qualified per JEDEC J-STD-020; withstands peak reflow temperature of 240 °C for 20–40 s without parametric shift or delamination |
Applications
| Notebook PC Load Switch | Game Machine Power Sequencing |
|---|---|
Use Scenario: Isolating SSD or discrete GPU power domains during sleep/wake transitions to reduce standby current. IC Role / Device Role / Timing Role: High-side load switch controlling 3.3 V or 5 V auxiliary rails with fast turn-off (<75 ns fall time) to meet ACPI S3/S4 timing. Use Value: Achieves <5 µA off-state leakage (IDSS ≤ -1 µA) and eliminates cross-conduction risk via precise -3.0 V VGS(th) upper limit. |
Use Scenario: Enabling/disabling RGB lighting subsystems or audio amplifiers based on user activity detection. IC Role / Device Role / Timing Role: Logic-controlled power gate with 15 ns turn-on delay ensuring clean power-up sequencing before FPGA configuration. Use Value: 0.051 Ω RDS(on) @ VGS = -4.5 V guarantees <120 mW loss at 1.5 A LED driver load, minimizing thermal impact on plastic housing. |
| Desktop Motherboard VRM Auxiliary Switch | USB-C Power Delivery OR-ing |
Use Scenario: Providing independent enable control for PCIe slot auxiliary power (12 V or 3.3 V) to support hot-plug compliance. IC Role / Device Role / Timing Role: Low-RDS(on) high-side switch placed between VRM output and connector, driven by southbridge GPIO. Use Value: 0.030 Ω on-resistance limits voltage drop to <200 mV at 6.7 A, preserving tight ±3% regulation margin for PCIe Gen5 devices. |
Use Scenario: Bidirectional OR-ing of dual USB-C ports to maintain system power during cable swap without interruption. IC Role / Device Role / Timing Role: Reverse-blocking P-channel switch leveraging intrinsic body diode forward voltage (VSD = -0.8 to -1.2 V) for passive path selection. Use Value: Integrated source-drain diode eliminates need for external Schottky, reducing BOM count while maintaining <1.2 V forward drop at 1.7 A. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar P-channel load switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si3467DV-T1-BE3 | Higher RDS(on) (0.042 Ω @ -10 V), lower ID (-5.0 A), identical TSOP-6 footprint | Suitable for lower-current peripherals (e.g., card readers) where thermal margin is less constrained | Select when cost sensitivity outweighs 15% RDS(on) penalty and peak current stays below 5 A. |
| DMN3026LFG-7 | Lower VDS (-30 V), higher RDS(on) (0.045 Ω @ -10 V), same 6-pin TSOP package | Better suited for 12 V industrial I/O modules requiring higher breakdown margin | Choose only if system rail exceeds 20 V or long-term reliability under overvoltage transients is prioritized over conduction loss. |
Compared with Si3467DV-T1-BE3 and DMN3026LFG-7, the SI3469DV-T1-BE3 delivers optimal balance of low on-resistance, logic-level gate drive, and thermal performance for 3.3–5 V portable computing loads - making it the preferred choice where efficiency and board space are co-constrained.
Availability
SI3469DV-T1-BE3 is available at Aetrix Electronics and suitable for notebook PC, game machine, and desktop motherboard applications requiring stable component supply, consistent parametric performance across production lots, and long-term lifecycle support for consumer electronics programs.
Supply support for SI3469DV-T1-BE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency and reliability.
The SI3469DV-T1-BE3 belongs to Vishay's TrenchFET® P-channel portfolio, engineered specifically for low-voltage load switching in portable and high-density computing platforms where thermal management and gate-drive simplicity are critical.
FAQ
What is the maximum continuous drain current for SI3469DV-T1-BE3 at 70 °C ambient temperature?
The SI3469DV-T1-BE3 supports -5.3 A continuous drain current at TA = 70 °C, as specified in the Absolute Maximum Ratings table. This value accounts for derating due to reduced thermal headroom and must be verified against actual board layout using the provided RthJA = 90–110 °C/W data. SI3469DV-T1-BE3 performance remains stable within this limit when mounted on a 1" × 1" FR4 board with recommended copper pour.
Does SI3469DV-T1-BE3 require a gate pull-down resistor in typical load-switch applications?
Yes, SI3469DV-T1-BE3 requires an external gate pull-down resistor (typically 10–100 kΩ) to ensure the MOSFET remains fully off during MCU reset or floating GPIO states. Its VGS(th) range of -1.0 V to -3.0 V means even small leakage or noise on the gate line could cause partial turn-on. SI3469DV-T1-BE3 gate capacitance (Qg = 20–30 nC) makes it susceptible to coupling without proper biasing.
Can SI3469DV-T1-BE3 be used in reverse polarity protection circuits?
Yes, SI3469DV-T1-BE3 is commonly deployed in reverse polarity protection due to its P-channel topology and -20 V VDS rating. When placed in the high-side position with source tied to input and drain to load, it blocks reverse voltage while conducting forward current with minimal drop. SI3469DV-T1-BE3 body diode orientation supports this function without external components, provided input voltage stays within rated limits.
What is the safe operating area (SOA) limitation for SI3469DV-T1-BE3 during pulse conditions?
The SI3469DV-T1-BE3 SOA curve shows it is limited by RDS(on) at low VDS, by peak pulse current (-25 A) at mid VDS, and by VDS breakdown (-20 V) at high voltage. For 100 µs pulses, it sustains up to -15 A at -10 V; for 1 ms pulses, limit drops to -8 A. SI3469DV-T1-BE3 must not operate beyond these boundaries to avoid thermal runaway or avalanche failure.
Is SI3469DV-T1-BE3 compatible with lead-free reflow soldering processes?
Yes, SI3469DV-T1-BE3 is qualified for lead-free reflow per JEDEC J-STD-020, supporting peak temperatures up to 240 °C for 20–40 seconds. Its TSOP-6 package passes thermal cycling and reliability testing after exposure to standard Pb-free profiles. SI3469DV-T1-BE3 is supplied in tape-and-reel format with moisture sensitivity level (MSL) 1, eliminating bake requirements prior to assembly.
SI3469DV-T1-BE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Package/Case:
- SOT-23-6 Thin, TSOT-23-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- P-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 20 V
- Current - Continuous Drain (Id) @ 25°C:
- 5A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 30mOhm @ 6.7A, 10V
- Vgs(th) (Max) @ Id:
- 3V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 30 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- -
- FET Feature:
- -
- Power Dissipation (Max):
- 1.14W (Ta)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSOP
SI3469DV-T1-BE3 FAQ
1.How can I place an order for SI3469DV-T1-BE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI3469DV-T1-BE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI3469DV-T1-BE3 reliable?
The price and inventory of SI3469DV-T1-BE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI3469DV-T1-BE3 is usually 5 days.
3.What payment methods are accepted for SI3469DV-T1-BE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI3469DV-T1-BE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI3469DV-T1-BE3?
SI3469DV-T1-BE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI3469DV-T1-BE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI3469DV-T1-BE3?
For technical support, including SI3469DV-T1-BE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI3469DV-T1-BE3 requirements.
6.How does Aetrix verify that SI3469DV-T1-BE3 is sourced from the original manufacturer or authorized distributors?
All SI3469DV-T1-BE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI3469DV-T1-BE3 meets industry standards.
7.What is the process for return or replacement of SI3469DV-T1-BE3?
All SI3469DV-T1-BE3 units undergo pre-shipment inspection (PSI). If there is an issue with SI3469DV-T1-BE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI3469DV-T1-BE3 part is unused and in its original packaging.
Return procedure for SI3469DV-T1-BE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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